Support REG_SEQUENCE in tablegen.

[oota-llvm.git] / lib / Target / R600 / SIInstructions.td

diff --git a/lib/Target/R600/SIInstructions.td b/lib/Target/R600/SIInstructions.td
index d437fb252b7dc53a94400df3270f4cc8c72ed7e6..36b52929668105edaea36178c144dee77d1690b5 100644 (file)
--- a/lib/Target/R600/SIInstructions.td
+++ b/lib/Target/R600/SIInstructions.td
@@ -1957,9 +1957,9 @@ def : Pat <
 
 def : Pat <
   (i64 (ctpop i64:$src)),
 
 def : Pat <
   (i64 (ctpop i64:$src)),

-  (INSERT_SUBREG (INSERT_SUBREG (i64 (IMPLICIT_DEF)),
-    (S_BCNT1_I32_B64 $src), sub0),
-    (S_MOV_B32 0), sub1)
+    (i64 (REG_SEQUENCE SReg_64,
+     (S_BCNT1_I32_B64 $src), sub0,
+     (S_MOV_B32 0), sub1))

 >;
 
 //===----------------------------------------------------------------------===//
 >;
 
 //===----------------------------------------------------------------------===//