+ }
+ }
+ }
+}
+
+/* This function will do the following:
+ - If MBB is an entry or exit block, set SR1 and SR2 to R0 and R12
+ respectively (defaults recommended by the ABI) and return true
+ - If MBB is not an entry block, initialize the register scavenger and look
+ for available registers.
+ - If the defaults (R0/R12) are available, return true
+ - If TwoUniqueRegsRequired is set to true, it looks for two unique
+ registers. Otherwise, look for a single available register.
+ - If the required registers are found, set SR1 and SR2 and return true.
+ - If the required registers are not found, set SR2 or both SR1 and SR2 to
+ PPC::NoRegister and return false.
+
+ Note that if both SR1 and SR2 are valid parameters and TwoUniqueRegsRequired
+ is not set, this function will attempt to find two different registers, but
+ still return true if only one register is available (and set SR1 == SR2).
+*/
+bool
+PPCFrameLowering::findScratchRegister(MachineBasicBlock *MBB,
+ bool UseAtEnd,
+ bool TwoUniqueRegsRequired,
+ unsigned *SR1,
+ unsigned *SR2) const {
+ RegScavenger RS;
+ unsigned R0 = Subtarget.isPPC64() ? PPC::X0 : PPC::R0;
+ unsigned R12 = Subtarget.isPPC64() ? PPC::X12 : PPC::R12;
+
+ // Set the defaults for the two scratch registers.
+ if (SR1)
+ *SR1 = R0;
+
+ if (SR2) {
+ assert (SR1 && "Asking for the second scratch register but not the first?");
+ *SR2 = R12;
+ }
+
+ // If MBB is an entry or exit block, use R0 and R12 as the scratch registers.
+ if ((UseAtEnd && MBB->isReturnBlock()) ||
+ (!UseAtEnd && (&MBB->getParent()->front() == MBB)))
+ return true;
+
+ RS.enterBasicBlock(MBB);
+
+ if (UseAtEnd && !MBB->empty()) {
+ // The scratch register will be used at the end of the block, so must
+ // consider all registers used within the block
+
+ MachineBasicBlock::iterator MBBI = MBB->getFirstTerminator();
+ // If no terminator, back iterator up to previous instruction.
+ if (MBBI == MBB->end())
+ MBBI = std::prev(MBBI);
+
+ if (MBBI != MBB->begin())
+ RS.forward(MBBI);
+ }
+
+ // If the two registers are available, we're all good.
+ // Note that we only return here if both R0 and R12 are available because
+ // although the function may not require two unique registers, it may benefit
+ // from having two so we should try to provide them.
+ if (!RS.isRegUsed(R0) && !RS.isRegUsed(R12))
+ return true;
+
+ // Get the list of callee-saved registers for the target.
+ const PPCRegisterInfo *RegInfo =
+ static_cast<const PPCRegisterInfo *>(Subtarget.getRegisterInfo());
+ const MCPhysReg *CSRegs = RegInfo->getCalleeSavedRegs(MBB->getParent());
+
+ // Get all the available registers in the block.
+ BitVector BV = RS.getRegsAvailable(Subtarget.isPPC64() ? &PPC::G8RCRegClass :
+ &PPC::GPRCRegClass);
+
+ // We shouldn't use callee-saved registers as scratch registers as they may be
+ // available when looking for a candidate block for shrink wrapping but not
+ // available when the actual prologue/epilogue is being emitted because they
+ // were added as live-in to the prologue block by PrologueEpilogueInserter.
+ for (int i = 0; CSRegs[i]; ++i)
+ BV.reset(CSRegs[i]);
+
+ // Set the first scratch register to the first available one.
+ if (SR1) {
+ int FirstScratchReg = BV.find_first();
+ *SR1 = FirstScratchReg == -1 ? (unsigned)PPC::NoRegister : FirstScratchReg;
+ }
+
+ // If there is another one available, set the second scratch register to that.
+ // Otherwise, set it to either PPC::NoRegister if this function requires two
+ // or to whatever SR1 is set to if this function doesn't require two.
+ if (SR2) {
+ int SecondScratchReg = BV.find_next(*SR1);
+ if (SecondScratchReg != -1)
+ *SR2 = SecondScratchReg;
+ else
+ *SR2 = TwoUniqueRegsRequired ? (unsigned)PPC::NoRegister : *SR1;
+ }
+
+ // Now that we've done our best to provide both registers, double check
+ // whether we were unable to provide enough.
+ if (BV.count() < (TwoUniqueRegsRequired ? 2 : 1))
+ return false;
+
+ return true;
+}
+
+// We need a scratch register for spilling LR and for spilling CR. By default,
+// we use two scratch registers to hide latency. However, if only one scratch
+// register is available, we can adjust for that by not overlapping the spill
+// code. However, if we need to realign the stack (i.e. have a base pointer)
+// and the stack frame is large, we need two scratch registers.
+bool
+PPCFrameLowering::twoUniqueScratchRegsRequired(MachineBasicBlock *MBB) const {
+ const PPCRegisterInfo *RegInfo =
+ static_cast<const PPCRegisterInfo *>(Subtarget.getRegisterInfo());
+ MachineFunction &MF = *(MBB->getParent());
+ bool HasBP = RegInfo->hasBasePointer(MF);
+ unsigned FrameSize = determineFrameLayout(MF, false);
+ int NegFrameSize = -FrameSize;
+ bool IsLargeFrame = !isInt<16>(NegFrameSize);
+ MachineFrameInfo *MFI = MF.getFrameInfo();
+ unsigned MaxAlign = MFI->getMaxAlignment();
+
+ return IsLargeFrame && HasBP && MaxAlign > 1;
+}
+
+bool PPCFrameLowering::canUseAsPrologue(const MachineBasicBlock &MBB) const {
+ MachineBasicBlock *TmpMBB = const_cast<MachineBasicBlock *>(&MBB);
+
+ return findScratchRegister(TmpMBB, false,
+ twoUniqueScratchRegsRequired(TmpMBB));
+}
+
+bool PPCFrameLowering::canUseAsEpilogue(const MachineBasicBlock &MBB) const {
+ MachineBasicBlock *TmpMBB = const_cast<MachineBasicBlock *>(&MBB);
+
+ return findScratchRegister(TmpMBB, true);
+}
+
+void PPCFrameLowering::emitPrologue(MachineFunction &MF,
+ MachineBasicBlock &MBB) const {