- DEBUG(dbgs() << "Considering:\n");
- DEBUG(dbgs() << " induction operation: " << *IOp);
- DEBUG(dbgs() << " induction variable: " << *IV_Inst);
- DEBUG(dbgs() << " initial value: " << *InitialValue << "\n");
-
- // Look for the cmp instruction to determine if we
- // can get a useful trip count. The trip count can
- // be either a register or an immediate. The location
- // of the value depends upon the type (reg or imm).
- for (MachineRegisterInfo::reg_iterator
- RI = MRI->reg_begin(IV_Opnd->getReg()), RE = MRI->reg_end();
- RI != RE; ++RI) {
- IV_Opnd = &RI.getOperand();
- bool SignedCmp;
- MachineInstr *MI = IV_Opnd->getParent();
- if (L->contains(MI) && isCompareEqualsImm(MI, SignedCmp) &&
- MI->getOperand(0).getReg() == PredReg) {
-
- OldInsts.push_back(MI);
- OldInsts.push_back(IOp);
-
- DEBUG(dbgs() << " compare: " << *MI);
-
- const MachineOperand &MO = MI->getOperand(2);
- assert(MO.isImm() && "IV Cmp Operand should be an immediate");
-
- int64_t ImmVal;
- if (SignedCmp)
- ImmVal = (short) MO.getImm();
- else
- ImmVal = MO.getImm();
-
- const MachineInstr *IV_DefInstr = MRI->getVRegDef(IV_Opnd->getReg());
- assert(L->contains(IV_DefInstr->getParent()) &&
- "IV definition should occurs in loop");
- int64_t iv_value = (short) IV_DefInstr->getOperand(2).getImm();
-
- assert(InitialValue->isReg() && "Expecting register for init value");
- unsigned InitialValueReg = InitialValue->getReg();
-
- const MachineInstr *DefInstr = MRI->getVRegDef(InitialValueReg);
-
- // Here we need to look for an immediate load (an li or lis/ori pair).
- if (DefInstr && (DefInstr->getOpcode() == PPC::ORI8 ||
- DefInstr->getOpcode() == PPC::ORI)) {
- int64_t start = (short) DefInstr->getOperand(2).getImm();
- const MachineInstr *DefInstr2 =
- MRI->getVRegDef(DefInstr->getOperand(0).getReg());
- if (DefInstr2 && (DefInstr2->getOpcode() == PPC::LIS8 ||
- DefInstr2->getOpcode() == PPC::LIS)) {
- DEBUG(dbgs() << " initial constant: " << *DefInstr);
- DEBUG(dbgs() << " initial constant: " << *DefInstr2);
-
- start |= int64_t(short(DefInstr2->getOperand(1).getImm())) << 16;
-
- int64_t count = ImmVal - start;
- if ((count % iv_value) != 0) {
- return 0;
- }
- return new CountValue(count/iv_value);
- }
- } else if (DefInstr && (DefInstr->getOpcode() == PPC::LI8 ||
- DefInstr->getOpcode() == PPC::LI)) {
- DEBUG(dbgs() << " initial constant: " << *DefInstr);
+bool PPCCTRLoops::mightUseCTR(const Triple &TT, BasicBlock *BB) {
+ for (BasicBlock::iterator J = BB->begin(), JE = BB->end();
+ J != JE; ++J) {
+ if (CallInst *CI = dyn_cast<CallInst>(J)) {
+ if (InlineAsm *IA = dyn_cast<InlineAsm>(CI->getCalledValue())) {
+ // Inline ASM is okay, unless it clobbers the ctr register.
+ InlineAsm::ConstraintInfoVector CIV = IA->ParseConstraints();
+ for (unsigned i = 0, ie = CIV.size(); i < ie; ++i) {
+ InlineAsm::ConstraintInfo &C = CIV[i];
+ if (C.Type != InlineAsm::isInput)
+ for (unsigned j = 0, je = C.Codes.size(); j < je; ++j)
+ if (StringRef(C.Codes[j]).equals_lower("{ctr}"))
+ return true;
+ }