-//===-- MipsTargetMachine.h - Define TargetMachine for Mips -00--*- C++ -*-===//
+//===-- MipsTargetMachine.h - Define TargetMachine for Mips -----*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
-// This file was developed by Bruno Cardoso Lopes and is distributed under the
-// University of Illinois Open Source License. See LICENSE.TXT for details.
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
#ifndef MIPSTARGETMACHINE_H
#define MIPSTARGETMACHINE_H
-#include "MipsSubtarget.h"
-#include "MipsInstrInfo.h"
+#include "MipsFrameLowering.h"
#include "MipsISelLowering.h"
+#include "MipsInstrInfo.h"
+#include "MipsJITInfo.h"
+#include "MipsSelectionDAGInfo.h"
+#include "MipsSubtarget.h"
+#include "llvm/ADT/OwningPtr.h"
+#include "llvm/IR/DataLayout.h"
+#include "llvm/Target/TargetFrameLowering.h"
#include "llvm/Target/TargetMachine.h"
-#include "llvm/Target/TargetData.h"
-#include "llvm/Target/TargetFrameInfo.h"
+#include "llvm/Target/TargetTransformImpl.h"
namespace llvm {
- class MipsTargetMachine : public LLVMTargetMachine {
- MipsSubtarget Subtarget;
- const TargetData DataLayout; // Calculates type size & alignment
- MipsInstrInfo InstrInfo;
- TargetFrameInfo FrameInfo;
- MipsTargetLowering TLInfo;
-
- protected:
- virtual const TargetAsmInfo *createTargetAsmInfo() const;
-
- public:
- MipsTargetMachine(const Module &M, const std::string &FS);
-
- virtual const MipsInstrInfo *getInstrInfo() const
- { return &InstrInfo; }
- virtual const TargetFrameInfo *getFrameInfo() const
- { return &FrameInfo; }
- virtual const TargetSubtarget *getSubtargetImpl() const
- { return &Subtarget; }
- virtual const TargetData *getTargetData() const
- { return &DataLayout;}
-
- virtual const MRegisterInfo *getRegisterInfo() const {
- return &InstrInfo.getRegisterInfo();
- }
-
- virtual MipsTargetLowering *getTargetLowering() const {
- return const_cast<MipsTargetLowering*>(&TLInfo);
- }
-
- static unsigned getModuleMatchQuality(const Module &M);
-
- // Pass Pipeline Configuration
- virtual bool addInstSelector(FunctionPassManager &PM, bool Fast);
- virtual bool addPreEmitPass(FunctionPassManager &PM, bool Fast);
- virtual bool addAssemblyEmitter(FunctionPassManager &PM, bool Fast,
- std::ostream &Out);
- };
+class formatted_raw_ostream;
+class MipsRegisterInfo;
+
+class MipsTargetMachine : public LLVMTargetMachine {
+ MipsSubtarget Subtarget;
+ const DataLayout DL; // Calculates type size & alignment
+ OwningPtr<const MipsInstrInfo> InstrInfo;
+ OwningPtr<const MipsFrameLowering> FrameLowering;
+ MipsTargetLowering TLInfo;
+ MipsSelectionDAGInfo TSInfo;
+ MipsJITInfo JITInfo;
+ ScalarTargetTransformImpl STTI;
+ VectorTargetTransformImpl VTTI;
+
+public:
+ MipsTargetMachine(const Target &T, StringRef TT,
+ StringRef CPU, StringRef FS, const TargetOptions &Options,
+ Reloc::Model RM, CodeModel::Model CM,
+ CodeGenOpt::Level OL,
+ bool isLittle);
+
+ virtual ~MipsTargetMachine() {}
+
+ virtual const MipsInstrInfo *getInstrInfo() const
+ { return InstrInfo.get(); }
+ virtual const TargetFrameLowering *getFrameLowering() const
+ { return FrameLowering.get(); }
+ virtual const MipsSubtarget *getSubtargetImpl() const
+ { return &Subtarget; }
+ virtual const DataLayout *getDataLayout() const
+ { return &DL;}
+ virtual MipsJITInfo *getJITInfo()
+ { return &JITInfo; }
+
+ virtual const MipsRegisterInfo *getRegisterInfo() const {
+ return &InstrInfo->getRegisterInfo();
+ }
+
+ virtual const MipsTargetLowering *getTargetLowering() const {
+ return &TLInfo;
+ }
+
+ virtual const MipsSelectionDAGInfo* getSelectionDAGInfo() const {
+ return &TSInfo;
+ }
+
+ virtual const ScalarTargetTransformInfo *getScalarTargetTransformInfo()const {
+ return &STTI;
+ }
+ virtual const VectorTargetTransformInfo *getVectorTargetTransformInfo()const {
+ return &VTTI;
+ }
+
+ // Pass Pipeline Configuration
+ virtual TargetPassConfig *createPassConfig(PassManagerBase &PM);
+ virtual bool addCodeEmitter(PassManagerBase &PM, JITCodeEmitter &JCE);
+};
+
+/// MipsebTargetMachine - Mips32/64 big endian target machine.
+///
+class MipsebTargetMachine : public MipsTargetMachine {
+ virtual void anchor();
+public:
+ MipsebTargetMachine(const Target &T, StringRef TT,
+ StringRef CPU, StringRef FS, const TargetOptions &Options,
+ Reloc::Model RM, CodeModel::Model CM,
+ CodeGenOpt::Level OL);
+};
+
+/// MipselTargetMachine - Mips32/64 little endian target machine.
+///
+class MipselTargetMachine : public MipsTargetMachine {
+ virtual void anchor();
+public:
+ MipselTargetMachine(const Target &T, StringRef TT,
+ StringRef CPU, StringRef FS, const TargetOptions &Options,
+ Reloc::Model RM, CodeModel::Model CM,
+ CodeGenOpt::Level OL);
+};
+
} // End llvm namespace
#endif