MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &CPU,
const std::string &FS, bool little,
- Reloc::Model _RM, MipsTargetMachine *_TM)
+ MipsTargetMachine *_TM)
: MipsGenSubtargetInfo(TT, CPU, FS), MipsArchVersion(Mips32),
MipsABI(UnknownABI), IsLittle(little), IsSingleFloat(false),
IsFPXX(false), IsFP64bit(false), UseOddSPReg(true), IsNaN2008bit(false),
HasMips4_32r2(false), HasMips5_32r2(false), InMips16Mode(false),
InMips16HardFloat(Mips16HardFloat), InMicroMipsMode(false), HasDSP(false),
HasDSPR2(false), AllowMixed16_32(Mixed16_32 | Mips_Os16), Os16(Mips_Os16),
- HasMSA(false), RM(_RM), OverrideMode(NoOverride), TM(_TM),
- TargetTriple(TT),
+ HasMSA(false), OverrideMode(NoOverride), TM(_TM), TargetTriple(TT),
DL(computeDataLayout(initializeSubtargetDependencies(CPU, FS, TM))),
- TSInfo(DL), JITInfo(), InstrInfo(MipsInstrInfo::create(*TM)),
+ TSInfo(DL), JITInfo(), InstrInfo(MipsInstrInfo::create(*this)),
FrameLowering(MipsFrameLowering::create(*TM, *this)),
- TLInfo(MipsTargetLowering::create(*TM)) {
+ TLInfo(MipsTargetLowering::create(*TM, *this)) {
PreviousInMips16Mode = InMips16Mode;
false);
if (!isABI_O32() && !useOddSPReg())
- report_fatal_error("-mattr=+nooddspreg is not currently permitted for a "
- "the O32 ABI.",
- false);
+ report_fatal_error("-mattr=+nooddspreg requires the O32 ABI.", false);
+
+ if (IsFPXX && (isABI_N32() || isABI_N64()))
+ report_fatal_error("FPXX is not permitted for the N32/N64 ABI's.", false);
if (hasMips32r6()) {
StringRef ISA = hasMips64r6() ? "MIPS64r6" : "MIPS32r6";
// Set UseSmallSection.
// TODO: Investigate the IsLinux check. I suspect it's really checking for
// bare-metal.
- UseSmallSection = !IsLinux && (RM == Reloc::Static);
+ UseSmallSection = !IsLinux && (TM->getRelocationModel() == Reloc::Static);
}
-bool
-MipsSubtarget::enablePostRAScheduler(CodeGenOpt::Level OptLevel,
- TargetSubtargetInfo::AntiDepBreakMode &Mode,
- RegClassVector &CriticalPathRCs) const {
- Mode = TargetSubtargetInfo::ANTIDEP_NONE;
+/// This overrides the PostRAScheduler bit in the SchedModel for any CPU.
+bool MipsSubtarget::enablePostMachineScheduler() const { return true; }
+
+void MipsSubtarget::getCriticalPathRCs(RegClassVector &CriticalPathRCs) const {
CriticalPathRCs.clear();
- CriticalPathRCs.push_back(isGP64bit() ? &Mips::GPR64RegClass
- : &Mips::GPR32RegClass);
- return OptLevel >= CodeGenOpt::Aggressive;
+ CriticalPathRCs.push_back(isGP64bit() ?
+ &Mips::GPR64RegClass : &Mips::GPR32RegClass);
+}
+
+CodeGenOpt::Level MipsSubtarget::getOptLevelToEnablePostRAScheduler() const {
+ return CodeGenOpt::Aggressive;
}
MipsSubtarget &
// Initialize scheduling itinerary for the specified CPU.
InstrItins = getInstrItineraryForCPU(CPUName);
- if (InMips16Mode && !TM->Options.UseSoftFloat) {
- // Hard float for mips16 means essentially to compile as soft float
- // but to use a runtime library for soft float that is written with
- // native mips32 floating point instructions (those runtime routines
- // run in mips32 hard float mode).
- TM->Options.UseSoftFloat = true;
- TM->Options.FloatABIType = FloatABI::Soft;
+ if (InMips16Mode && !TM->Options.UseSoftFloat)
InMips16HardFloat = true;
- }
return *this;
}
FrameLoweringSE.swap(FrameLowering);
TLInfoSE.swap(TLInfo);
if (!InstrInfo16) {
- InstrInfo.reset(MipsInstrInfo::create(*TM));
+ InstrInfo.reset(MipsInstrInfo::create(*this));
FrameLowering.reset(MipsFrameLowering::create(*TM, *this));
- TLInfo.reset(MipsTargetLowering::create(*TM));
+ TLInfo.reset(MipsTargetLowering::create(*TM, *this));
} else {
InstrInfo16.swap(InstrInfo);
FrameLowering16.swap(FrameLowering);
FrameLowering16.swap(FrameLowering);
TLInfo16.swap(TLInfo);
if (!InstrInfoSE) {
- InstrInfo.reset(MipsInstrInfo::create(*TM));
+ InstrInfo.reset(MipsInstrInfo::create(*this));
FrameLowering.reset(MipsFrameLowering::create(*TM, *this));
- TLInfo.reset(MipsTargetLowering::create(*TM));
+ TLInfo.reset(MipsTargetLowering::create(*TM, *this));
} else {
InstrInfoSE.swap(InstrInfo);
FrameLoweringSE.swap(FrameLowering);
assert(FrameLowering && "null frame lowering SE");
}
-bool MipsSubtarget::mipsSEUsesSoftFloat() const {
+bool MipsSubtarget::abiUsesSoftFloat() const {
return TM->Options.UseSoftFloat && !InMips16HardFloat;
}
DEBUG(dbgs() << "use constant islands " << Mips16ConstantIslands << "\n");
return Mips16ConstantIslands;
}
+
+Reloc::Model MipsSubtarget::getRelocationModel() const {
+ return TM->getRelocationModel();
+}