Remove the TargetMachine forwards for TargetSubtargetInfo based

[oota-llvm.git] / lib / Target / Mips / MipsSEInstrInfo.cpp

diff --git a/lib/Target/Mips/MipsSEInstrInfo.cpp b/lib/Target/Mips/MipsSEInstrInfo.cpp
index 69cb74cb1e49725527da9f800628d978f43347e4..16bea8b31d3055b16972e78774c0442cf0ff3a35 100644 (file)
--- a/lib/Target/Mips/MipsSEInstrInfo.cpp
+++ b/lib/Target/Mips/MipsSEInstrInfo.cpp
@@ -620,13 +620,16 @@ void MipsSEInstrInfo::expandEhReturn(MachineBasicBlock &MBB,
   // jr   $ra (via RetRA)
   const TargetMachine &TM = MBB.getParent()->getTarget();
   if (TM.getRelocationModel() == Reloc::PIC_)
-    BuildMI(MBB, I, I->getDebugLoc(), TM.getInstrInfo()->get(ADDU), T9)
+    BuildMI(MBB, I, I->getDebugLoc(),
+            TM.getSubtargetImpl()->getInstrInfo()->get(ADDU), T9)
         .addReg(TargetReg)
         .addReg(ZERO);
-  BuildMI(MBB, I, I->getDebugLoc(), TM.getInstrInfo()->get(ADDU), RA)
+  BuildMI(MBB, I, I->getDebugLoc(),
+          TM.getSubtargetImpl()->getInstrInfo()->get(ADDU), RA)
       .addReg(TargetReg)
       .addReg(ZERO);
-  BuildMI(MBB, I, I->getDebugLoc(), TM.getInstrInfo()->get(ADDU), SP)
+  BuildMI(MBB, I, I->getDebugLoc(),
+          TM.getSubtargetImpl()->getInstrInfo()->get(ADDU), SP)
       .addReg(SP)
       .addReg(OffsetReg);
   expandRetRA(MBB, I);