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Make TargetLowering::getShiftAmountTy() taking DataLayout as an argument
[oota-llvm.git]
/
lib
/
Target
/
Mips
/
MipsISelLowering.h
diff --git
a/lib/Target/Mips/MipsISelLowering.h
b/lib/Target/Mips/MipsISelLowering.h
index bc9a1ce64097e4bfad4517cf93284b3e50a29bd8..7239da85eff87cc5eb3251c78301899e8539d82a 100644
(file)
--- a/
lib/Target/Mips/MipsISelLowering.h
+++ b/
lib/Target/Mips/MipsISelLowering.h
@@
-227,7
+227,9
@@
namespace llvm {
FastISel *createFastISel(FunctionLoweringInfo &funcInfo,
const TargetLibraryInfo *libInfo) const override;
FastISel *createFastISel(FunctionLoweringInfo &funcInfo,
const TargetLibraryInfo *libInfo) const override;
- MVT getScalarShiftAmountTy(EVT LHSTy) const override { return MVT::i32; }
+ MVT getScalarShiftAmountTy(const DataLayout &) const override {
+ return MVT::i32;
+ }
void LowerOperationWrapper(SDNode *N,
SmallVectorImpl<SDValue> &Results,
void LowerOperationWrapper(SDNode *N,
SmallVectorImpl<SDValue> &Results,
@@
-247,7
+249,8
@@
namespace llvm {
const char *getTargetNodeName(unsigned Opcode) const override;
/// getSetCCResultType - get the ISD::SETCC result ValueType
const char *getTargetNodeName(unsigned Opcode) const override;
/// getSetCCResultType - get the ISD::SETCC result ValueType
- EVT getSetCCResultType(LLVMContext &Context, EVT VT) const override;
+ EVT getSetCCResultType(const DataLayout &DL, LLVMContext &Context,
+ EVT VT) const override;
SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
@@
-478,8
+481,7
@@
namespace llvm {
bool shouldSignExtendTypeInLibCall(EVT Type, bool IsSigned) const override;
// Inline asm support
bool shouldSignExtendTypeInLibCall(EVT Type, bool IsSigned) const override;
// Inline asm support
- ConstraintType
- getConstraintType(const std::string &Constraint) const override;
+ ConstraintType getConstraintType(StringRef Constraint) const override;
/// Examine constraint string and operand type and determine a weight value.
/// The operand object must already have been set up with the operand type.
/// Examine constraint string and operand type and determine a weight value.
/// The operand object must already have been set up with the operand type.
@@
-493,8
+495,7
@@
namespace llvm {
std::pair<unsigned, const TargetRegisterClass *>
getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
std::pair<unsigned, const TargetRegisterClass *>
getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
- const std::string &Constraint,
- MVT VT) const override;
+ StringRef Constraint, MVT VT) const override;
/// LowerAsmOperandForConstraint - Lower the specified operand into the Ops
/// vector. If it is invalid, don't add anything to Ops. If hasMemory is
/// LowerAsmOperandForConstraint - Lower the specified operand into the Ops
/// vector. If it is invalid, don't add anything to Ops. If hasMemory is
@@
-505,8
+506,8
@@
namespace llvm {
std::vector<SDValue> &Ops,
SelectionDAG &DAG) const override;
std::vector<SDValue> &Ops,
SelectionDAG &DAG) const override;
- unsigned
getInlineAsmMemConstraint(
-
const std::string &
ConstraintCode) const override {
+ unsigned
+
getInlineAsmMemConstraint(StringRef
ConstraintCode) const override {
if (ConstraintCode == "R")
return InlineAsm::Constraint_R;
else if (ConstraintCode == "ZC")
if (ConstraintCode == "R")
return InlineAsm::Constraint_R;
else if (ConstraintCode == "ZC")