[Hexagon] Adding encoding bits for add opcode.

[oota-llvm.git] / lib / Target / Hexagon / Disassembler / HexagonDisassembler.cpp

diff --git a/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp b/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp
index aa02bd566409e90584702036ae1cecc98833264f..b709c835acfcf0b77ef62d241fd61bf1f8a737ea 100644 (file)
--- a/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp
+++ b/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp
@@ -32,7 +32,8 @@ using namespace llvm;
 \r
 #define DEBUG_TYPE "hexagon-disassembler"\r
 \r
-using DecodeStatus = MCDisassembler::DecodeStatus;\r
+// Pull DecodeStatus and its enum values into the global namespace.\r
+typedef llvm::MCDisassembler::DecodeStatus DecodeStatus;\r
 \r
 namespace {\r
 /// \brief Hexagon disassembler for all Hexagon platforms.\r
@@ -56,15 +57,31 @@ static const uint16_t IntRegDecoderTable[] = {
     Hexagon::R25, Hexagon::R26, Hexagon::R27, Hexagon::R28, Hexagon::R29,\r
     Hexagon::R30, Hexagon::R31};\r
 \r
-static const uint16_t DoubleRegDecoderTable[] = {\r
-    Hexagon::D0,  Hexagon::D1,  Hexagon::D2,  Hexagon::D3,\r
-    Hexagon::D4,  Hexagon::D5,  Hexagon::D6,  Hexagon::D7,\r
-    Hexagon::D8,  Hexagon::D9,  Hexagon::D10, Hexagon::D11,\r
-    Hexagon::D12, Hexagon::D13, Hexagon::D14, Hexagon::D15};\r
-\r
 static const uint16_t PredRegDecoderTable[] = {Hexagon::P0, Hexagon::P1,\r
                                                Hexagon::P2, Hexagon::P3};\r
 \r
+static DecodeStatus DecodeIntRegsRegisterClass(MCInst &Inst, unsigned RegNo,\r
+                                               uint64_t /*Address*/,\r
+                                               void const *Decoder) {\r
+  if (RegNo > 31)\r
+    return MCDisassembler::Fail;\r
+\r
+  unsigned Register = IntRegDecoderTable[RegNo];\r
+  Inst.addOperand(MCOperand::CreateReg(Register));\r
+  return MCDisassembler::Success;\r
+}\r
+\r
+static DecodeStatus DecodePredRegsRegisterClass(MCInst &Inst, unsigned RegNo,\r
+                                                uint64_t /*Address*/,\r
+                                                void const *Decoder) {\r
+  if (RegNo > 3)\r
+    return MCDisassembler::Fail;\r
+\r
+  unsigned Register = PredRegDecoderTable[RegNo];\r
+  Inst.addOperand(MCOperand::CreateReg(Register));\r
+  return MCDisassembler::Success;\r
+}\r
+\r
 #include "HexagonGenDisassemblerTables.inc"\r
 \r
 static MCDisassembler *createHexagonDisassembler(Target const &T,\r