class ARMBaseTargetMachine : public LLVMTargetMachine {
protected:
ARMSubtarget Subtarget;
-
-private:
- ARMJITInfo JITInfo;
-
public:
ARMBaseTargetMachine(const Target &T, StringRef TT,
StringRef CPU, StringRef FS,
CodeGenOpt::Level OL,
bool isLittle);
- ARMJITInfo *getJITInfo() override { return &JITInfo; }
const ARMSubtarget *getSubtargetImpl() const override { return &Subtarget; }
const ARMTargetLowering *getTargetLowering() const override {
// Implemented by derived classes
const DataLayout *getDataLayout() const override {
return getSubtargetImpl()->getDataLayout();
}
+ ARMJITInfo *getJITInfo() override { return Subtarget.getJITInfo(); }
+
/// \brief Register ARM analysis passes with a pass manager.
void addAnalysisPasses(PassManagerBase &PM) override;