#include "llvm/PassManager.h"
#include "llvm/CodeGen/Passes.h"
#include "llvm/Support/CommandLine.h"
-#include "llvm/Support/raw_ostream.h"
+#include "llvm/Support/FormattedStream.h"
#include "llvm/Target/TargetMachineRegistry.h"
#include "llvm/Target/TargetOptions.h"
using namespace llvm;
static cl::opt<bool> DisableIfConversion("disable-arm-if-conversion",cl::Hidden,
cl::desc("Disable if-conversion pass"));
-/// ARMTargetMachineModule - Note that this is used on hosts that cannot link
-/// in a library unless there are references into the library. In particular,
-/// it seems that it is not possible to get things to work on Win32 without
-/// this. Though it is unused, do not remove it.
-extern "C" int ARMTargetMachineModule;
-int ARMTargetMachineModule = 0;
-
// Register the target.
-static RegisterTarget<ARMTargetMachine> X("arm", "ARM");
-static RegisterTarget<ThumbTargetMachine> Y("thumb", "Thumb");
-
-// No assembler printer by default
-ARMTargetMachine::AsmPrinterCtorFn ARMTargetMachine::AsmPrinterCtor = 0;
-
-/// ThumbTargetMachine - Create an Thumb architecture model.
-///
-unsigned ThumbTargetMachine::getJITMatchQuality() {
-#if defined(__thumb__)
- return 10;
-#endif
- return 0;
-}
-
-unsigned ThumbTargetMachine::getModuleMatchQuality(const Module &M) {
- std::string TT = M.getTargetTriple();
- // Match thumb-foo-bar, as well as things like thumbv5blah-*
- if (TT.size() >= 6 &&
- (TT.substr(0, 6) == "thumb-" || TT.substr(0, 6) == "thumbv"))
- return 20;
+extern Target TheARMTarget;
+static RegisterTarget<ARMTargetMachine> X(TheARMTarget, "arm", "ARM");
- // If the target triple is something non-thumb, we don't match.
- if (!TT.empty()) return 0;
+extern Target TheThumbTarget;
+static RegisterTarget<ThumbTargetMachine> Y(TheThumbTarget, "thumb", "Thumb");
- if (M.getEndianness() == Module::LittleEndian &&
- M.getPointerSize() == Module::Pointer32)
- return 10; // Weak match
- else if (M.getEndianness() != Module::AnyEndianness ||
- M.getPointerSize() != Module::AnyPointerSize)
- return 0; // Match for some other target
-
- return getJITMatchQuality()/2;
-}
-
-ThumbTargetMachine::ThumbTargetMachine(const Module &M, const std::string &FS)
- : ARMTargetMachine(M, FS, true) {
-}
+// Force static initialization.
+extern "C" void LLVMInitializeARMTarget() { }
/// TargetMachine ctor - Create an ARM architecture model.
///
-ARMTargetMachine::ARMTargetMachine(const Module &M, const std::string &FS,
- bool isThumb)
- : Subtarget(M, FS, isThumb),
- DataLayout(Subtarget.isAPCS_ABI() ?
- // APCS ABI
- (isThumb ?
- std::string("e-p:32:32-f64:32:32-i64:32:32-"
- "i16:16:32-i8:8:32-i1:8:32-a:0:32") :
- std::string("e-p:32:32-f64:32:32-i64:32:32")) :
- // AAPCS ABI
- (isThumb ?
- std::string("e-p:32:32-f64:64:64-i64:64:64-"
- "i16:16:32-i8:8:32-i1:8:32-a:0:32") :
- std::string("e-p:32:32-f64:64:64-i64:64:64"))),
- InstrInfo(Subtarget),
+ARMBaseTargetMachine::ARMBaseTargetMachine(const Target &T,
+ const Module &M,
+ const std::string &FS,
+ bool isThumb)
+ : LLVMTargetMachine(T),
+ Subtarget(M, FS, isThumb),
FrameInfo(Subtarget),
JITInfo(),
- TLInfo(*this) {
+ InstrItins(Subtarget.getInstrItineraryData()) {
DefRelocModel = getRelocationModel();
}
-unsigned ARMTargetMachine::getJITMatchQuality() {
-#if defined(__arm__)
- return 10;
-#endif
- return 0;
+ARMTargetMachine::ARMTargetMachine(const Target &T, const Module &M,
+ const std::string &FS)
+ : ARMBaseTargetMachine(T, M, FS, false), InstrInfo(Subtarget),
+ DataLayout(Subtarget.isAPCS_ABI() ?
+ std::string("e-p:32:32-f64:32:32-i64:32:32") :
+ std::string("e-p:32:32-f64:64:64-i64:64:64")),
+ TLInfo(*this) {
}
-unsigned ARMTargetMachine::getModuleMatchQuality(const Module &M) {
- std::string TT = M.getTargetTriple();
- // Match arm-foo-bar, as well as things like armv5blah-*
- if (TT.size() >= 4 &&
- (TT.substr(0, 4) == "arm-" || TT.substr(0, 4) == "armv"))
- return 20;
- // If the target triple is something non-arm, we don't match.
- if (!TT.empty()) return 0;
-
- if (M.getEndianness() == Module::LittleEndian &&
- M.getPointerSize() == Module::Pointer32)
- return 10; // Weak match
- else if (M.getEndianness() != Module::AnyEndianness ||
- M.getPointerSize() != Module::AnyPointerSize)
- return 0; // Match for some other target
-
- return getJITMatchQuality()/2;
+ThumbTargetMachine::ThumbTargetMachine(const Target &T, const Module &M,
+ const std::string &FS)
+ : ARMBaseTargetMachine(T, M, FS, true),
+ DataLayout(Subtarget.isAPCS_ABI() ?
+ std::string("e-p:32:32-f64:32:32-i64:32:32-"
+ "i16:16:32-i8:8:32-i1:8:32-a:0:32") :
+ std::string("e-p:32:32-f64:64:64-i64:64:64-"
+ "i16:16:32-i8:8:32-i1:8:32-a:0:32")),
+ TLInfo(*this) {
+ // Create the approriate type of Thumb InstrInfo
+ if (Subtarget.hasThumb2())
+ InstrInfo = new Thumb2InstrInfo(Subtarget);
+ else
+ InstrInfo = new Thumb1InstrInfo(Subtarget);
}
-const TargetAsmInfo *ARMTargetMachine::createTargetAsmInfo() const {
+const TargetAsmInfo *ARMBaseTargetMachine::createTargetAsmInfo() const {
switch (Subtarget.TargetType) {
case ARMSubtarget::isDarwin:
return new ARMDarwinTargetAsmInfo(*this);
// Pass Pipeline Configuration
-bool ARMTargetMachine::addInstSelector(PassManagerBase &PM,
- CodeGenOpt::Level OptLevel) {
+bool ARMBaseTargetMachine::addInstSelector(PassManagerBase &PM,
+ CodeGenOpt::Level OptLevel) {
PM.add(createARMISelDag(*this));
return false;
}
-bool ARMTargetMachine::addPreEmitPass(PassManagerBase &PM,
- CodeGenOpt::Level OptLevel) {
+bool ARMBaseTargetMachine::addPreRegAlloc(PassManagerBase &PM,
+ CodeGenOpt::Level OptLevel) {
+ // FIXME: temporarily disabling load / store optimization pass for Thumb mode.
+ if (OptLevel != CodeGenOpt::None && !DisableLdStOpti && !Subtarget.isThumb())
+ PM.add(createARMLoadStoreOptimizationPass(true));
+ return true;
+}
+
+bool ARMBaseTargetMachine::addPreEmitPass(PassManagerBase &PM,
+ CodeGenOpt::Level OptLevel) {
// FIXME: temporarily disabling load / store optimization pass for Thumb mode.
if (OptLevel != CodeGenOpt::None && !DisableLdStOpti && !Subtarget.isThumb())
PM.add(createARMLoadStoreOptimizationPass());
!DisableIfConversion && !Subtarget.isThumb())
PM.add(createIfConverterPass());
+ if (Subtarget.isThumb2())
+ PM.add(createThumb2ITBlockPass());
+
PM.add(createARMConstantIslandPass());
return true;
}
-bool ARMTargetMachine::addAssemblyEmitter(PassManagerBase &PM,
+bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
CodeGenOpt::Level OptLevel,
- bool Verbose,
- raw_ostream &Out) {
- // Output assembly language.
- assert(AsmPrinterCtor && "AsmPrinter was not linked in");
- if (AsmPrinterCtor)
- PM.add(AsmPrinterCtor(Out, *this, OptLevel, Verbose));
+ MachineCodeEmitter &MCE) {
+ // FIXME: Move this to TargetJITInfo!
+ if (DefRelocModel == Reloc::Default)
+ setRelocationModel(Reloc::Static);
+ // Machine code emitter pass for ARM.
+ PM.add(createARMCodeEmitterPass(*this, MCE));
return false;
}
+bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
+ CodeGenOpt::Level OptLevel,
+ JITCodeEmitter &JCE) {
+ // FIXME: Move this to TargetJITInfo!
+ if (DefRelocModel == Reloc::Default)
+ setRelocationModel(Reloc::Static);
+
+ // Machine code emitter pass for ARM.
+ PM.add(createARMJITCodeEmitterPass(*this, JCE));
+ return false;
+}
-bool ARMTargetMachine::addCodeEmitter(PassManagerBase &PM,
- CodeGenOpt::Level OptLevel,
- bool DumpAsm,
- MachineCodeEmitter &MCE) {
+bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
+ CodeGenOpt::Level OptLevel,
+ ObjectCodeEmitter &OCE) {
// FIXME: Move this to TargetJITInfo!
if (DefRelocModel == Reloc::Default)
setRelocationModel(Reloc::Static);
// Machine code emitter pass for ARM.
+ PM.add(createARMObjectCodeEmitterPass(*this, OCE));
+ return false;
+}
+
+bool ARMBaseTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
+ CodeGenOpt::Level OptLevel,
+ MachineCodeEmitter &MCE) {
+ // Machine code emitter pass for ARM.
PM.add(createARMCodeEmitterPass(*this, MCE));
- if (DumpAsm) {
- assert(AsmPrinterCtor && "AsmPrinter was not linked in");
- if (AsmPrinterCtor)
- PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true));
- }
+ return false;
+}
+bool ARMBaseTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
+ CodeGenOpt::Level OptLevel,
+ JITCodeEmitter &JCE) {
+ // Machine code emitter pass for ARM.
+ PM.add(createARMJITCodeEmitterPass(*this, JCE));
return false;
}
-bool ARMTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
+bool ARMBaseTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
CodeGenOpt::Level OptLevel,
- bool DumpAsm,
- MachineCodeEmitter &MCE) {
+ ObjectCodeEmitter &OCE) {
// Machine code emitter pass for ARM.
- PM.add(createARMCodeEmitterPass(*this, MCE));
- if (DumpAsm) {
- assert(AsmPrinterCtor && "AsmPrinter was not linked in");
- if (AsmPrinterCtor)
- PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true));
- }
-
+ PM.add(createARMObjectCodeEmitterPass(*this, OCE));
return false;
}
+
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