#define DEBUG_TYPE "jit"
#include "ARMJITInfo.h"
+#include "ARMInstrInfo.h"
#include "ARMConstantPoolValue.h"
#include "ARMRelocations.h"
#include "ARMSubtarget.h"
#include "llvm/Function.h"
-#include "llvm/CodeGen/MachineCodeEmitter.h"
+#include "llvm/CodeGen/JITCodeEmitter.h"
#include "llvm/Config/alloca.h"
+#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/Streams.h"
#include "llvm/System/Memory.h"
#include <cstdlib>
using namespace llvm;
void ARMJITInfo::replaceMachineCodeForFunction(void *Old, void *New) {
- abort();
+ llvm_report_error("ARMJITInfo::replaceMachineCodeForFunction");
}
/// JITCompilerFunction - This contains the address of the JIT function used to
// whole compilation callback doesn't exist as far as the caller is
// concerned, so we can't just preserve the callee saved regs.
"stmdb sp!, {r0, r1, r2, r3, lr}\n"
+#ifndef __SOFTFP__
+ "fstmfdd sp!, {d0, d1, d2, d3, d4, d5, d6, d7}\n"
+#endif
// The LR contains the address of the stub function on entry.
// pass it as the argument to the C part of the callback
"mov r0, lr\n"
// +--------+
// 1 | LR | Stub address (start of stub)
// 2-5 | R3..R0 | Saved registers (we need to preserve all regs)
+ // 6-20 | D0..D7 | Saved VFP registers
// +--------+
//
+#ifndef __SOFTFP__
+ // Restore VFP caller-saved registers.
+ "fldmfdd sp!, {d0, d1, d2, d3, d4, d5, d6, d7}\n"
+#endif
+ //
// We need to exchange the values in slots 0 and 1 so we can
// return to the address in slot 1 with the address in slot 0
// restored to the LR.
);
#else // Not an ARM host
void ARMCompilationCallback() {
- assert(0 && "Cannot call ARMCompilationCallback() on a non-ARM arch!\n");
- abort();
+ LLVM_UNREACHABLE("Cannot call ARMCompilationCallback() on a non-ARM arch!\n");
}
#endif
}
// ldr pc, [pc,#-4]
// <addr>
if (!sys::Memory::setRangeWritable((void*)StubAddr, 8)) {
- cerr << "ERROR: Unable to mark stub writable\n";
- abort();
+ llvm_report_error("ERROR: Unable to mark stub writable");
}
*(intptr_t *)StubAddr = 0xe51ff004; // ldr pc, [pc, #-4]
*(intptr_t *)(StubAddr+4) = NewVal;
if (!sys::Memory::setRangeExecutable((void*)StubAddr, 8)) {
- cerr << "ERROR: Unable to mark stub executable\n";
- abort();
+ llvm_report_error("ERROR: Unable to mark stub executable");
}
}
return ARMCompilationCallback;
}
-void *ARMJITInfo::emitGlobalValueNonLazyPtr(const GlobalValue *GV, void *Ptr,
- MachineCodeEmitter &MCE) {
- MCE.startGVStub(GV, 4, 4);
- MCE.emitWordLE((intptr_t)Ptr);
- return MCE.finishGVStub(GV);
+void *ARMJITInfo::emitGlobalValueIndirectSym(const GlobalValue *GV, void *Ptr,
+ JITCodeEmitter &JCE) {
+ JCE.startGVStub(GV, 4, 4);
+ JCE.emitWordLE((intptr_t)Ptr);
+ void *PtrAddr = JCE.finishGVStub(GV);
+ addIndirectSymAddr(Ptr, (intptr_t)PtrAddr);
+ return PtrAddr;
}
void *ARMJITInfo::emitFunctionStub(const Function* F, void *Fn,
- MachineCodeEmitter &MCE) {
+ JITCodeEmitter &JCE) {
// If this is just a call to an external function, emit a branch instead of a
// call. The code is the same except for one bit of the last instruction.
if (Fn != (void*)(intptr_t)ARMCompilationCallback) {
// Branch to the corresponding function addr.
- // The stub is 8-byte size and 4-aligned.
- MCE.startGVStub(F, 8, 4);
- intptr_t Addr = (intptr_t)MCE.getCurrentPCValue();
- MCE.emitWordLE(0xe51ff004); // ldr pc, [pc, #-4]
- MCE.emitWordLE((intptr_t)Fn); // addr of function
- sys::Memory::InvalidateInstructionCache((void*)Addr, 8);
+ if (IsPIC) {
+ // The stub is 8-byte size and 4-aligned.
+ intptr_t LazyPtr = getIndirectSymAddr(Fn);
+ if (!LazyPtr) {
+ // In PIC mode, the function stub is loading a lazy-ptr.
+ LazyPtr= (intptr_t)emitGlobalValueIndirectSym((GlobalValue*)F, Fn, JCE);
+ if (F)
+ DOUT << "JIT: Indirect symbol emitted at [" << LazyPtr << "] for GV '"
+ << F->getName() << "'\n";
+ else
+ DOUT << "JIT: Stub emitted at [" << LazyPtr
+ << "] for external function at '" << Fn << "'\n";
+ }
+ JCE.startGVStub(F, 16, 4);
+ intptr_t Addr = (intptr_t)JCE.getCurrentPCValue();
+ JCE.emitWordLE(0xe59fc004); // ldr pc, [pc, #+4]
+ JCE.emitWordLE(0xe08fc00c); // L_func$scv: add ip, pc, ip
+ JCE.emitWordLE(0xe59cf000); // ldr pc, [ip]
+ JCE.emitWordLE(LazyPtr - (Addr+4+8)); // func - (L_func$scv+8)
+ sys::Memory::InvalidateInstructionCache((void*)Addr, 16);
+ } else {
+ // The stub is 8-byte size and 4-aligned.
+ JCE.startGVStub(F, 8, 4);
+ intptr_t Addr = (intptr_t)JCE.getCurrentPCValue();
+ JCE.emitWordLE(0xe51ff004); // ldr pc, [pc, #-4]
+ JCE.emitWordLE((intptr_t)Fn); // addr of function
+ sys::Memory::InvalidateInstructionCache((void*)Addr, 8);
+ }
} else {
// The compilation callback will overwrite the first two words of this
// stub with indirect branch instructions targeting the compiled code.
//
// Branch and link to the compilation callback.
// The stub is 16-byte size and 4-byte aligned.
- MCE.startGVStub(F, 16, 4);
- intptr_t Addr = (intptr_t)MCE.getCurrentPCValue();
+ JCE.startGVStub(F, 16, 4);
+ intptr_t Addr = (intptr_t)JCE.getCurrentPCValue();
// Save LR so the callback can determine which stub called it.
// The compilation callback is responsible for popping this prior
// to returning.
- MCE.emitWordLE(0xe92d4000); // push {lr}
+ JCE.emitWordLE(0xe92d4000); // push {lr}
// Set the return address to go back to the start of this stub.
- MCE.emitWordLE(0xe24fe00c); // sub lr, pc, #12
+ JCE.emitWordLE(0xe24fe00c); // sub lr, pc, #12
// Invoke the compilation callback.
- MCE.emitWordLE(0xe51ff004); // ldr pc, [pc, #-4]
+ JCE.emitWordLE(0xe51ff004); // ldr pc, [pc, #-4]
// The address of the compilation callback.
- MCE.emitWordLE((intptr_t)ARMCompilationCallback);
+ JCE.emitWordLE((intptr_t)ARMCompilationCallback);
sys::Memory::InvalidateInstructionCache((void*)Addr, 16);
}
- return MCE.finishGVStub(F);
+ return JCE.finishGVStub(F);
}
intptr_t ARMJITInfo::resolveRelocDestAddr(MachineRelocation *MR) const {
ARM::RelocationType RT = (ARM::RelocationType)MR->getRelocationType();
- if (RT == ARM::reloc_arm_pic_jt)
+ switch (RT) {
+ default:
+ return (intptr_t)(MR->getResultPointer());
+ case ARM::reloc_arm_pic_jt:
// Destination address - jump table base.
return (intptr_t)(MR->getResultPointer()) - MR->getConstantVal();
- else if (RT == ARM::reloc_arm_jt_base)
+ case ARM::reloc_arm_jt_base:
// Jump table base address.
return getJumpTableBaseAddr(MR->getJumpTableIndex());
- else if (RT == ARM::reloc_arm_cp_entry)
+ case ARM::reloc_arm_cp_entry:
+ case ARM::reloc_arm_vfp_cp_entry:
// Constant pool entry address.
return getConstantPoolEntryAddr(MR->getConstantPoolIndex());
- else if (RT == ARM::reloc_arm_machine_cp_entry) {
+ case ARM::reloc_arm_machine_cp_entry: {
ARMConstantPoolValue *ACPV = (ARMConstantPoolValue*)MR->getConstantVal();
assert((!ACPV->hasModifier() && !ACPV->mustAddCurrentAddress()) &&
"Can't handle this machine constant pool entry yet!");
Addr -= getPCLabelAddr(ACPV->getLabelId()) + ACPV->getPCAdjustment();
return Addr;
}
- return (intptr_t)(MR->getResultPointer());
+ }
}
/// relocate - Before the JIT can run a block of code that has been emitted,
intptr_t ResultPtr = resolveRelocDestAddr(MR);
switch ((ARM::RelocationType)MR->getRelocationType()) {
case ARM::reloc_arm_cp_entry:
+ case ARM::reloc_arm_vfp_cp_entry:
case ARM::reloc_arm_relative: {
// It is necessary to calculate the correct PC relative value. We
// subtract the base addr from the target addr to form a byte offset.
- ResultPtr = ResultPtr-(intptr_t)RelocPos-8;
+ ResultPtr = ResultPtr - (intptr_t)RelocPos - 8;
// If the result is positive, set bit U(23) to 1.
if (ResultPtr >= 0)
- *((unsigned*)RelocPos) |= 1 << 23;
+ *((intptr_t*)RelocPos) |= 1 << ARMII::U_BitShift;
else {
- // Otherwise, obtain the absolute value and set
- // bit U(23) to 0.
- ResultPtr *= -1;
- *((unsigned*)RelocPos) &= 0xFF7FFFFF;
+ // Otherwise, obtain the absolute value and set bit U(23) to 0.
+ *((intptr_t*)RelocPos) &= ~(1 << ARMII::U_BitShift);
+ ResultPtr = - ResultPtr;
}
// Set the immed value calculated.
- *((unsigned*)RelocPos) |= (unsigned)ResultPtr;
+ // VFP immediate offset is multiplied by 4.
+ if (MR->getRelocationType() == ARM::reloc_arm_vfp_cp_entry)
+ ResultPtr = ResultPtr >> 2;
+ *((intptr_t*)RelocPos) |= ResultPtr;
// Set register Rn to PC.
- *((unsigned*)RelocPos) |= 0xF << 16;
+ *((intptr_t*)RelocPos) |=
+ ARMRegisterInfo::getRegisterNumbering(ARM::PC) << ARMII::RegRnShift;
break;
}
case ARM::reloc_arm_pic_jt:
case ARM::reloc_arm_machine_cp_entry:
case ARM::reloc_arm_absolute: {
// These addresses have already been resolved.
- *((unsigned*)RelocPos) |= (unsigned)ResultPtr;
+ *((intptr_t*)RelocPos) |= (intptr_t)ResultPtr;
break;
}
case ARM::reloc_arm_branch: {
ResultPtr = ResultPtr - (intptr_t)RelocPos - 8;
ResultPtr = (ResultPtr & 0x03FFFFFC) >> 2;
assert(ResultPtr >= -33554432 && ResultPtr <= 33554428);
- *((unsigned*)RelocPos) |= ResultPtr;
+ *((intptr_t*)RelocPos) |= ResultPtr;
break;
}
case ARM::reloc_arm_jt_base: {
// JT base - (instruction addr + 8)
ResultPtr = ResultPtr - (intptr_t)RelocPos - 8;
- *((unsigned*)RelocPos) |= ResultPtr;
+ *((intptr_t*)RelocPos) |= ResultPtr;
break;
}
}
projects / oota-llvm.git / blobdiff