Support clrex instruction on ARMv6k. Patch by Andrew Turner.

[oota-llvm.git] / lib / Target / ARM / ARMInstrInfo.td

diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td
index 292d5d62fc4bd4fc8bb835f6a526d96f803f207f..b9de83bfe6dc871074df1184676cbc0e4a571ec1 100644 (file)
--- a/lib/Target/ARM/ARMInstrInfo.td
+++ b/lib/Target/ARM/ARMInstrInfo.td
@@ -981,21 +981,6 @@ def addrmode5_pre : AddrMode5 {
    let PrintMethod = "printAddrMode5Operand<true>";
 }
 
-// addrmode5fp16 := reg +/- imm8*2
-//
-def AddrMode5FP16AsmOperand : AsmOperandClass { let Name = "AddrMode5FP16"; }
-class AddrMode5FP16 : Operand<i32>,
-                      ComplexPattern<i32, 2, "SelectAddrMode5FP16", []> {
-  let EncoderMethod = "getAddrMode5FP16OpValue";
-  let DecoderMethod = "DecodeAddrMode5FP16Operand";
-  let ParserMatchClass = AddrMode5FP16AsmOperand;
-  let MIOperandInfo = (ops GPR:$base, i32imm);
-}
-
-def addrmode5fp16 : AddrMode5FP16 {
-   let PrintMethod = "printAddrMode5FP16Operand<false>";
-}
-
 // addrmode6 := reg with optional alignment
 //
 def AddrMode6AsmOperand : AsmOperandClass { let Name = "AlignedMemory"; }
@@ -4743,7 +4728,7 @@ def STLEXD : AIstlex<0b01, (outs GPR:$Rd),
 
 def CLREX : AXI<(outs), (ins), MiscFrm, NoItinerary, "clrex",
                 [(int_arm_clrex)]>,
-            Requires<[IsARM, HasV7]>  {
+            Requires<[IsARM, HasV6K]>  {
   let Inst{31-0} = 0b11110101011111111111000000011111;
 }