void
MCSubtargetInfo::InitCPUSchedModel(StringRef CPU) {
if (!CPU.empty())
- CPUSchedModel = getSchedModelForCPU(CPU);
+ CPUSchedModel = &getSchedModelForCPU(CPU);
else
- CPUSchedModel = MCSchedModel::GetDefaultSchedModel();
+ CPUSchedModel = &MCSchedModel::GetDefaultSchedModel();
}
void MCSubtargetInfo::InitMCSubtargetInfo(
return FeatureBits;
}
-MCSchedModel
-MCSubtargetInfo::getSchedModelForCPU(StringRef CPU) const {
+const MCSchedModel &MCSubtargetInfo::getSchedModelForCPU(StringRef CPU) const {
assert(ProcSchedModels && "Processor machine model not available!");
unsigned NumProcs = ProcDesc.size();
/// Initialize an InstrItineraryData instance.
void MCSubtargetInfo::initInstrItins(InstrItineraryData &InstrItins) const {
- InstrItins =
- InstrItineraryData(CPUSchedModel, Stages, OperandCycles, ForwardingPaths);
+ InstrItins = InstrItineraryData(getSchedModel(), Stages, OperandCycles,
+ ForwardingPaths);
}