/// createDefaultScheduler - This creates an instruction scheduler appropriate
/// for the target.
ScheduleDAGSDNodes* createDefaultScheduler(SelectionDAGISel *IS,
- bool Fast) {
+ unsigned OptLevel) {
const TargetLowering &TLI = IS->getTargetLowering();
- if (Fast)
- return createFastDAGScheduler(IS, Fast);
+ if (OptLevel == 0)
+ return createFastDAGScheduler(IS, OptLevel);
if (TLI.getSchedulingPreference() == TargetLowering::SchedulingForLatency)
- return createTDListDAGScheduler(IS, Fast);
+ return createTDListDAGScheduler(IS, OptLevel);
assert(TLI.getSchedulingPreference() ==
TargetLowering::SchedulingForRegPressure && "Unknown sched type!");
- return createBURRListDAGScheduler(IS, Fast);
+ return createBURRListDAGScheduler(IS, OptLevel);
}
}
// SelectionDAGISel code
//===----------------------------------------------------------------------===//
-SelectionDAGISel::SelectionDAGISel(TargetMachine &tm, bool fast) :
+SelectionDAGISel::SelectionDAGISel(TargetMachine &tm, unsigned OL) :
FunctionPass(&ID), TM(tm), TLI(*tm.getTargetLowering()),
FuncInfo(new FunctionLoweringInfo(TLI)),
CurDAG(new SelectionDAG(TLI, *FuncInfo)),
- SDL(new SelectionDAGLowering(*CurDAG, TLI, *FuncInfo, fast)),
+ SDL(new SelectionDAGLowering(*CurDAG, TLI, *FuncInfo, OL)),
GFI(),
- Fast(fast),
+ OptLevel(OL),
DAGSize(0)
{}
// Run the DAG combiner in pre-legalize mode.
if (TimePassesIsEnabled) {
NamedRegionTimer T("DAG Combining 1", GroupName);
- CurDAG->Combine(Unrestricted, *AA, Fast);
+ CurDAG->Combine(Unrestricted, *AA, OptLevel);
} else {
- CurDAG->Combine(Unrestricted, *AA, Fast);
+ CurDAG->Combine(Unrestricted, *AA, OptLevel);
}
DOUT << "Optimized lowered selection DAG:\n";
// Run the DAG combiner in post-type-legalize mode.
if (TimePassesIsEnabled) {
NamedRegionTimer T("DAG Combining after legalize types", GroupName);
- CurDAG->Combine(NoIllegalTypes, *AA, Fast);
+ CurDAG->Combine(NoIllegalTypes, *AA, OptLevel);
} else {
- CurDAG->Combine(NoIllegalTypes, *AA, Fast);
+ CurDAG->Combine(NoIllegalTypes, *AA, OptLevel);
}
DOUT << "Optimized type-legalized selection DAG:\n";
if (TimePassesIsEnabled) {
NamedRegionTimer T("DAG Legalization", GroupName);
- CurDAG->Legalize(DisableLegalizeTypes, Fast);
+ CurDAG->Legalize(DisableLegalizeTypes, OptLevel);
} else {
- CurDAG->Legalize(DisableLegalizeTypes, Fast);
+ CurDAG->Legalize(DisableLegalizeTypes, OptLevel);
}
DOUT << "Legalized selection DAG:\n";
// Run the DAG combiner in post-legalize mode.
if (TimePassesIsEnabled) {
NamedRegionTimer T("DAG Combining 2", GroupName);
- CurDAG->Combine(NoIllegalOperations, *AA, Fast);
+ CurDAG->Combine(NoIllegalOperations, *AA, OptLevel);
} else {
- CurDAG->Combine(NoIllegalOperations, *AA, Fast);
+ CurDAG->Combine(NoIllegalOperations, *AA, OptLevel);
}
DOUT << "Optimized legalized selection DAG:\n";
if (ViewISelDAGs) CurDAG->viewGraph("isel input for " + BlockName);
- if (!Fast)
+ if (OptLevel != 0)
ComputeLiveOutVRegInfo();
// Third, instruction select all of the operations to machine code, adding the
RegisterScheduler::setDefault(Ctor);
}
- return Ctor(this, Fast);
+ return Ctor(this, OptLevel);
}
ScheduleHazardRecognizer *SelectionDAGISel::CreateTargetHazardRecognizer() {