#include "llvm/CodeGen/SelectionDAG.h"
#include "llvm/Constants.h"
-#include "llvm/GlobalValue.h"
+#include "llvm/GlobalVariable.h"
#include "llvm/Intrinsics.h"
+#include "llvm/DerivedTypes.h"
#include "llvm/Assembly/Writer.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineConstantPool.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Target/MRegisterInfo.h"
+#include "llvm/Target/TargetData.h"
#include "llvm/Target/TargetLowering.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/ADT/SetVector.h"
+#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringExtras.h"
-#include <iostream>
-#include <set>
-#include <cmath>
#include <algorithm>
+#include <cmath>
using namespace llvm;
/// makeVTList - Return an instance of the SDVTList struct initialized with the
return Res;
}
-// isInvertibleForFree - Return true if there is no cost to emitting the logical
-// inverse of this node.
-static bool isInvertibleForFree(SDOperand N) {
- if (isa<ConstantSDNode>(N.Val)) return true;
- if (N.Val->getOpcode() == ISD::SETCC && N.Val->hasOneUse())
- return true;
- return false;
-}
-
//===----------------------------------------------------------------------===//
// ConstantFPSDNode Class
//===----------------------------------------------------------------------===//
return TLI.getTargetMachine();
}
+//===----------------------------------------------------------------------===//
+// SDNode Profile Support
+//===----------------------------------------------------------------------===//
+
+/// AddNodeIDOpcode - Add the node opcode to the NodeID data.
+///
+static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
+ ID.AddInteger(OpC);
+}
+
+/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
+/// solely with their pointer.
+void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
+ ID.AddPointer(VTList.VTs);
+}
+
+/// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
+///
+static void AddNodeIDOperands(FoldingSetNodeID &ID,
+ const SDOperand *Ops, unsigned NumOps) {
+ for (; NumOps; --NumOps, ++Ops) {
+ ID.AddPointer(Ops->Val);
+ ID.AddInteger(Ops->ResNo);
+ }
+}
+
+static void AddNodeIDNode(FoldingSetNodeID &ID,
+ unsigned short OpC, SDVTList VTList,
+ const SDOperand *OpList, unsigned N) {
+ AddNodeIDOpcode(ID, OpC);
+ AddNodeIDValueTypes(ID, VTList);
+ AddNodeIDOperands(ID, OpList, N);
+}
+
+/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
+/// data.
+static void AddNodeIDNode(FoldingSetNodeID &ID, SDNode *N) {
+ AddNodeIDOpcode(ID, N->getOpcode());
+ // Add the return value info.
+ AddNodeIDValueTypes(ID, N->getVTList());
+ // Add the operand info.
+ AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
+
+ // Handle SDNode leafs with special info.
+ switch (N->getOpcode()) {
+ default: break; // Normal nodes don't need extra info.
+ case ISD::TargetConstant:
+ case ISD::Constant:
+ ID.AddInteger(cast<ConstantSDNode>(N)->getValue());
+ break;
+ case ISD::TargetConstantFP:
+ case ISD::ConstantFP:
+ ID.AddDouble(cast<ConstantFPSDNode>(N)->getValue());
+ break;
+ case ISD::TargetGlobalAddress:
+ case ISD::GlobalAddress:
+ case ISD::TargetGlobalTLSAddress:
+ case ISD::GlobalTLSAddress: {
+ GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
+ ID.AddPointer(GA->getGlobal());
+ ID.AddInteger(GA->getOffset());
+ break;
+ }
+ case ISD::BasicBlock:
+ ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
+ break;
+ case ISD::Register:
+ ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
+ break;
+ case ISD::SRCVALUE: {
+ SrcValueSDNode *SV = cast<SrcValueSDNode>(N);
+ ID.AddPointer(SV->getValue());
+ ID.AddInteger(SV->getOffset());
+ break;
+ }
+ case ISD::FrameIndex:
+ case ISD::TargetFrameIndex:
+ ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
+ break;
+ case ISD::JumpTable:
+ case ISD::TargetJumpTable:
+ ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
+ break;
+ case ISD::ConstantPool:
+ case ISD::TargetConstantPool: {
+ ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
+ ID.AddInteger(CP->getAlignment());
+ ID.AddInteger(CP->getOffset());
+ if (CP->isMachineConstantPoolEntry())
+ CP->getMachineCPVal()->AddSelectionDAGCSEId(ID);
+ else
+ ID.AddPointer(CP->getConstVal());
+ break;
+ }
+ case ISD::LOAD: {
+ LoadSDNode *LD = cast<LoadSDNode>(N);
+ ID.AddInteger(LD->getAddressingMode());
+ ID.AddInteger(LD->getExtensionType());
+ ID.AddInteger(LD->getLoadedVT());
+ ID.AddPointer(LD->getSrcValue());
+ ID.AddInteger(LD->getSrcValueOffset());
+ ID.AddInteger(LD->getAlignment());
+ ID.AddInteger(LD->isVolatile());
+ break;
+ }
+ case ISD::STORE: {
+ StoreSDNode *ST = cast<StoreSDNode>(N);
+ ID.AddInteger(ST->getAddressingMode());
+ ID.AddInteger(ST->isTruncatingStore());
+ ID.AddInteger(ST->getStoredVT());
+ ID.AddPointer(ST->getSrcValue());
+ ID.AddInteger(ST->getSrcValueOffset());
+ ID.AddInteger(ST->getAlignment());
+ ID.AddInteger(ST->isVolatile());
+ break;
+ }
+ }
+}
+
//===----------------------------------------------------------------------===//
// SelectionDAG Class
//===----------------------------------------------------------------------===//
if (Operand->use_empty())
DeadNodes.push_back(Operand);
}
- delete[] N->OperandList;
+ if (N->OperandsNeedDelete)
+ delete[] N->OperandList;
N->OperandList = 0;
N->NumOperands = 0;
if (Operand->use_empty())
DeadNodes.push_back(Operand);
}
- delete[] N->OperandList;
+ if (N->OperandsNeedDelete)
+ delete[] N->OperandList;
N->OperandList = 0;
N->NumOperands = 0;
// Drop all of the operands and decrement used nodes use counts.
for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I)
I->Val->removeUser(N);
- delete[] N->OperandList;
+ if (N->OperandsNeedDelete)
+ delete[] N->OperandList;
N->OperandList = 0;
N->NumOperands = 0;
// not subject to CSE.
if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag &&
!N->isTargetOpcode()) {
- N->dump();
- std::cerr << "\n";
+ N->dump(this);
+ cerr << "\n";
assert(0 && "Node is not in map!");
}
#endif
if (N->getValueType(i) == MVT::Flag)
return 0; // Never CSE anything that produces a flag.
- SelectionDAGCSEMap::NodeID ID;
- ID.SetOpcode(N->getOpcode());
- ID.SetValueTypes(N->getVTList());
- ID.SetOperands(Op);
+ SDOperand Ops[] = { Op };
+ FoldingSetNodeID ID;
+ AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
}
if (N->getValueType(i) == MVT::Flag)
return 0; // Never CSE anything that produces a flag.
- SelectionDAGCSEMap::NodeID ID;
- ID.SetOpcode(N->getOpcode());
- ID.SetValueTypes(N->getVTList());
- ID.SetOperands(Op1, Op2);
+ SDOperand Ops[] = { Op1, Op2 };
+ FoldingSetNodeID ID;
+ AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
}
if (N->getValueType(i) == MVT::Flag)
return 0; // Never CSE anything that produces a flag.
- SelectionDAGCSEMap::NodeID ID;
- ID.SetOpcode(N->getOpcode());
- ID.SetValueTypes(N->getVTList());
+ FoldingSetNodeID ID;
+ AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
+
if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(N)) {
ID.AddInteger(LD->getAddressingMode());
ID.AddInteger(LD->getExtensionType());
ID.AddInteger(LD->getSrcValueOffset());
ID.AddInteger(LD->getAlignment());
ID.AddInteger(LD->isVolatile());
+ } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(N)) {
+ ID.AddInteger(ST->getAddressingMode());
+ ID.AddInteger(ST->isTruncatingStore());
+ ID.AddInteger(ST->getStoredVT());
+ ID.AddPointer(ST->getSrcValue());
+ ID.AddInteger(ST->getSrcValueOffset());
+ ID.AddInteger(ST->getAlignment());
+ ID.AddInteger(ST->isVolatile());
}
- ID.SetOperands(Ops, NumOps);
+
return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
}
while (!AllNodes.empty()) {
SDNode *N = AllNodes.begin();
N->SetNextInBucket(0);
- delete [] N->OperandList;
+ if (N->OperandsNeedDelete)
+ delete [] N->OperandList;
N->OperandList = 0;
N->NumOperands = 0;
AllNodes.pop_front();
Val &= MVT::getIntVTBitMask(VT);
unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
- SelectionDAGCSEMap::NodeID ID(Opc, getVTList(VT));
+ FoldingSetNodeID ID;
+ AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
ID.AddInteger(Val);
void *IP = 0;
if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
SDOperand SelectionDAG::getConstantFP(double Val, MVT::ValueType VT,
bool isTarget) {
assert(MVT::isFloatingPoint(VT) && "Cannot create integer FP constant!");
- if (VT == MVT::f32)
+ MVT::ValueType EltVT =
+ MVT::isVector(VT) ? MVT::getVectorElementType(VT) : VT;
+ if (EltVT == MVT::f32)
Val = (float)Val; // Mask out extra precision.
// Do the map lookup using the actual bit pattern for the floating point
// value, so that we don't have problems with 0.0 comparing equal to -0.0, and
// we don't have issues with SNANs.
unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
- SelectionDAGCSEMap::NodeID ID(Opc, getVTList(VT));
- ID.AddInteger(DoubleToBits(Val));
+ FoldingSetNodeID ID;
+ AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
+ ID.AddDouble(Val);
void *IP = 0;
if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
return SDOperand(E, 0);
- SDNode *N = new ConstantFPSDNode(isTarget, Val, VT);
+ SDNode *N = new ConstantFPSDNode(isTarget, Val, EltVT);
CSEMap.InsertNode(N, IP);
AllNodes.push_back(N);
- return SDOperand(N, 0);
+ SDOperand Result(N, 0);
+ if (MVT::isVector(VT)) {
+ SmallVector<SDOperand, 8> Ops;
+ Ops.assign(MVT::getVectorNumElements(VT), Result);
+ Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size());
+ }
+ return Result;
}
SDOperand SelectionDAG::getGlobalAddress(const GlobalValue *GV,
MVT::ValueType VT, int Offset,
bool isTargetGA) {
- unsigned Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
- SelectionDAGCSEMap::NodeID ID(Opc, getVTList(VT));
+ const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
+ unsigned Opc;
+ if (GVar && GVar->isThreadLocal())
+ Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
+ else
+ Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
+ FoldingSetNodeID ID;
+ AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
ID.AddPointer(GV);
ID.AddInteger(Offset);
void *IP = 0;
SDOperand SelectionDAG::getFrameIndex(int FI, MVT::ValueType VT,
bool isTarget) {
unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
- SelectionDAGCSEMap::NodeID ID(Opc, getVTList(VT));
+ FoldingSetNodeID ID;
+ AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
ID.AddInteger(FI);
void *IP = 0;
if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
SDOperand SelectionDAG::getJumpTable(int JTI, MVT::ValueType VT, bool isTarget){
unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
- SelectionDAGCSEMap::NodeID ID(Opc, getVTList(VT));
+ FoldingSetNodeID ID;
+ AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
ID.AddInteger(JTI);
void *IP = 0;
if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
unsigned Alignment, int Offset,
bool isTarget) {
unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
- SelectionDAGCSEMap::NodeID ID(Opc, getVTList(VT));
+ FoldingSetNodeID ID;
+ AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
ID.AddInteger(Alignment);
ID.AddInteger(Offset);
ID.AddPointer(C);
unsigned Alignment, int Offset,
bool isTarget) {
unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
- SelectionDAGCSEMap::NodeID ID(Opc, getVTList(VT));
+ FoldingSetNodeID ID;
+ AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
ID.AddInteger(Alignment);
ID.AddInteger(Offset);
- C->AddSelectionDAGCSEId(&ID);
+ C->AddSelectionDAGCSEId(ID);
void *IP = 0;
if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
return SDOperand(E, 0);
SDOperand SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
- SelectionDAGCSEMap::NodeID ID(ISD::BasicBlock, getVTList(MVT::Other));
+ FoldingSetNodeID ID;
+ AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
ID.AddPointer(MBB);
void *IP = 0;
if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
}
SDOperand SelectionDAG::getRegister(unsigned RegNo, MVT::ValueType VT) {
- SelectionDAGCSEMap::NodeID ID(ISD::Register, getVTList(VT));
+ FoldingSetNodeID ID;
+ AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
ID.AddInteger(RegNo);
void *IP = 0;
if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
assert((!V || isa<PointerType>(V->getType())) &&
"SrcValue is not a pointer?");
- SelectionDAGCSEMap::NodeID ID(ISD::SRCVALUE, getVTList(MVT::Other));
+ FoldingSetNodeID ID;
+ AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
ID.AddPointer(V);
ID.AddInteger(Offset);
void *IP = 0;
return SDOperand(N, 0);
}
-SDOperand SelectionDAG::SimplifySetCC(MVT::ValueType VT, SDOperand N1,
- SDOperand N2, ISD::CondCode Cond) {
+SDOperand SelectionDAG::FoldSetCC(MVT::ValueType VT, SDOperand N1,
+ SDOperand N2, ISD::CondCode Cond) {
// These setcc operations always fold.
switch (Cond) {
default: break;
assert(!MVT::isInteger(N1.getValueType()) && "Illegal setcc for integer!");
break;
}
-
+
if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val)) {
uint64_t C2 = N2C->getValue();
if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val)) {
uint64_t C1 = N1C->getValue();
-
+
// Sign extend the operands if required
if (ISD::isSignedIntSetCC(Cond)) {
C1 = N1C->getSignExtended();
C2 = N2C->getSignExtended();
}
-
+
switch (Cond) {
default: assert(0 && "Unknown integer setcc!");
case ISD::SETEQ: return getConstant(C1 == C2, VT);
case ISD::SETLE: return getConstant((int64_t)C1 <= (int64_t)C2, VT);
case ISD::SETGE: return getConstant((int64_t)C1 >= (int64_t)C2, VT);
}
- } else {
- // If the LHS is a ZERO_EXTEND, perform the comparison on the input.
- if (N1.getOpcode() == ISD::ZERO_EXTEND) {
- unsigned InSize = MVT::getSizeInBits(N1.getOperand(0).getValueType());
-
- // If the comparison constant has bits in the upper part, the
- // zero-extended value could never match.
- if (C2 & (~0ULL << InSize)) {
- unsigned VSize = MVT::getSizeInBits(N1.getValueType());
- switch (Cond) {
- case ISD::SETUGT:
- case ISD::SETUGE:
- case ISD::SETEQ: return getConstant(0, VT);
- case ISD::SETULT:
- case ISD::SETULE:
- case ISD::SETNE: return getConstant(1, VT);
- case ISD::SETGT:
- case ISD::SETGE:
- // True if the sign bit of C2 is set.
- return getConstant((C2 & (1ULL << VSize)) != 0, VT);
- case ISD::SETLT:
- case ISD::SETLE:
- // True if the sign bit of C2 isn't set.
- return getConstant((C2 & (1ULL << VSize)) == 0, VT);
- default:
- break;
- }
- }
-
- // Otherwise, we can perform the comparison with the low bits.
- switch (Cond) {
- case ISD::SETEQ:
- case ISD::SETNE:
- case ISD::SETUGT:
- case ISD::SETUGE:
- case ISD::SETULT:
- case ISD::SETULE:
- return getSetCC(VT, N1.getOperand(0),
- getConstant(C2, N1.getOperand(0).getValueType()),
- Cond);
- default:
- break; // todo, be more careful with signed comparisons
- }
- } else if (N1.getOpcode() == ISD::SIGN_EXTEND_INREG &&
- (Cond == ISD::SETEQ || Cond == ISD::SETNE)) {
- MVT::ValueType ExtSrcTy = cast<VTSDNode>(N1.getOperand(1))->getVT();
- unsigned ExtSrcTyBits = MVT::getSizeInBits(ExtSrcTy);
- MVT::ValueType ExtDstTy = N1.getValueType();
- unsigned ExtDstTyBits = MVT::getSizeInBits(ExtDstTy);
-
- // If the extended part has any inconsistent bits, it cannot ever
- // compare equal. In other words, they have to be all ones or all
- // zeros.
- uint64_t ExtBits =
- (~0ULL >> (64-ExtSrcTyBits)) & (~0ULL << (ExtDstTyBits-1));
- if ((C2 & ExtBits) != 0 && (C2 & ExtBits) != ExtBits)
- return getConstant(Cond == ISD::SETNE, VT);
-
- // Otherwise, make this a use of a zext.
- return getSetCC(VT, getZeroExtendInReg(N1.getOperand(0), ExtSrcTy),
- getConstant(C2 & (~0ULL>>(64-ExtSrcTyBits)), ExtDstTy),
- Cond);
- }
-
- uint64_t MinVal, MaxVal;
- unsigned OperandBitSize = MVT::getSizeInBits(N2C->getValueType(0));
- if (ISD::isSignedIntSetCC(Cond)) {
- MinVal = 1ULL << (OperandBitSize-1);
- if (OperandBitSize != 1) // Avoid X >> 64, which is undefined.
- MaxVal = ~0ULL >> (65-OperandBitSize);
- else
- MaxVal = 0;
- } else {
- MinVal = 0;
- MaxVal = ~0ULL >> (64-OperandBitSize);
- }
-
- // Canonicalize GE/LE comparisons to use GT/LT comparisons.
- if (Cond == ISD::SETGE || Cond == ISD::SETUGE) {
- if (C2 == MinVal) return getConstant(1, VT); // X >= MIN --> true
- --C2; // X >= C1 --> X > (C1-1)
- return getSetCC(VT, N1, getConstant(C2, N2.getValueType()),
- (Cond == ISD::SETGE) ? ISD::SETGT : ISD::SETUGT);
- }
-
- if (Cond == ISD::SETLE || Cond == ISD::SETULE) {
- if (C2 == MaxVal) return getConstant(1, VT); // X <= MAX --> true
- ++C2; // X <= C1 --> X < (C1+1)
- return getSetCC(VT, N1, getConstant(C2, N2.getValueType()),
- (Cond == ISD::SETLE) ? ISD::SETLT : ISD::SETULT);
- }
-
- if ((Cond == ISD::SETLT || Cond == ISD::SETULT) && C2 == MinVal)
- return getConstant(0, VT); // X < MIN --> false
-
- // Canonicalize setgt X, Min --> setne X, Min
- if ((Cond == ISD::SETGT || Cond == ISD::SETUGT) && C2 == MinVal)
- return getSetCC(VT, N1, N2, ISD::SETNE);
-
- // If we have setult X, 1, turn it into seteq X, 0
- if ((Cond == ISD::SETLT || Cond == ISD::SETULT) && C2 == MinVal+1)
- return getSetCC(VT, N1, getConstant(MinVal, N1.getValueType()),
- ISD::SETEQ);
- // If we have setugt X, Max-1, turn it into seteq X, Max
- else if ((Cond == ISD::SETGT || Cond == ISD::SETUGT) && C2 == MaxVal-1)
- return getSetCC(VT, N1, getConstant(MaxVal, N1.getValueType()),
- ISD::SETEQ);
-
- // If we have "setcc X, C1", check to see if we can shrink the immediate
- // by changing cc.
-
- // SETUGT X, SINTMAX -> SETLT X, 0
- if (Cond == ISD::SETUGT && OperandBitSize != 1 &&
- C2 == (~0ULL >> (65-OperandBitSize)))
- return getSetCC(VT, N1, getConstant(0, N2.getValueType()), ISD::SETLT);
-
- // FIXME: Implement the rest of these.
-
-
- // Fold bit comparisons when we can.
- if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) &&
- VT == N1.getValueType() && N1.getOpcode() == ISD::AND)
- if (ConstantSDNode *AndRHS =
- dyn_cast<ConstantSDNode>(N1.getOperand(1))) {
- if (Cond == ISD::SETNE && C2 == 0) {// (X & 8) != 0 --> (X & 8) >> 3
- // Perform the xform if the AND RHS is a single bit.
- if ((AndRHS->getValue() & (AndRHS->getValue()-1)) == 0) {
- return getNode(ISD::SRL, VT, N1,
- getConstant(Log2_64(AndRHS->getValue()),
- TLI.getShiftAmountTy()));
- }
- } else if (Cond == ISD::SETEQ && C2 == AndRHS->getValue()) {
- // (X & 8) == 8 --> (X & 8) >> 3
- // Perform the xform if C2 is a single bit.
- if ((C2 & (C2-1)) == 0) {
- return getNode(ISD::SRL, VT, N1,
- getConstant(Log2_64(C2),TLI.getShiftAmountTy()));
- }
- }
- }
}
- } else if (isa<ConstantSDNode>(N1.Val)) {
- // Ensure that the constant occurs on the RHS.
- return getSetCC(VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
}
-
if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.Val))
if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.Val)) {
double C1 = N1C->getValue(), C2 = N2C->getValue();
-
+
switch (Cond) {
default: break; // FIXME: Implement the rest of these!
case ISD::SETEQ: return getConstant(C1 == C2, VT);
// Ensure that the constant occurs on the RHS.
return getSetCC(VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
}
-
+
// Could not fold it.
return SDOperand();
}
+/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
+/// this predicate to simplify operations downstream. Mask is known to be zero
+/// for bits that V cannot have.
+bool SelectionDAG::MaskedValueIsZero(SDOperand Op, uint64_t Mask,
+ unsigned Depth) const {
+ // The masks are not wide enough to represent this type! Should use APInt.
+ if (Op.getValueType() == MVT::i128)
+ return false;
+
+ uint64_t KnownZero, KnownOne;
+ ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
+ assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
+ return (KnownZero & Mask) == Mask;
+}
+
+/// ComputeMaskedBits - Determine which of the bits specified in Mask are
+/// known to be either zero or one and return them in the KnownZero/KnownOne
+/// bitsets. This code only analyzes bits in Mask, in order to short-circuit
+/// processing.
+void SelectionDAG::ComputeMaskedBits(SDOperand Op, uint64_t Mask,
+ uint64_t &KnownZero, uint64_t &KnownOne,
+ unsigned Depth) const {
+ KnownZero = KnownOne = 0; // Don't know anything.
+ if (Depth == 6 || Mask == 0)
+ return; // Limit search depth.
+
+ // The masks are not wide enough to represent this type! Should use APInt.
+ if (Op.getValueType() == MVT::i128)
+ return;
+
+ uint64_t KnownZero2, KnownOne2;
+
+ switch (Op.getOpcode()) {
+ case ISD::Constant:
+ // We know all of the bits for a constant!
+ KnownOne = cast<ConstantSDNode>(Op)->getValue() & Mask;
+ KnownZero = ~KnownOne & Mask;
+ return;
+ case ISD::AND:
+ // If either the LHS or the RHS are Zero, the result is zero.
+ ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
+ Mask &= ~KnownZero;
+ ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
+ assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
+ assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
+
+ // Output known-1 bits are only known if set in both the LHS & RHS.
+ KnownOne &= KnownOne2;
+ // Output known-0 are known to be clear if zero in either the LHS | RHS.
+ KnownZero |= KnownZero2;
+ return;
+ case ISD::OR:
+ ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
+ Mask &= ~KnownOne;
+ ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
+ assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
+ assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
+
+ // Output known-0 bits are only known if clear in both the LHS & RHS.
+ KnownZero &= KnownZero2;
+ // Output known-1 are known to be set if set in either the LHS | RHS.
+ KnownOne |= KnownOne2;
+ return;
+ case ISD::XOR: {
+ ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
+ ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
+ assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
+ assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
+
+ // Output known-0 bits are known if clear or set in both the LHS & RHS.
+ uint64_t KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
+ // Output known-1 are known to be set if set in only one of the LHS, RHS.
+ KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
+ KnownZero = KnownZeroOut;
+ return;
+ }
+ case ISD::SELECT:
+ ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1);
+ ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1);
+ assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
+ assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
+
+ // Only known if known in both the LHS and RHS.
+ KnownOne &= KnownOne2;
+ KnownZero &= KnownZero2;
+ return;
+ case ISD::SELECT_CC:
+ ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1);
+ ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1);
+ assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
+ assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
+
+ // Only known if known in both the LHS and RHS.
+ KnownOne &= KnownOne2;
+ KnownZero &= KnownZero2;
+ return;
+ case ISD::SETCC:
+ // If we know the result of a setcc has the top bits zero, use this info.
+ if (TLI.getSetCCResultContents() == TargetLowering::ZeroOrOneSetCCResult)
+ KnownZero |= (MVT::getIntVTBitMask(Op.getValueType()) ^ 1ULL);
+ return;
+ case ISD::SHL:
+ // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
+ if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
+ ComputeMaskedBits(Op.getOperand(0), Mask >> SA->getValue(),
+ KnownZero, KnownOne, Depth+1);
+ assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
+ KnownZero <<= SA->getValue();
+ KnownOne <<= SA->getValue();
+ KnownZero |= (1ULL << SA->getValue())-1; // low bits known zero.
+ }
+ return;
+ case ISD::SRL:
+ // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
+ if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
+ MVT::ValueType VT = Op.getValueType();
+ unsigned ShAmt = SA->getValue();
+
+ uint64_t TypeMask = MVT::getIntVTBitMask(VT);
+ ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt) & TypeMask,
+ KnownZero, KnownOne, Depth+1);
+ assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
+ KnownZero &= TypeMask;
+ KnownOne &= TypeMask;
+ KnownZero >>= ShAmt;
+ KnownOne >>= ShAmt;
+
+ uint64_t HighBits = (1ULL << ShAmt)-1;
+ HighBits <<= MVT::getSizeInBits(VT)-ShAmt;
+ KnownZero |= HighBits; // High bits known zero.
+ }
+ return;
+ case ISD::SRA:
+ if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
+ MVT::ValueType VT = Op.getValueType();
+ unsigned ShAmt = SA->getValue();
+
+ // Compute the new bits that are at the top now.
+ uint64_t TypeMask = MVT::getIntVTBitMask(VT);
+
+ uint64_t InDemandedMask = (Mask << ShAmt) & TypeMask;
+ // If any of the demanded bits are produced by the sign extension, we also
+ // demand the input sign bit.
+ uint64_t HighBits = (1ULL << ShAmt)-1;
+ HighBits <<= MVT::getSizeInBits(VT) - ShAmt;
+ if (HighBits & Mask)
+ InDemandedMask |= MVT::getIntVTSignBit(VT);
+
+ ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne,
+ Depth+1);
+ assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
+ KnownZero &= TypeMask;
+ KnownOne &= TypeMask;
+ KnownZero >>= ShAmt;
+ KnownOne >>= ShAmt;
+
+ // Handle the sign bits.
+ uint64_t SignBit = MVT::getIntVTSignBit(VT);
+ SignBit >>= ShAmt; // Adjust to where it is now in the mask.
+
+ if (KnownZero & SignBit) {
+ KnownZero |= HighBits; // New bits are known zero.
+ } else if (KnownOne & SignBit) {
+ KnownOne |= HighBits; // New bits are known one.
+ }
+ }
+ return;
+ case ISD::SIGN_EXTEND_INREG: {
+ MVT::ValueType EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
+
+ // Sign extension. Compute the demanded bits in the result that are not
+ // present in the input.
+ uint64_t NewBits = ~MVT::getIntVTBitMask(EVT) & Mask;
+
+ uint64_t InSignBit = MVT::getIntVTSignBit(EVT);
+ int64_t InputDemandedBits = Mask & MVT::getIntVTBitMask(EVT);
+
+ // If the sign extended bits are demanded, we know that the sign
+ // bit is demanded.
+ if (NewBits)
+ InputDemandedBits |= InSignBit;
+
+ ComputeMaskedBits(Op.getOperand(0), InputDemandedBits,
+ KnownZero, KnownOne, Depth+1);
+ assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
+
+ // If the sign bit of the input is known set or clear, then we know the
+ // top bits of the result.
+ if (KnownZero & InSignBit) { // Input sign bit known clear
+ KnownZero |= NewBits;
+ KnownOne &= ~NewBits;
+ } else if (KnownOne & InSignBit) { // Input sign bit known set
+ KnownOne |= NewBits;
+ KnownZero &= ~NewBits;
+ } else { // Input sign bit unknown
+ KnownZero &= ~NewBits;
+ KnownOne &= ~NewBits;
+ }
+ return;
+ }
+ case ISD::CTTZ:
+ case ISD::CTLZ:
+ case ISD::CTPOP: {
+ MVT::ValueType VT = Op.getValueType();
+ unsigned LowBits = Log2_32(MVT::getSizeInBits(VT))+1;
+ KnownZero = ~((1ULL << LowBits)-1) & MVT::getIntVTBitMask(VT);
+ KnownOne = 0;
+ return;
+ }
+ case ISD::LOAD: {
+ if (ISD::isZEXTLoad(Op.Val)) {
+ LoadSDNode *LD = cast<LoadSDNode>(Op);
+ MVT::ValueType VT = LD->getLoadedVT();
+ KnownZero |= ~MVT::getIntVTBitMask(VT) & Mask;
+ }
+ return;
+ }
+ case ISD::ZERO_EXTEND: {
+ uint64_t InMask = MVT::getIntVTBitMask(Op.getOperand(0).getValueType());
+ uint64_t NewBits = (~InMask) & Mask;
+ ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
+ KnownOne, Depth+1);
+ KnownZero |= NewBits & Mask;
+ KnownOne &= ~NewBits;
+ return;
+ }
+ case ISD::SIGN_EXTEND: {
+ MVT::ValueType InVT = Op.getOperand(0).getValueType();
+ unsigned InBits = MVT::getSizeInBits(InVT);
+ uint64_t InMask = MVT::getIntVTBitMask(InVT);
+ uint64_t InSignBit = 1ULL << (InBits-1);
+ uint64_t NewBits = (~InMask) & Mask;
+ uint64_t InDemandedBits = Mask & InMask;
+
+ // If any of the sign extended bits are demanded, we know that the sign
+ // bit is demanded.
+ if (NewBits & Mask)
+ InDemandedBits |= InSignBit;
+
+ ComputeMaskedBits(Op.getOperand(0), InDemandedBits, KnownZero,
+ KnownOne, Depth+1);
+ // If the sign bit is known zero or one, the top bits match.
+ if (KnownZero & InSignBit) {
+ KnownZero |= NewBits;
+ KnownOne &= ~NewBits;
+ } else if (KnownOne & InSignBit) {
+ KnownOne |= NewBits;
+ KnownZero &= ~NewBits;
+ } else { // Otherwise, top bits aren't known.
+ KnownOne &= ~NewBits;
+ KnownZero &= ~NewBits;
+ }
+ return;
+ }
+ case ISD::ANY_EXTEND: {
+ MVT::ValueType VT = Op.getOperand(0).getValueType();
+ ComputeMaskedBits(Op.getOperand(0), Mask & MVT::getIntVTBitMask(VT),
+ KnownZero, KnownOne, Depth+1);
+ return;
+ }
+ case ISD::TRUNCATE: {
+ ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
+ assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
+ uint64_t OutMask = MVT::getIntVTBitMask(Op.getValueType());
+ KnownZero &= OutMask;
+ KnownOne &= OutMask;
+ break;
+ }
+ case ISD::AssertZext: {
+ MVT::ValueType VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
+ uint64_t InMask = MVT::getIntVTBitMask(VT);
+ ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
+ KnownOne, Depth+1);
+ KnownZero |= (~InMask) & Mask;
+ return;
+ }
+ case ISD::ADD: {
+ // If either the LHS or the RHS are Zero, the result is zero.
+ ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
+ ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
+ assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
+ assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
+
+ // Output known-0 bits are known if clear or set in both the low clear bits
+ // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
+ // low 3 bits clear.
+ uint64_t KnownZeroOut = std::min(CountTrailingZeros_64(~KnownZero),
+ CountTrailingZeros_64(~KnownZero2));
+
+ KnownZero = (1ULL << KnownZeroOut) - 1;
+ KnownOne = 0;
+ return;
+ }
+ case ISD::SUB: {
+ ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0));
+ if (!CLHS) return;
+
+ // We know that the top bits of C-X are clear if X contains less bits
+ // than C (i.e. no wrap-around can happen). For example, 20-X is
+ // positive if we can prove that X is >= 0 and < 16.
+ MVT::ValueType VT = CLHS->getValueType(0);
+ if ((CLHS->getValue() & MVT::getIntVTSignBit(VT)) == 0) { // sign bit clear
+ unsigned NLZ = CountLeadingZeros_64(CLHS->getValue()+1);
+ uint64_t MaskV = (1ULL << (63-NLZ))-1; // NLZ can't be 64 with no sign bit
+ MaskV = ~MaskV & MVT::getIntVTBitMask(VT);
+ ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero, KnownOne, Depth+1);
+
+ // If all of the MaskV bits are known to be zero, then we know the output
+ // top bits are zero, because we now know that the output is from [0-C].
+ if ((KnownZero & MaskV) == MaskV) {
+ unsigned NLZ2 = CountLeadingZeros_64(CLHS->getValue());
+ KnownZero = ~((1ULL << (64-NLZ2))-1) & Mask; // Top bits known zero.
+ KnownOne = 0; // No one bits known.
+ } else {
+ KnownZero = KnownOne = 0; // Otherwise, nothing known.
+ }
+ }
+ return;
+ }
+ default:
+ // Allow the target to implement this method for its nodes.
+ if (Op.getOpcode() >= ISD::BUILTIN_OP_END) {
+ case ISD::INTRINSIC_WO_CHAIN:
+ case ISD::INTRINSIC_W_CHAIN:
+ case ISD::INTRINSIC_VOID:
+ TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this);
+ }
+ return;
+ }
+}
+
+/// ComputeNumSignBits - Return the number of times the sign bit of the
+/// register is replicated into the other bits. We know that at least 1 bit
+/// is always equal to the sign bit (itself), but other cases can give us
+/// information. For example, immediately after an "SRA X, 2", we know that
+/// the top 3 bits are all equal to each other, so we return 3.
+unsigned SelectionDAG::ComputeNumSignBits(SDOperand Op, unsigned Depth) const{
+ MVT::ValueType VT = Op.getValueType();
+ assert(MVT::isInteger(VT) && "Invalid VT!");
+ unsigned VTBits = MVT::getSizeInBits(VT);
+ unsigned Tmp, Tmp2;
+
+ if (Depth == 6)
+ return 1; // Limit search depth.
+
+ switch (Op.getOpcode()) {
+ default: break;
+ case ISD::AssertSext:
+ Tmp = MVT::getSizeInBits(cast<VTSDNode>(Op.getOperand(1))->getVT());
+ return VTBits-Tmp+1;
+ case ISD::AssertZext:
+ Tmp = MVT::getSizeInBits(cast<VTSDNode>(Op.getOperand(1))->getVT());
+ return VTBits-Tmp;
+
+ case ISD::Constant: {
+ uint64_t Val = cast<ConstantSDNode>(Op)->getValue();
+ // If negative, invert the bits, then look at it.
+ if (Val & MVT::getIntVTSignBit(VT))
+ Val = ~Val;
+
+ // Shift the bits so they are the leading bits in the int64_t.
+ Val <<= 64-VTBits;
+
+ // Return # leading zeros. We use 'min' here in case Val was zero before
+ // shifting. We don't want to return '64' as for an i32 "0".
+ return std::min(VTBits, CountLeadingZeros_64(Val));
+ }
+
+ case ISD::SIGN_EXTEND:
+ Tmp = VTBits-MVT::getSizeInBits(Op.getOperand(0).getValueType());
+ return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
+
+ case ISD::SIGN_EXTEND_INREG:
+ // Max of the input and what this extends.
+ Tmp = MVT::getSizeInBits(cast<VTSDNode>(Op.getOperand(1))->getVT());
+ Tmp = VTBits-Tmp+1;
+
+ Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
+ return std::max(Tmp, Tmp2);
+
+ case ISD::SRA:
+ Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
+ // SRA X, C -> adds C sign bits.
+ if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
+ Tmp += C->getValue();
+ if (Tmp > VTBits) Tmp = VTBits;
+ }
+ return Tmp;
+ case ISD::SHL:
+ if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
+ // shl destroys sign bits.
+ Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
+ if (C->getValue() >= VTBits || // Bad shift.
+ C->getValue() >= Tmp) break; // Shifted all sign bits out.
+ return Tmp - C->getValue();
+ }
+ break;
+ case ISD::AND:
+ case ISD::OR:
+ case ISD::XOR: // NOT is handled here.
+ // Logical binary ops preserve the number of sign bits.
+ Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
+ if (Tmp == 1) return 1; // Early out.
+ Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
+ return std::min(Tmp, Tmp2);
+
+ case ISD::SELECT:
+ Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
+ if (Tmp == 1) return 1; // Early out.
+ Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
+ return std::min(Tmp, Tmp2);
+
+ case ISD::SETCC:
+ // If setcc returns 0/-1, all bits are sign bits.
+ if (TLI.getSetCCResultContents() ==
+ TargetLowering::ZeroOrNegativeOneSetCCResult)
+ return VTBits;
+ break;
+ case ISD::ROTL:
+ case ISD::ROTR:
+ if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
+ unsigned RotAmt = C->getValue() & (VTBits-1);
+
+ // Handle rotate right by N like a rotate left by 32-N.
+ if (Op.getOpcode() == ISD::ROTR)
+ RotAmt = (VTBits-RotAmt) & (VTBits-1);
+
+ // If we aren't rotating out all of the known-in sign bits, return the
+ // number that are left. This handles rotl(sext(x), 1) for example.
+ Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
+ if (Tmp > RotAmt+1) return Tmp-RotAmt;
+ }
+ break;
+ case ISD::ADD:
+ // Add can have at most one carry bit. Thus we know that the output
+ // is, at worst, one more bit than the inputs.
+ Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
+ if (Tmp == 1) return 1; // Early out.
+
+ // Special case decrementing a value (ADD X, -1):
+ if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
+ if (CRHS->isAllOnesValue()) {
+ uint64_t KnownZero, KnownOne;
+ uint64_t Mask = MVT::getIntVTBitMask(VT);
+ ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
+
+ // If the input is known to be 0 or 1, the output is 0/-1, which is all
+ // sign bits set.
+ if ((KnownZero|1) == Mask)
+ return VTBits;
+
+ // If we are subtracting one from a positive number, there is no carry
+ // out of the result.
+ if (KnownZero & MVT::getIntVTSignBit(VT))
+ return Tmp;
+ }
+
+ Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
+ if (Tmp2 == 1) return 1;
+ return std::min(Tmp, Tmp2)-1;
+ break;
+
+ case ISD::SUB:
+ Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
+ if (Tmp2 == 1) return 1;
+
+ // Handle NEG.
+ if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
+ if (CLHS->getValue() == 0) {
+ uint64_t KnownZero, KnownOne;
+ uint64_t Mask = MVT::getIntVTBitMask(VT);
+ ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
+ // If the input is known to be 0 or 1, the output is 0/-1, which is all
+ // sign bits set.
+ if ((KnownZero|1) == Mask)
+ return VTBits;
+
+ // If the input is known to be positive (the sign bit is known clear),
+ // the output of the NEG has the same number of sign bits as the input.
+ if (KnownZero & MVT::getIntVTSignBit(VT))
+ return Tmp2;
+
+ // Otherwise, we treat this like a SUB.
+ }
+
+ // Sub can have at most one carry bit. Thus we know that the output
+ // is, at worst, one more bit than the inputs.
+ Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
+ if (Tmp == 1) return 1; // Early out.
+ return std::min(Tmp, Tmp2)-1;
+ break;
+ case ISD::TRUNCATE:
+ // FIXME: it's tricky to do anything useful for this, but it is an important
+ // case for targets like X86.
+ break;
+ }
+
+ // Handle LOADX separately here. EXTLOAD case will fallthrough.
+ if (Op.getOpcode() == ISD::LOAD) {
+ LoadSDNode *LD = cast<LoadSDNode>(Op);
+ unsigned ExtType = LD->getExtensionType();
+ switch (ExtType) {
+ default: break;
+ case ISD::SEXTLOAD: // '17' bits known
+ Tmp = MVT::getSizeInBits(LD->getLoadedVT());
+ return VTBits-Tmp+1;
+ case ISD::ZEXTLOAD: // '16' bits known
+ Tmp = MVT::getSizeInBits(LD->getLoadedVT());
+ return VTBits-Tmp;
+ }
+ }
+
+ // Allow the target to implement this method for its nodes.
+ if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
+ Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
+ Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
+ Op.getOpcode() == ISD::INTRINSIC_VOID) {
+ unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
+ if (NumBits > 1) return NumBits;
+ }
+
+ // Finally, if we can prove that the top bits of the result are 0's or 1's,
+ // use this information.
+ uint64_t KnownZero, KnownOne;
+ uint64_t Mask = MVT::getIntVTBitMask(VT);
+ ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
+
+ uint64_t SignBit = MVT::getIntVTSignBit(VT);
+ if (KnownZero & SignBit) { // SignBit is 0
+ Mask = KnownZero;
+ } else if (KnownOne & SignBit) { // SignBit is 1;
+ Mask = KnownOne;
+ } else {
+ // Nothing known.
+ return 1;
+ }
+
+ // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
+ // the number of identical bits in the top of the input value.
+ Mask ^= ~0ULL;
+ Mask <<= 64-VTBits;
+ // Return # leading zeros. We use 'min' here in case Val was zero before
+ // shifting. We don't want to return '64' as for an i32 "0".
+ return std::min(VTBits, CountLeadingZeros_64(Mask));
+}
+
+
/// getNode - Gets or creates the specified node.
///
SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT) {
- SelectionDAGCSEMap::NodeID ID(Opcode, getVTList(VT));
+ FoldingSetNodeID ID;
+ AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
void *IP = 0;
if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
return SDOperand(E, 0);
- SDNode *N = new SDNode(Opcode, VT);
+ SDNode *N = new SDNode(Opcode, SDNode::getSDVTList(VT));
CSEMap.InsertNode(N, IP);
AllNodes.push_back(N);
switch (Opcode) {
case ISD::TokenFactor:
return Operand; // Factor of one node? No factor.
+ case ISD::FP_ROUND:
+ case ISD::FP_EXTEND:
+ assert(MVT::isFloatingPoint(VT) &&
+ MVT::isFloatingPoint(Operand.getValueType()) && "Invalid FP cast!");
+ break;
case ISD::SIGN_EXTEND:
+ assert(MVT::isInteger(VT) && MVT::isInteger(Operand.getValueType()) &&
+ "Invalid SIGN_EXTEND!");
if (Operand.getValueType() == VT) return Operand; // noop extension
assert(Operand.getValueType() < VT && "Invalid sext node, dst < src!");
if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
return getNode(OpOpcode, VT, Operand.Val->getOperand(0));
break;
case ISD::ZERO_EXTEND:
+ assert(MVT::isInteger(VT) && MVT::isInteger(Operand.getValueType()) &&
+ "Invalid ZERO_EXTEND!");
if (Operand.getValueType() == VT) return Operand; // noop extension
assert(Operand.getValueType() < VT && "Invalid zext node, dst < src!");
if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
return getNode(ISD::ZERO_EXTEND, VT, Operand.Val->getOperand(0));
break;
case ISD::ANY_EXTEND:
+ assert(MVT::isInteger(VT) && MVT::isInteger(Operand.getValueType()) &&
+ "Invalid ANY_EXTEND!");
if (Operand.getValueType() == VT) return Operand; // noop extension
assert(Operand.getValueType() < VT && "Invalid anyext node, dst < src!");
if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND)
return getNode(OpOpcode, VT, Operand.Val->getOperand(0));
break;
case ISD::TRUNCATE:
+ assert(MVT::isInteger(VT) && MVT::isInteger(Operand.getValueType()) &&
+ "Invalid TRUNCATE!");
if (Operand.getValueType() == VT) return Operand; // noop truncate
assert(Operand.getValueType() > VT && "Invalid truncate node, src < dst!");
if (OpOpcode == ISD::TRUNCATE)
case ISD::BIT_CONVERT:
// Basic sanity checking.
assert(MVT::getSizeInBits(VT) == MVT::getSizeInBits(Operand.getValueType())
- && "Cannot BIT_CONVERT between two different types!");
+ && "Cannot BIT_CONVERT between types of different sizes!");
if (VT == Operand.getValueType()) return Operand; // noop conversion.
if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x)
return getNode(ISD::BIT_CONVERT, VT, Operand.getOperand(0));
break;
case ISD::SCALAR_TO_VECTOR:
assert(MVT::isVector(VT) && !MVT::isVector(Operand.getValueType()) &&
- MVT::getVectorBaseType(VT) == Operand.getValueType() &&
+ MVT::getVectorElementType(VT) == Operand.getValueType() &&
"Illegal SCALAR_TO_VECTOR node!");
break;
case ISD::FNEG:
SDNode *N;
SDVTList VTs = getVTList(VT);
if (VT != MVT::Flag) { // Don't CSE flag producing nodes
- SelectionDAGCSEMap::NodeID ID(Opcode, VTs, Operand);
+ FoldingSetNodeID ID;
+ SDOperand Ops[1] = { Operand };
+ AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
void *IP = 0;
if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
return SDOperand(E, 0);
- N = new SDNode(Opcode, Operand);
- N->setValueTypes(VTs);
+ N = new UnarySDNode(Opcode, VTs, Operand);
CSEMap.InsertNode(N, IP);
} else {
- N = new SDNode(Opcode, Operand);
- N->setValueTypes(VTs);
+ N = new UnarySDNode(Opcode, VTs, Operand);
}
AllNodes.push_back(N);
return SDOperand(N, 0);
double F;
uint64_t I;
} u1;
- union {
- double F;
- int64_t I;
- } u2;
u1.F = C1;
- u2.F = C2;
- if (u2.I < 0) // Sign bit of RHS set?
+ if (int64_t(DoubleToBits(C2)) < 0) // Sign bit of RHS set?
u1.I |= 1ULL << 63; // Set the sign bit of the LHS.
else
u1.I &= (1ULL << 63)-1; // Clear the sign bit of the LHS.
case ISD::SREM:
case ISD::SRL:
case ISD::SHL:
- return getConstant(0, VT); // fold op(undef, arg2) -> 0
+ if (!MVT::isVector(VT))
+ return getConstant(0, VT); // fold op(undef, arg2) -> 0
+ // For vectors, we can't easily build an all zero vector, just return
+ // the LHS.
+ return N2;
}
}
}
if (N2.getOpcode() == ISD::UNDEF) {
switch (Opcode) {
case ISD::ADD:
+ case ISD::ADDC:
+ case ISD::ADDE:
case ISD::SUB:
case ISD::FADD:
case ISD::FSUB:
case ISD::AND:
case ISD::SRL:
case ISD::SHL:
- return getConstant(0, VT); // fold op(arg1, undef) -> 0
+ if (!MVT::isVector(VT))
+ return getConstant(0, VT); // fold op(arg1, undef) -> 0
+ // For vectors, we can't easily build an all zero vector, just return
+ // the LHS.
+ return N1;
case ISD::OR:
- return getConstant(MVT::getIntVTBitMask(VT), VT);
+ if (!MVT::isVector(VT))
+ return getConstant(MVT::getIntVTBitMask(VT), VT);
+ // For vectors, we can't easily build an all one vector, just return
+ // the LHS.
+ return N1;
case ISD::SRA:
return N1;
}
}
- // Finally, fold operations that do not require constants.
+ // Fold operations.
switch (Opcode) {
+ case ISD::TokenFactor:
+ // Fold trivial token factors.
+ if (N1.getOpcode() == ISD::EntryToken) return N2;
+ if (N2.getOpcode() == ISD::EntryToken) return N1;
+ break;
+
+ case ISD::AND:
+ // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
+ // worth handling here.
+ if (N2C && N2C->getValue() == 0)
+ return N2;
+ break;
+ case ISD::OR:
+ case ISD::XOR:
+ // (X ^| 0) -> X. This commonly occurs when legalizing i64 values, so it's
+ // worth handling here.
+ if (N2C && N2C->getValue() == 0)
+ return N1;
+ break;
case ISD::FP_ROUND_INREG:
if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
break;
if (EVT == VT) return N1; // Not actually extending
break;
}
+ case ISD::EXTRACT_VECTOR_ELT:
+ assert(N2C && "Bad EXTRACT_VECTOR_ELT!");
+
+ // EXTRACT_VECTOR_ELT of BUILD_PAIR is often formed while lowering is
+ // expanding copies of large vectors from registers.
+ if (N1.getOpcode() == ISD::BUILD_PAIR) {
+ unsigned NewNumElts = MVT::getVectorNumElements(N1.getValueType()) / 2;
+ bool Low = N2C->getValue() < NewNumElts;
+ return getNode(ISD::EXTRACT_VECTOR_ELT, VT, N1.getOperand(!Low),
+ Low ? N2 : getConstant(N2C->getValue() - NewNumElts,
+ N2.getValueType()));
+ }
+ // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
+ // expanding large vector constants.
+ if (N1.getOpcode() == ISD::BUILD_VECTOR)
+ return N1.getOperand(N2C->getValue());
+ break;
case ISD::EXTRACT_ELEMENT:
assert(N2C && (unsigned)N2C->getValue() < 2 && "Bad EXTRACT_ELEMENT!");
SDNode *N;
SDVTList VTs = getVTList(VT);
if (VT != MVT::Flag) {
- SelectionDAGCSEMap::NodeID ID(Opcode, VTs, N1, N2);
+ SDOperand Ops[] = { N1, N2 };
+ FoldingSetNodeID ID;
+ AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
void *IP = 0;
if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
return SDOperand(E, 0);
- N = new SDNode(Opcode, N1, N2);
- N->setValueTypes(VTs);
+ N = new BinarySDNode(Opcode, VTs, N1, N2);
CSEMap.InsertNode(N, IP);
} else {
- N = new SDNode(Opcode, N1, N2);
- N->setValueTypes(VTs);
+ N = new BinarySDNode(Opcode, VTs, N1, N2);
}
AllNodes.push_back(N);
// Perform various simplifications.
ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val);
ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val);
- //ConstantSDNode *N3C = dyn_cast<ConstantSDNode>(N3.Val);
switch (Opcode) {
case ISD::SETCC: {
- // Use SimplifySetCC to simplify SETCC's.
- SDOperand Simp = SimplifySetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get());
+ // Use FoldSetCC to simplify SETCC's.
+ SDOperand Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get());
if (Simp.Val) return Simp;
break;
}
MVT::getVectorNumElements(VT) == N3.getNumOperands() &&
"Illegal VECTOR_SHUFFLE node!");
break;
+ case ISD::BIT_CONVERT:
+ // Fold bit_convert nodes from a type to themselves.
+ if (N1.getValueType() == VT)
+ return N1;
+ break;
}
// Memoize node if it doesn't produce a flag.
SDNode *N;
SDVTList VTs = getVTList(VT);
if (VT != MVT::Flag) {
- SelectionDAGCSEMap::NodeID ID(Opcode, VTs, N1, N2, N3);
+ SDOperand Ops[] = { N1, N2, N3 };
+ FoldingSetNodeID ID;
+ AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
void *IP = 0;
if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
return SDOperand(E, 0);
- N = new SDNode(Opcode, N1, N2, N3);
- N->setValueTypes(VTs);
+ N = new TernarySDNode(Opcode, VTs, N1, N2, N3);
CSEMap.InsertNode(N, IP);
} else {
- N = new SDNode(Opcode, N1, N2, N3);
- N->setValueTypes(VTs);
+ N = new TernarySDNode(Opcode, VTs, N1, N2, N3);
}
AllNodes.push_back(N);
return SDOperand(N, 0);
SDOperand SelectionDAG::getLoad(MVT::ValueType VT,
SDOperand Chain, SDOperand Ptr,
const Value *SV, int SVOffset,
- bool isVolatile) {
- // FIXME: Alignment == 1 for now.
- unsigned Alignment = 1;
+ bool isVolatile, unsigned Alignment) {
+ if (Alignment == 0) { // Ensure that codegen never sees alignment 0
+ const Type *Ty = 0;
+ if (VT != MVT::iPTR) {
+ Ty = MVT::getTypeForValueType(VT);
+ } else if (SV) {
+ const PointerType *PT = dyn_cast<PointerType>(SV->getType());
+ assert(PT && "Value for load must be a pointer");
+ Ty = PT->getElementType();
+ }
+ assert(Ty && "Could not get type information for load");
+ Alignment = TLI.getTargetData()->getABITypeAlignment(Ty);
+ }
SDVTList VTs = getVTList(VT, MVT::Other);
- SDOperand Undef = getNode(ISD::UNDEF, VT);
- SelectionDAGCSEMap::NodeID ID(ISD::LOAD, VTs, Chain, Ptr, Undef);
+ SDOperand Undef = getNode(ISD::UNDEF, Ptr.getValueType());
+ SDOperand Ops[] = { Chain, Ptr, Undef };
+ FoldingSetNodeID ID;
+ AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
ID.AddInteger(ISD::UNINDEXED);
ID.AddInteger(ISD::NON_EXTLOAD);
ID.AddInteger(VT);
void *IP = 0;
if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
return SDOperand(E, 0);
- SDNode *N = new LoadSDNode(Chain, Ptr, Undef, ISD::NON_EXTLOAD, VT,
- SV, SVOffset, Alignment, isVolatile);
- N->setValueTypes(VTs);
+ SDNode *N = new LoadSDNode(Ops, VTs, ISD::UNINDEXED,
+ ISD::NON_EXTLOAD, VT, SV, SVOffset, Alignment,
+ isVolatile);
CSEMap.InsertNode(N, IP);
AllNodes.push_back(N);
return SDOperand(N, 0);
}
SDOperand SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, MVT::ValueType VT,
- SDOperand Chain, SDOperand Ptr, const Value *SV,
+ SDOperand Chain, SDOperand Ptr,
+ const Value *SV,
int SVOffset, MVT::ValueType EVT,
- bool isVolatile) {
+ bool isVolatile, unsigned Alignment) {
// If they are asking for an extending load from/to the same thing, return a
// normal load.
if (VT == EVT)
ExtType = ISD::NON_EXTLOAD;
if (MVT::isVector(VT))
- assert(EVT == MVT::getVectorBaseType(VT) && "Invalid vector extload!");
+ assert(EVT == MVT::getVectorElementType(VT) && "Invalid vector extload!");
else
assert(EVT < VT && "Should only be an extending load, not truncating!");
assert((ExtType == ISD::EXTLOAD || MVT::isInteger(VT)) &&
assert(MVT::isInteger(VT) == MVT::isInteger(EVT) &&
"Cannot convert from FP to Int or Int -> FP!");
- // FIXME: Alignment == 1 for now.
- unsigned Alignment = 1;
+ if (Alignment == 0) { // Ensure that codegen never sees alignment 0
+ const Type *Ty = 0;
+ if (VT != MVT::iPTR) {
+ Ty = MVT::getTypeForValueType(VT);
+ } else if (SV) {
+ const PointerType *PT = dyn_cast<PointerType>(SV->getType());
+ assert(PT && "Value for load must be a pointer");
+ Ty = PT->getElementType();
+ }
+ assert(Ty && "Could not get type information for load");
+ Alignment = TLI.getTargetData()->getABITypeAlignment(Ty);
+ }
SDVTList VTs = getVTList(VT, MVT::Other);
- SDOperand Undef = getNode(ISD::UNDEF, VT);
- SelectionDAGCSEMap::NodeID ID(ISD::LOAD, VTs, Chain, Ptr, Undef);
+ SDOperand Undef = getNode(ISD::UNDEF, Ptr.getValueType());
+ SDOperand Ops[] = { Chain, Ptr, Undef };
+ FoldingSetNodeID ID;
+ AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
ID.AddInteger(ISD::UNINDEXED);
ID.AddInteger(ExtType);
ID.AddInteger(EVT);
void *IP = 0;
if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
return SDOperand(E, 0);
- SDNode *N = new LoadSDNode(Chain, Ptr, Undef, ExtType, EVT, SV, SVOffset,
- Alignment, isVolatile);
- N->setValueTypes(VTs);
+ SDNode *N = new LoadSDNode(Ops, VTs, ISD::UNINDEXED, ExtType, EVT,
+ SV, SVOffset, Alignment, isVolatile);
CSEMap.InsertNode(N, IP);
AllNodes.push_back(N);
return SDOperand(N, 0);
}
-SDOperand SelectionDAG::getVecLoad(unsigned Count, MVT::ValueType EVT,
- SDOperand Chain, SDOperand Ptr,
- SDOperand SV) {
- SDOperand Ops[] = { Chain, Ptr, SV, getConstant(Count, MVT::i32),
- getValueType(EVT) };
- return getNode(ISD::VLOAD, getVTList(MVT::Vector, MVT::Other), Ops, 5);
+SDOperand
+SelectionDAG::getIndexedLoad(SDOperand OrigLoad, SDOperand Base,
+ SDOperand Offset, ISD::MemIndexedMode AM) {
+ LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
+ assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
+ "Load is already a indexed load!");
+ MVT::ValueType VT = OrigLoad.getValueType();
+ SDVTList VTs = getVTList(VT, Base.getValueType(), MVT::Other);
+ SDOperand Ops[] = { LD->getChain(), Base, Offset };
+ FoldingSetNodeID ID;
+ AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
+ ID.AddInteger(AM);
+ ID.AddInteger(LD->getExtensionType());
+ ID.AddInteger(LD->getLoadedVT());
+ ID.AddPointer(LD->getSrcValue());
+ ID.AddInteger(LD->getSrcValueOffset());
+ ID.AddInteger(LD->getAlignment());
+ ID.AddInteger(LD->isVolatile());
+ void *IP = 0;
+ if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
+ return SDOperand(E, 0);
+ SDNode *N = new LoadSDNode(Ops, VTs, AM,
+ LD->getExtensionType(), LD->getLoadedVT(),
+ LD->getSrcValue(), LD->getSrcValueOffset(),
+ LD->getAlignment(), LD->isVolatile());
+ CSEMap.InsertNode(N, IP);
+ AllNodes.push_back(N);
+ return SDOperand(N, 0);
}
-SDOperand SelectionDAG::getStore(SDOperand Chain, SDOperand Value,
- SDOperand Ptr, SDOperand SV) {
+SDOperand SelectionDAG::getStore(SDOperand Chain, SDOperand Val,
+ SDOperand Ptr, const Value *SV, int SVOffset,
+ bool isVolatile, unsigned Alignment) {
+ MVT::ValueType VT = Val.getValueType();
+
+ if (Alignment == 0) { // Ensure that codegen never sees alignment 0
+ const Type *Ty = 0;
+ if (VT != MVT::iPTR) {
+ Ty = MVT::getTypeForValueType(VT);
+ } else if (SV) {
+ const PointerType *PT = dyn_cast<PointerType>(SV->getType());
+ assert(PT && "Value for store must be a pointer");
+ Ty = PT->getElementType();
+ }
+ assert(Ty && "Could not get type information for store");
+ Alignment = TLI.getTargetData()->getABITypeAlignment(Ty);
+ }
SDVTList VTs = getVTList(MVT::Other);
- SDOperand Ops[] = { Chain, Value, Ptr, SV };
- SelectionDAGCSEMap::NodeID ID(ISD::STORE, VTs, Ops, 4);
+ SDOperand Undef = getNode(ISD::UNDEF, Ptr.getValueType());
+ SDOperand Ops[] = { Chain, Val, Ptr, Undef };
+ FoldingSetNodeID ID;
+ AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
+ ID.AddInteger(ISD::UNINDEXED);
+ ID.AddInteger(false);
+ ID.AddInteger(VT);
+ ID.AddPointer(SV);
+ ID.AddInteger(SVOffset);
+ ID.AddInteger(Alignment);
+ ID.AddInteger(isVolatile);
void *IP = 0;
if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
return SDOperand(E, 0);
- SDNode *N = new SDNode(ISD::STORE, Chain, Value, Ptr, SV);
- N->setValueTypes(VTs);
+ SDNode *N = new StoreSDNode(Ops, VTs, ISD::UNINDEXED, false,
+ VT, SV, SVOffset, Alignment, isVolatile);
+ CSEMap.InsertNode(N, IP);
+ AllNodes.push_back(N);
+ return SDOperand(N, 0);
+}
+
+SDOperand SelectionDAG::getTruncStore(SDOperand Chain, SDOperand Val,
+ SDOperand Ptr, const Value *SV,
+ int SVOffset, MVT::ValueType SVT,
+ bool isVolatile, unsigned Alignment) {
+ MVT::ValueType VT = Val.getValueType();
+ bool isTrunc = VT != SVT;
+
+ assert(VT > SVT && "Not a truncation?");
+ assert(MVT::isInteger(VT) == MVT::isInteger(SVT) &&
+ "Can't do FP-INT conversion!");
+
+ if (Alignment == 0) { // Ensure that codegen never sees alignment 0
+ const Type *Ty = 0;
+ if (VT != MVT::iPTR) {
+ Ty = MVT::getTypeForValueType(VT);
+ } else if (SV) {
+ const PointerType *PT = dyn_cast<PointerType>(SV->getType());
+ assert(PT && "Value for store must be a pointer");
+ Ty = PT->getElementType();
+ }
+ assert(Ty && "Could not get type information for store");
+ Alignment = TLI.getTargetData()->getABITypeAlignment(Ty);
+ }
+ SDVTList VTs = getVTList(MVT::Other);
+ SDOperand Undef = getNode(ISD::UNDEF, Ptr.getValueType());
+ SDOperand Ops[] = { Chain, Val, Ptr, Undef };
+ FoldingSetNodeID ID;
+ AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
+ ID.AddInteger(ISD::UNINDEXED);
+ ID.AddInteger(isTrunc);
+ ID.AddInteger(SVT);
+ ID.AddPointer(SV);
+ ID.AddInteger(SVOffset);
+ ID.AddInteger(Alignment);
+ ID.AddInteger(isVolatile);
+ void *IP = 0;
+ if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
+ return SDOperand(E, 0);
+ SDNode *N = new StoreSDNode(Ops, VTs, ISD::UNINDEXED, isTrunc,
+ SVT, SV, SVOffset, Alignment, isVolatile);
+ CSEMap.InsertNode(N, IP);
+ AllNodes.push_back(N);
+ return SDOperand(N, 0);
+}
+
+SDOperand
+SelectionDAG::getIndexedStore(SDOperand OrigStore, SDOperand Base,
+ SDOperand Offset, ISD::MemIndexedMode AM) {
+ StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
+ assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
+ "Store is already a indexed store!");
+ SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
+ SDOperand Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
+ FoldingSetNodeID ID;
+ AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
+ ID.AddInteger(AM);
+ ID.AddInteger(ST->isTruncatingStore());
+ ID.AddInteger(ST->getStoredVT());
+ ID.AddPointer(ST->getSrcValue());
+ ID.AddInteger(ST->getSrcValueOffset());
+ ID.AddInteger(ST->getAlignment());
+ ID.AddInteger(ST->isVolatile());
+ void *IP = 0;
+ if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
+ return SDOperand(E, 0);
+ SDNode *N = new StoreSDNode(Ops, VTs, AM,
+ ST->isTruncatingStore(), ST->getStoredVT(),
+ ST->getSrcValue(), ST->getSrcValueOffset(),
+ ST->getAlignment(), ST->isVolatile());
CSEMap.InsertNode(N, IP);
AllNodes.push_back(N);
return SDOperand(N, 0);
switch (Opcode) {
default: break;
- case ISD::TRUNCSTORE: {
- assert(NumOps == 5 && "TRUNCSTORE takes 5 operands!");
- MVT::ValueType EVT = cast<VTSDNode>(Ops[4])->getVT();
-#if 0 // FIXME: If the target supports EVT natively, convert to a truncate/store
- // If this is a truncating store of a constant, convert to the desired type
- // and store it instead.
- if (isa<Constant>(Ops[0])) {
- SDOperand Op = getNode(ISD::TRUNCATE, EVT, N1);
- if (isa<Constant>(Op))
- N1 = Op;
- }
- // Also for ConstantFP?
-#endif
- if (Ops[0].getValueType() == EVT) // Normal store?
- return getStore(Ops[0], Ops[1], Ops[2], Ops[3]);
- assert(Ops[1].getValueType() > EVT && "Not a truncation?");
- assert(MVT::isInteger(Ops[1].getValueType()) == MVT::isInteger(EVT) &&
- "Can't do FP-INT conversion!");
- break;
- }
case ISD::SELECT_CC: {
assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
assert(Ops[0].getValueType() == Ops[1].getValueType() &&
SDNode *N;
SDVTList VTs = getVTList(VT);
if (VT != MVT::Flag) {
- SelectionDAGCSEMap::NodeID ID(Opcode, VTs, Ops, NumOps);
+ FoldingSetNodeID ID;
+ AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
void *IP = 0;
if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
return SDOperand(E, 0);
- N = new SDNode(Opcode, Ops, NumOps);
- N->setValueTypes(VTs);
+ N = new SDNode(Opcode, VTs, Ops, NumOps);
CSEMap.InsertNode(N, IP);
} else {
- N = new SDNode(Opcode, Ops, NumOps);
- N->setValueTypes(VTs);
+ N = new SDNode(Opcode, VTs, Ops, NumOps);
}
AllNodes.push_back(N);
return SDOperand(N, 0);
// Memoize the node unless it returns a flag.
SDNode *N;
if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
- SelectionDAGCSEMap::NodeID ID;
- ID.SetOpcode(Opcode);
- ID.SetValueTypes(VTList);
- ID.SetOperands(&Ops[0], NumOps);
+ FoldingSetNodeID ID;
+ AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
void *IP = 0;
if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
return SDOperand(E, 0);
- N = new SDNode(Opcode, Ops, NumOps);
- N->setValueTypes(VTList);
+ if (NumOps == 1)
+ N = new UnarySDNode(Opcode, VTList, Ops[0]);
+ else if (NumOps == 2)
+ N = new BinarySDNode(Opcode, VTList, Ops[0], Ops[1]);
+ else if (NumOps == 3)
+ N = new TernarySDNode(Opcode, VTList, Ops[0], Ops[1], Ops[2]);
+ else
+ N = new SDNode(Opcode, VTList, Ops, NumOps);
CSEMap.InsertNode(N, IP);
} else {
- N = new SDNode(Opcode, Ops, NumOps);
- N->setValueTypes(VTList);
+ if (NumOps == 1)
+ N = new UnarySDNode(Opcode, VTList, Ops[0]);
+ else if (NumOps == 2)
+ N = new BinarySDNode(Opcode, VTList, Ops[0], Ops[1]);
+ else if (NumOps == 3)
+ N = new TernarySDNode(Opcode, VTList, Ops[0], Ops[1], Ops[2]);
+ else
+ N = new SDNode(Opcode, VTList, Ops, NumOps);
}
AllNodes.push_back(N);
return SDOperand(N, 0);
}
SDVTList SelectionDAG::getVTList(MVT::ValueType VT) {
- return makeVTList(SDNode::getValueTypeList(VT), 1);
+ if (!MVT::isExtendedVT(VT))
+ return makeVTList(SDNode::getValueTypeList(VT), 1);
+
+ for (std::list<std::vector<MVT::ValueType> >::iterator I = VTList.begin(),
+ E = VTList.end(); I != E; ++I) {
+ if (I->size() == 1 && (*I)[0] == VT)
+ return makeVTList(&(*I)[0], 1);
+ }
+ std::vector<MVT::ValueType> V;
+ V.push_back(VT);
+ VTList.push_front(V);
+ return makeVTList(&(*VTList.begin())[0], 1);
}
SDVTList SelectionDAG::getVTList(MVT::ValueType VT1, MVT::ValueType VT2) {
SDVTList SelectionDAG::getVTList(const MVT::ValueType *VTs, unsigned NumVTs) {
switch (NumVTs) {
case 0: assert(0 && "Cannot have nodes without results!");
- case 1: return makeVTList(SDNode::getValueTypeList(VTs[0]), 1);
+ case 1: return getVTList(VTs[0]);
case 2: return getVTList(VTs[0], VTs[1]);
case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
default: break;
assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
// Check to see if there is no change.
- bool AnyChange = false;
if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
return InN; // No operands changed, just return the input node.
}
-
+/// MorphNodeTo - This frees the operands of the current node, resets the
+/// opcode, types, and operands to the specified value. This should only be
+/// used by the SelectionDAG class.
+void SDNode::MorphNodeTo(unsigned Opc, SDVTList L,
+ const SDOperand *Ops, unsigned NumOps) {
+ NodeType = Opc;
+ ValueList = L.VTs;
+ NumValues = L.NumVTs;
+
+ // Clear the operands list, updating used nodes to remove this from their
+ // use list.
+ for (op_iterator I = op_begin(), E = op_end(); I != E; ++I)
+ I->Val->removeUser(this);
+
+ // If NumOps is larger than the # of operands we currently have, reallocate
+ // the operand list.
+ if (NumOps > NumOperands) {
+ if (OperandsNeedDelete)
+ delete [] OperandList;
+ OperandList = new SDOperand[NumOps];
+ OperandsNeedDelete = true;
+ }
+
+ // Assign the new operands.
+ NumOperands = NumOps;
+
+ for (unsigned i = 0, e = NumOps; i != e; ++i) {
+ OperandList[i] = Ops[i];
+ SDNode *N = OperandList[i].Val;
+ N->Uses.push_back(this);
+ }
+}
/// SelectNodeTo - These are used for target selectors to *mutate* the
/// specified node to have the specified return type, Target opcode, and
SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
MVT::ValueType VT) {
SDVTList VTs = getVTList(VT);
- SelectionDAGCSEMap::NodeID ID(ISD::BUILTIN_OP_END+TargetOpc, VTs);
+ FoldingSetNodeID ID;
+ AddNodeIDNode(ID, ISD::BUILTIN_OP_END+TargetOpc, VTs, 0, 0);
void *IP = 0;
if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
return ON;
RemoveNodeFromCSEMaps(N);
- N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc);
- N->setValueTypes(VTs);
+ N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc, VTs, 0, 0);
CSEMap.InsertNode(N, IP);
return N;
MVT::ValueType VT, SDOperand Op1) {
// If an identical node already exists, use it.
SDVTList VTs = getVTList(VT);
- SelectionDAGCSEMap::NodeID ID(ISD::BUILTIN_OP_END+TargetOpc, VTs, Op1);
+ SDOperand Ops[] = { Op1 };
+
+ FoldingSetNodeID ID;
+ AddNodeIDNode(ID, ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 1);
void *IP = 0;
if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
return ON;
RemoveNodeFromCSEMaps(N);
- N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc);
- N->setValueTypes(VTs);
- N->setOperands(Op1);
+ N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 1);
CSEMap.InsertNode(N, IP);
return N;
}
SDOperand Op2) {
// If an identical node already exists, use it.
SDVTList VTs = getVTList(VT);
- SelectionDAGCSEMap::NodeID ID(ISD::BUILTIN_OP_END+TargetOpc, VTs, Op1, Op2);
+ SDOperand Ops[] = { Op1, Op2 };
+
+ FoldingSetNodeID ID;
+ AddNodeIDNode(ID, ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 2);
void *IP = 0;
if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
return ON;
RemoveNodeFromCSEMaps(N);
- N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc);
- N->setValueTypes(VTs);
- N->setOperands(Op1, Op2);
+
+ N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 2);
CSEMap.InsertNode(N, IP); // Memoize the new node.
return N;
SDOperand Op2, SDOperand Op3) {
// If an identical node already exists, use it.
SDVTList VTs = getVTList(VT);
- SelectionDAGCSEMap::NodeID ID(ISD::BUILTIN_OP_END+TargetOpc, VTs,
- Op1, Op2, Op3);
+ SDOperand Ops[] = { Op1, Op2, Op3 };
+ FoldingSetNodeID ID;
+ AddNodeIDNode(ID, ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 3);
void *IP = 0;
if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
return ON;
RemoveNodeFromCSEMaps(N);
- N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc);
- N->setValueTypes(VTs);
- N->setOperands(Op1, Op2, Op3);
+
+ N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 3);
CSEMap.InsertNode(N, IP); // Memoize the new node.
return N;
unsigned NumOps) {
// If an identical node already exists, use it.
SDVTList VTs = getVTList(VT);
- SelectionDAGCSEMap::NodeID ID(ISD::BUILTIN_OP_END+TargetOpc, VTs);
- for (unsigned i = 0; i != NumOps; ++i)
- ID.AddOperand(Ops[i]);
+ FoldingSetNodeID ID;
+ AddNodeIDNode(ID, ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, NumOps);
void *IP = 0;
if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
return ON;
RemoveNodeFromCSEMaps(N);
- N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc);
- N->setValueTypes(VTs);
- N->setOperands(Ops, NumOps);
+ N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, NumOps);
CSEMap.InsertNode(N, IP); // Memoize the new node.
return N;
MVT::ValueType VT1, MVT::ValueType VT2,
SDOperand Op1, SDOperand Op2) {
SDVTList VTs = getVTList(VT1, VT2);
- SelectionDAGCSEMap::NodeID ID(ISD::BUILTIN_OP_END+TargetOpc, VTs, Op1, Op2);
+ FoldingSetNodeID ID;
+ SDOperand Ops[] = { Op1, Op2 };
+ AddNodeIDNode(ID, ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 2);
void *IP = 0;
if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
return ON;
RemoveNodeFromCSEMaps(N);
- N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc);
- N->setValueTypes(VTs);
- N->setOperands(Op1, Op2);
-
+ N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 2);
CSEMap.InsertNode(N, IP); // Memoize the new node.
return N;
}
SDOperand Op3) {
// If an identical node already exists, use it.
SDVTList VTs = getVTList(VT1, VT2);
- SelectionDAGCSEMap::NodeID ID(ISD::BUILTIN_OP_END+TargetOpc, VTs,
- Op1, Op2, Op3);
+ SDOperand Ops[] = { Op1, Op2, Op3 };
+ FoldingSetNodeID ID;
+ AddNodeIDNode(ID, ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 3);
void *IP = 0;
if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
return ON;
RemoveNodeFromCSEMaps(N);
- N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc);
- N->setValueTypes(VTs);
- N->setOperands(Op1, Op2, Op3);
-
+
+ N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 3);
CSEMap.InsertNode(N, IP); // Memoize the new node.
return N;
}
return getNode(ISD::BUILTIN_OP_END+Opcode, VT, Op1, Op2).Val;
}
SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT::ValueType VT,
- SDOperand Op1, SDOperand Op2, SDOperand Op3) {
+ SDOperand Op1, SDOperand Op2,
+ SDOperand Op3) {
return getNode(ISD::BUILTIN_OP_END+Opcode, VT, Op1, Op2, Op3).Val;
}
SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT::ValueType VT,
SDOperand Ops[] = { Op1, Op2 };
return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 3, Ops, 2).Val;
}
+SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT::ValueType VT1,
+ MVT::ValueType VT2, MVT::ValueType VT3,
+ SDOperand Op1, SDOperand Op2,
+ SDOperand Op3) {
+ const MVT::ValueType *VTs = getNodeValueTypes(VT1, VT2, VT3);
+ SDOperand Ops[] = { Op1, Op2, Op3 };
+ return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 3, Ops, 3).Val;
+}
SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT::ValueType VT1,
MVT::ValueType VT2, MVT::ValueType VT3,
const SDOperand *Ops, unsigned NumOps) {
return;
}
- // Get all of the users in a nice, deterministically ordered, uniqued set.
- SetVector<SDNode*> Users(From.Val->use_begin(), From.Val->use_end());
+ // Get all of the users of From.Val. We want these in a nice,
+ // deterministically ordered and uniqued set, so we use a SmallSetVector.
+ SmallSetVector<SDNode*, 16> Users(From.Val->use_begin(), From.Val->use_end());
while (!Users.empty()) {
// We know that this user uses some value of From. If it is the right
//===----------------------------------------------------------------------===//
// Out-of-line virtual method to give class a home.
-void SDNode::ANCHOR() {
+void SDNode::ANCHOR() {}
+void UnarySDNode::ANCHOR() {}
+void BinarySDNode::ANCHOR() {}
+void TernarySDNode::ANCHOR() {}
+void HandleSDNode::ANCHOR() {}
+void StringSDNode::ANCHOR() {}
+void ConstantSDNode::ANCHOR() {}
+void ConstantFPSDNode::ANCHOR() {}
+void GlobalAddressSDNode::ANCHOR() {}
+void FrameIndexSDNode::ANCHOR() {}
+void JumpTableSDNode::ANCHOR() {}
+void ConstantPoolSDNode::ANCHOR() {}
+void BasicBlockSDNode::ANCHOR() {}
+void SrcValueSDNode::ANCHOR() {}
+void RegisterSDNode::ANCHOR() {}
+void ExternalSymbolSDNode::ANCHOR() {}
+void CondCodeSDNode::ANCHOR() {}
+void VTSDNode::ANCHOR() {}
+void LoadSDNode::ANCHOR() {}
+void StoreSDNode::ANCHOR() {}
+
+HandleSDNode::~HandleSDNode() {
+ SDVTList VTs = { 0, 0 };
+ MorphNodeTo(ISD::HANDLENODE, VTs, 0, 0); // Drops operand uses.
+}
+
+GlobalAddressSDNode::GlobalAddressSDNode(bool isTarget, const GlobalValue *GA,
+ MVT::ValueType VT, int o)
+ : SDNode(isa<GlobalVariable>(GA) &&
+ dyn_cast<GlobalVariable>(GA)->isThreadLocal() ?
+ // Thread Local
+ (isTarget ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress) :
+ // Non Thread Local
+ (isTarget ? ISD::TargetGlobalAddress : ISD::GlobalAddress),
+ getSDVTList(VT)), Offset(o) {
+ TheGlobal = const_cast<GlobalValue*>(GA);
+}
+
+/// Profile - Gather unique data for the node.
+///
+void SDNode::Profile(FoldingSetNodeID &ID) {
+ AddNodeIDNode(ID, this);
}
/// getValueTypeList - Return a pointer to the specified value type.
SDOperand TheValue(const_cast<SDNode *>(this), Value);
- std::set<SDNode*> UsersHandled;
+ SmallPtrSet<SDNode*, 32> UsersHandled;
for (SDNode::use_iterator UI = Uses.begin(), E = Uses.end(); UI != E; ++UI) {
SDNode *User = *UI;
if (User->getNumOperands() == 1 ||
- UsersHandled.insert(User).second) // First time we've seen this?
+ UsersHandled.insert(User)) // First time we've seen this?
for (unsigned i = 0, e = User->getNumOperands(); i != e; ++i)
if (User->getOperand(i) == TheValue) {
if (NUses == 0)
}
-// isOnlyUse - Return true if this node is the only use of N.
+/// isOnlyUse - Return true if this node is the only use of N.
+///
bool SDNode::isOnlyUse(SDNode *N) const {
bool Seen = false;
for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
return Seen;
}
-// isOperand - Return true if this node is an operand of N.
+/// isOperand - Return true if this node is an operand of N.
+///
bool SDOperand::isOperand(SDNode *N) const {
for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
if (*this == N->getOperand(i))
return false;
}
+static void findPredecessor(SDNode *N, const SDNode *P, bool &found,
+ SmallPtrSet<SDNode *, 32> &Visited) {
+ if (found || !Visited.insert(N))
+ return;
+
+ for (unsigned i = 0, e = N->getNumOperands(); !found && i != e; ++i) {
+ SDNode *Op = N->getOperand(i).Val;
+ if (Op == P) {
+ found = true;
+ return;
+ }
+ findPredecessor(Op, P, found, Visited);
+ }
+}
+
+/// isPredecessor - Return true if this node is a predecessor of N. This node
+/// is either an operand of N or it can be reached by recursively traversing
+/// up the operands.
+/// NOTE: this is an expensive method. Use it carefully.
+bool SDNode::isPredecessor(SDNode *N) const {
+ SmallPtrSet<SDNode *, 32> Visited;
+ bool found = false;
+ findPredecessor(N, this, found, Visited);
+ return found;
+}
+
uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
assert(Num < NumOperands && "Invalid child # of SDNode!");
return cast<ConstantSDNode>(OperandList[Num])->getValue();
}
-const char *SDNode::getOperationName(const SelectionDAG *G) const {
+std::string SDNode::getOperationName(const SelectionDAG *G) const {
switch (getOpcode()) {
default:
if (getOpcode() < ISD::BUILTIN_OP_END)
case ISD::Constant: return "Constant";
case ISD::ConstantFP: return "ConstantFP";
case ISD::GlobalAddress: return "GlobalAddress";
+ case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
case ISD::FrameIndex: return "FrameIndex";
case ISD::JumpTable: return "JumpTable";
case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
+ case ISD::RETURNADDR: return "RETURNADDR";
+ case ISD::FRAMEADDR: return "FRAMEADDR";
+ case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR";
+ case ISD::EHSELECTION: return "EHSELECTION";
case ISD::ConstantPool: return "ConstantPool";
case ISD::ExternalSymbol: return "ExternalSymbol";
case ISD::INTRINSIC_WO_CHAIN: {
case ISD::TargetConstant: return "TargetConstant";
case ISD::TargetConstantFP:return "TargetConstantFP";
case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
+ case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
case ISD::TargetFrameIndex: return "TargetFrameIndex";
case ISD::TargetJumpTable: return "TargetJumpTable";
case ISD::TargetConstantPool: return "TargetConstantPool";
case ISD::UNDEF: return "undef";
case ISD::MERGE_VALUES: return "mergevalues";
case ISD::INLINEASM: return "inlineasm";
+ case ISD::LABEL: return "label";
case ISD::HANDLENODE: return "handlenode";
case ISD::FORMAL_ARGUMENTS: return "formal_arguments";
case ISD::CALL: return "call";
case ISD::FDIV: return "fdiv";
case ISD::FREM: return "frem";
case ISD::FCOPYSIGN: return "fcopysign";
- case ISD::VADD: return "vadd";
- case ISD::VSUB: return "vsub";
- case ISD::VMUL: return "vmul";
- case ISD::VSDIV: return "vsdiv";
- case ISD::VUDIV: return "vudiv";
- case ISD::VAND: return "vand";
- case ISD::VOR: return "vor";
- case ISD::VXOR: return "vxor";
case ISD::SETCC: return "setcc";
case ISD::SELECT: return "select";
case ISD::SELECT_CC: return "select_cc";
- case ISD::VSELECT: return "vselect";
case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
- case ISD::VINSERT_VECTOR_ELT: return "vinsert_vector_elt";
case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
- case ISD::VEXTRACT_VECTOR_ELT: return "vextract_vector_elt";
+ case ISD::CONCAT_VECTORS: return "concat_vectors";
+ case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
- case ISD::VBUILD_VECTOR: return "vbuild_vector";
case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
- case ISD::VVECTOR_SHUFFLE: return "vvector_shuffle";
- case ISD::VBIT_CONVERT: return "vbit_convert";
+ case ISD::CARRY_FALSE: return "carry_false";
case ISD::ADDC: return "addc";
case ISD::ADDE: return "adde";
case ISD::SUBC: return "subc";
// Control flow instructions
case ISD::BR: return "br";
case ISD::BRIND: return "brind";
+ case ISD::BR_JT: return "br_jt";
case ISD::BRCOND: return "brcond";
case ISD::BR_CC: return "br_cc";
case ISD::RET: return "ret";
// Other operators
case ISD::LOAD: return "load";
case ISD::STORE: return "store";
- case ISD::VLOAD: return "vload";
- case ISD::TRUNCSTORE: return "truncstore";
case ISD::VAARG: return "vaarg";
case ISD::VACOPY: return "vacopy";
case ISD::VAEND: return "vaend";
// Debug info
case ISD::LOCATION: return "location";
case ISD::DEBUG_LOC: return "debug_loc";
- case ISD::DEBUG_LABEL: return "debug_label";
case ISD::CONDCODE:
switch (cast<CondCodeSDNode>(this)->get()) {
}
}
+const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
+ switch (AM) {
+ default:
+ return "";
+ case ISD::PRE_INC:
+ return "<pre-inc>";
+ case ISD::PRE_DEC:
+ return "<pre-dec>";
+ case ISD::POST_INC:
+ return "<post-inc>";
+ case ISD::POST_DEC:
+ return "<post-dec>";
+ }
+}
+
void SDNode::dump() const { dump(0); }
void SDNode::dump(const SelectionDAG *G) const {
- std::cerr << (void*)this << ": ";
+ cerr << (void*)this << ": ";
for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
- if (i) std::cerr << ",";
+ if (i) cerr << ",";
if (getValueType(i) == MVT::Other)
- std::cerr << "ch";
+ cerr << "ch";
else
- std::cerr << MVT::getValueTypeString(getValueType(i));
+ cerr << MVT::getValueTypeString(getValueType(i));
}
- std::cerr << " = " << getOperationName(G);
+ cerr << " = " << getOperationName(G);
- std::cerr << " ";
+ cerr << " ";
for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
- if (i) std::cerr << ", ";
- std::cerr << (void*)getOperand(i).Val;
+ if (i) cerr << ", ";
+ cerr << (void*)getOperand(i).Val;
if (unsigned RN = getOperand(i).ResNo)
- std::cerr << ":" << RN;
+ cerr << ":" << RN;
}
if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
- std::cerr << "<" << CSDN->getValue() << ">";
+ cerr << "<" << CSDN->getValue() << ">";
} else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
- std::cerr << "<" << CSDN->getValue() << ">";
+ cerr << "<" << CSDN->getValue() << ">";
} else if (const GlobalAddressSDNode *GADN =
dyn_cast<GlobalAddressSDNode>(this)) {
int offset = GADN->getOffset();
- std::cerr << "<";
- WriteAsOperand(std::cerr, GADN->getGlobal()) << ">";
+ cerr << "<";
+ WriteAsOperand(*cerr.stream(), GADN->getGlobal()) << ">";
if (offset > 0)
- std::cerr << " + " << offset;
+ cerr << " + " << offset;
else
- std::cerr << " " << offset;
+ cerr << " " << offset;
} else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
- std::cerr << "<" << FIDN->getIndex() << ">";
+ cerr << "<" << FIDN->getIndex() << ">";
+ } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
+ cerr << "<" << JTDN->getIndex() << ">";
} else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
int offset = CP->getOffset();
if (CP->isMachineConstantPoolEntry())
- std::cerr << "<" << *CP->getMachineCPVal() << ">";
+ cerr << "<" << *CP->getMachineCPVal() << ">";
else
- std::cerr << "<" << *CP->getConstVal() << ">";
+ cerr << "<" << *CP->getConstVal() << ">";
if (offset > 0)
- std::cerr << " + " << offset;
+ cerr << " + " << offset;
else
- std::cerr << " " << offset;
+ cerr << " " << offset;
} else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
- std::cerr << "<";
+ cerr << "<";
const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
if (LBB)
- std::cerr << LBB->getName() << " ";
- std::cerr << (const void*)BBDN->getBasicBlock() << ">";
+ cerr << LBB->getName() << " ";
+ cerr << (const void*)BBDN->getBasicBlock() << ">";
} else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
if (G && R->getReg() && MRegisterInfo::isPhysicalRegister(R->getReg())) {
- std::cerr << " " <<G->getTarget().getRegisterInfo()->getName(R->getReg());
+ cerr << " " <<G->getTarget().getRegisterInfo()->getName(R->getReg());
} else {
- std::cerr << " #" << R->getReg();
+ cerr << " #" << R->getReg();
}
} else if (const ExternalSymbolSDNode *ES =
dyn_cast<ExternalSymbolSDNode>(this)) {
- std::cerr << "'" << ES->getSymbol() << "'";
+ cerr << "'" << ES->getSymbol() << "'";
} else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
if (M->getValue())
- std::cerr << "<" << M->getValue() << ":" << M->getOffset() << ">";
+ cerr << "<" << M->getValue() << ":" << M->getOffset() << ">";
else
- std::cerr << "<null:" << M->getOffset() << ">";
+ cerr << "<null:" << M->getOffset() << ">";
} else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
- std::cerr << ":" << getValueTypeString(N->getVT());
+ cerr << ":" << MVT::getValueTypeString(N->getVT());
} else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
bool doExt = true;
switch (LD->getExtensionType()) {
default: doExt = false; break;
case ISD::EXTLOAD:
-
std::cerr << " <anyext ";
+ cerr << " <anyext ";
break;
case ISD::SEXTLOAD:
- std::cerr << " <sext ";
+ cerr << " <sext ";
break;
case ISD::ZEXTLOAD:
- std::cerr << " <zext ";
+ cerr << " <zext ";
break;
}
if (doExt)
- std::cerr << MVT::getValueTypeString(LD->getLoadedVT()) << ">";
+ cerr << MVT::getValueTypeString(LD->getLoadedVT()) << ">";
+
+ const char *AM = getIndexedModeName(LD->getAddressingMode());
+ if (AM != "")
+ cerr << " " << AM;
+ } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
+ if (ST->isTruncatingStore())
+ cerr << " <trunc "
+ << MVT::getValueTypeString(ST->getStoredVT()) << ">";
- if (LD->getAddressingMode() == ISD::PRE_INDEXED)
- std::cerr << " <pre>";
- else if (LD->getAddressingMode() == ISD::POST_INDEXED)
- std::cerr << " <post>";
+ const char *AM = getIndexedModeName(ST->getAddressingMode());
+ if (AM != "")
+ cerr << " " << AM;
}
}
if (N->getOperand(i).Val->hasOneUse())
DumpNodes(N->getOperand(i).Val, indent+2, G);
else
- std::cerr << "\n" << std::string(indent+2, ' ')
- << (void*)N->getOperand(i).Val << ": <multiple use>";
+ cerr << "\n" << std::string(indent+2, ' ')
+ << (void*)N->getOperand(i).Val << ": <multiple use>";
- std::cerr << "\n" << std::string(indent, ' ');
+ cerr << "\n" << std::string(indent, ' ');
N->dump(G);
}
void SelectionDAG::dump() const {
- std::cerr << "SelectionDAG has " << AllNodes.size() << " nodes:";
+ cerr << "SelectionDAG has " << AllNodes.size() << " nodes:";
std::vector<const SDNode*> Nodes;
for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end();
I != E; ++I)
DumpNodes(Nodes[i], 2, this);
}
- DumpNodes(getRoot().Val, 2, this);
+ if (getRoot().Val) DumpNodes(getRoot().Val, 2, this);
- std::cerr << "\n\n";
+ cerr << "\n\n";
}
const Type *ConstantPoolSDNode::getType() const {
projects / oota-llvm.git / blobdiff