misched interface: rename Begin/End to RegionBegin/RegionEnd since they are not private.

[oota-llvm.git] / lib / CodeGen / ScheduleDAGInstrs.cpp

diff --git a/lib/CodeGen/ScheduleDAGInstrs.cpp b/lib/CodeGen/ScheduleDAGInstrs.cpp
index 09f2c5b5de912ad507d3dac8287e873fbe583fcf..ed066724374b0cef9b8737ac88cbda115a68ba8c 100644 (file)
--- a/lib/CodeGen/ScheduleDAGInstrs.cpp
+++ b/lib/CodeGen/ScheduleDAGInstrs.cpp
@@ -160,8 +160,8 @@ void ScheduleDAGInstrs::enterRegion(MachineBasicBlock *bb,
                                     MachineBasicBlock::iterator end,
                                     unsigned endcount) {
   BB = bb;
                                     MachineBasicBlock::iterator end,
                                     unsigned endcount) {
   BB = bb;

-  Begin = begin;
-  End = end;
+  RegionBegin = begin;
+  RegionEnd = end;

   EndIndex = endcount;
 
   // Check to see if the scheduler cares about latencies.
   EndIndex = endcount;
 
   // Check to see if the scheduler cares about latencies.


@@ -185,7 +185,7 @@ void ScheduleDAGInstrs::exitRegion() {
 /// are too high to be hidden by the branch or when the liveout registers
 /// used by instructions in the fallthrough block.
 void ScheduleDAGInstrs::addSchedBarrierDeps() {
 /// are too high to be hidden by the branch or when the liveout registers
 /// used by instructions in the fallthrough block.
 void ScheduleDAGInstrs::addSchedBarrierDeps() {

-  MachineInstr *ExitMI = End != BB->end() ? &*End : 0;
+  MachineInstr *ExitMI = RegionEnd != BB->end() ? &*RegionEnd : 0;

   ExitSU.setInstr(ExitMI);
   bool AllDepKnown = ExitMI &&
     (ExitMI->isCall() || ExitMI->isBarrier());
   ExitSU.setInstr(ExitMI);
   bool AllDepKnown = ExitMI &&
     (ExitMI->isCall() || ExitMI->isBarrier());


@@ -477,7 +477,7 @@ void ScheduleDAGInstrs::initSUnits() {
   // which is contained within a basic block.
   SUnits.reserve(BB->size());
 
   // which is contained within a basic block.
   SUnits.reserve(BB->size());
 

-  for (MachineBasicBlock::iterator I = Begin; I != End; ++I) {
+  for (MachineBasicBlock::iterator I = RegionBegin; I != RegionEnd; ++I) {

     MachineInstr *MI = I;
     if (MI->isDebugValue())
       continue;
     MachineInstr *MI = I;
     if (MI->isDebugValue())
       continue;


@@ -535,7 +535,7 @@ void ScheduleDAGInstrs::buildSchedGraph(AliasAnalysis *AA) {
 
   // Walk the list of instructions, from bottom moving up.
   MachineInstr *PrevMI = NULL;
 
   // Walk the list of instructions, from bottom moving up.
   MachineInstr *PrevMI = NULL;

-  for (MachineBasicBlock::iterator MII = End, MIE = Begin;
+  for (MachineBasicBlock::iterator MII = RegionEnd, MIE = RegionBegin;

        MII != MIE; --MII) {
     MachineInstr *MI = prior(MII);
     if (MI && PrevMI) {
        MII != MIE; --MII) {
     MachineInstr *MI = prior(MII);
     if (MI && PrevMI) {