dbgs() << "Max Pressure: ";
dumpRegSetPressure(MaxSetPressure, TRI);
dbgs() << "Live In: ";
- for (unsigned i = 0, e = LiveInRegs.size(); i < e; ++i)
- dbgs() << PrintVRegOrUnit(LiveInRegs[i], TRI) << " ";
+ for (unsigned Reg : LiveInRegs)
+ dbgs() << PrintVRegOrUnit(Reg, TRI) << " ";
dbgs() << '\n';
dbgs() << "Live Out: ";
- for (unsigned i = 0, e = LiveOutRegs.size(); i < e; ++i)
- dbgs() << PrintVRegOrUnit(LiveOutRegs[i], TRI) << " ";
+ for (unsigned Reg : LiveOutRegs)
+ dbgs() << PrintVRegOrUnit(Reg, TRI) << " ";
dbgs() << '\n';
}
/// Increase the current pressure as impacted by these registers and bump
/// the high water mark if needed.
void RegPressureTracker::increaseRegPressure(ArrayRef<unsigned> RegUnits) {
- for (unsigned i = 0, e = RegUnits.size(); i != e; ++i) {
- PSetIterator PSetI = MRI->getPressureSets(RegUnits[i]);
+ for (unsigned RegUnit : RegUnits) {
+ PSetIterator PSetI = MRI->getPressureSets(RegUnit);
unsigned Weight = PSetI.getWeight();
for (; PSetI.isValid(); ++PSetI) {
CurrSetPressure[*PSetI] += Weight;
- if (CurrSetPressure[*PSetI] > P.MaxSetPressure[*PSetI]) {
- P.MaxSetPressure[*PSetI] = CurrSetPressure[*PSetI];
- }
+ P.MaxSetPressure[*PSetI] =
+ std::max(P.MaxSetPressure[*PSetI], CurrSetPressure[*PSetI]);
}
}
}
/// Simply decrease the current pressure as impacted by these registers.
void RegPressureTracker::decreaseRegPressure(ArrayRef<unsigned> RegUnits) {
- for (unsigned I = 0, E = RegUnits.size(); I != E; ++I)
- decreaseSetPressure(CurrSetPressure, MRI->getPressureSets(RegUnits[I]));
+ for (unsigned RegUnit : RegUnits)
+ decreaseSetPressure(CurrSetPressure, MRI->getPressureSets(RegUnit));
}
/// Clear the result so it can be used for another round of pressure tracking.
Regs.clear();
}
-const LiveRange *RegPressureTracker::getLiveRange(unsigned Reg) const {
+static const LiveRange *getLiveRange(const LiveIntervals &LIS, unsigned Reg) {
if (TargetRegisterInfo::isVirtualRegister(Reg))
- return &LIS->getInterval(Reg);
- return LIS->getCachedRegUnit(Reg);
+ return &LIS.getInterval(Reg);
+ return LIS.getCachedRegUnit(Reg);
}
void RegPressureTracker::reset() {
void RegPressureTracker::initLiveThru(const RegPressureTracker &RPTracker) {
LiveThruPressure.assign(TRI->getNumRegPressureSets(), 0);
assert(isBottomClosed() && "need bottom-up tracking to intialize.");
- for (unsigned i = 0, e = P.LiveOutRegs.size(); i < e; ++i) {
- unsigned Reg = P.LiveOutRegs[i];
+ for (unsigned Reg : P.LiveOutRegs) {
if (TargetRegisterInfo::isVirtualRegister(Reg)
&& !RPTracker.hasUntiedDef(Reg)) {
increaseSetPressure(LiveThruPressure, MRI->getPressureSets(Reg));
namespace {
-/// List of register defined and used by a machine instruction.
-class RegisterOperands {
-public:
- SmallVector<unsigned, 8> Uses;
- SmallVector<unsigned, 8> Defs;
- SmallVector<unsigned, 8> DeadDefs;
-
- void collect(const MachineInstr &MI, const TargetRegisterInfo &TRI,
- const MachineRegisterInfo &MRI, bool IgnoreDead = false);
-};
-
/// Collect this instruction's unique uses and defs into SmallVectors for
/// processing defs and uses in order.
///
}
}
- friend class RegisterOperands;
+ friend class llvm::RegisterOperands;
};
+} // namespace
+
void RegisterOperands::collect(const MachineInstr &MI,
const TargetRegisterInfo &TRI,
const MachineRegisterInfo &MRI,
Collector.collectInstr(MI);
}
-} // namespace
+void RegisterOperands::detectDeadDefs(const MachineInstr &MI,
+ const LiveIntervals &LIS) {
+ SlotIndex SlotIdx = LIS.getInstructionIndex(&MI);
+ for (SmallVectorImpl<unsigned>::iterator RI = Defs.begin();
+ RI != Defs.end(); /*empty*/) {
+ unsigned Reg = *RI;
+ const LiveRange *LR = getLiveRange(LIS, Reg);
+ if (LR != nullptr) {
+ LiveQueryResult LRQ = LR->Query(SlotIdx);
+ if (LRQ.isDeadDef()) {
+ // LiveIntervals knows this is a dead even though it's MachineOperand is
+ // not flagged as such.
+ DeadDefs.push_back(Reg);
+ RI = Defs.erase(RI);
+ continue;
+ }
+ }
+ ++RI;
+ }
+}
/// Initialize an array of N PressureDiffs.
void PressureDiffs::init(unsigned N) {
PDiffArray = reinterpret_cast<PressureDiff*>(calloc(N, sizeof(PressureDiff)));
}
+void PressureDiffs::addInstruction(unsigned Idx,
+ const RegisterOperands &RegOpers,
+ const MachineRegisterInfo &MRI) {
+ PressureDiff &PDiff = (*this)[Idx];
+ assert(!PDiff.begin()->isValid() && "stale PDiff");
+ for (unsigned Reg : RegOpers.Defs)
+ PDiff.addPressureChange(Reg, true, &MRI);
+
+ for (unsigned Reg : RegOpers.Uses)
+ PDiff.addPressureChange(Reg, false, &MRI);
+}
+
/// Add a change in pressure to the pressure diff of a given instruction.
void PressureDiff::addPressureChange(unsigned RegUnit, bool IsDec,
const MachineRegisterInfo *MRI) {
}
}
-/// Record the pressure difference induced by the given operand list.
-static void collectPDiff(PressureDiff &PDiff, RegisterOperands &RegOpers,
- const MachineRegisterInfo *MRI) {
- assert(!PDiff.begin()->isValid() && "stale PDiff");
-
- for (unsigned i = 0, e = RegOpers.Defs.size(); i != e; ++i)
- PDiff.addPressureChange(RegOpers.Defs[i], true, MRI);
-
- for (unsigned i = 0, e = RegOpers.Uses.size(); i != e; ++i)
- PDiff.addPressureChange(RegOpers.Uses[i], false, MRI);
-}
-
/// Force liveness of registers.
void RegPressureTracker::addLiveRegs(ArrayRef<unsigned> Regs) {
- for (unsigned i = 0, e = Regs.size(); i != e; ++i) {
- if (LiveRegs.insert(Regs[i]))
- increaseRegPressure(Regs[i]);
+ for (unsigned Reg : Regs) {
+ if (LiveRegs.insert(Reg))
+ increaseRegPressure(Reg);
}
}
/// registers that are both defined and used by the instruction. If a pressure
/// difference pointer is provided record the changes is pressure caused by this
/// instruction independent of liveness.
-void RegPressureTracker::recede(SmallVectorImpl<unsigned> *LiveUses,
- PressureDiff *PDiff) {
- assert(CurrPos != MBB->begin());
- if (!isBottomClosed())
- closeBottom();
-
- // Open the top of the region using block iterators.
- if (!RequireIntervals && isTopClosed())
- static_cast<RegionPressure&>(P).openTop(CurrPos);
-
- // Find the previous instruction.
- do
- --CurrPos;
- while (CurrPos != MBB->begin() && CurrPos->isDebugValue());
+void RegPressureTracker::recede(const RegisterOperands &RegOpers,
+ SmallVectorImpl<unsigned> *LiveUses) {
assert(!CurrPos->isDebugValue());
- SlotIndex SlotIdx;
- if (RequireIntervals)
- SlotIdx = LIS->getInstructionIndex(CurrPos).getRegSlot();
-
- // Open the top of the region using slot indexes.
- if (RequireIntervals && isTopClosed())
- static_cast<IntervalPressure&>(P).openTop(SlotIdx);
-
- RegisterOperands RegOpers;
- RegOpers.collect(*CurrPos, *TRI, *MRI);
-
- if (PDiff)
- collectPDiff(*PDiff, RegOpers, MRI);
-
// Boost pressure for all dead defs together.
increaseRegPressure(RegOpers.DeadDefs);
decreaseRegPressure(RegOpers.DeadDefs);
// Kill liveness at live defs.
// TODO: consider earlyclobbers?
- for (unsigned i = 0, e = RegOpers.Defs.size(); i < e; ++i) {
- unsigned Reg = RegOpers.Defs[i];
- bool DeadDef = false;
- if (RequireIntervals) {
- const LiveRange *LR = getLiveRange(Reg);
- if (LR) {
- LiveQueryResult LRQ = LR->Query(SlotIdx);
- DeadDef = LRQ.isDeadDef();
- }
- }
- if (DeadDef) {
- // LiveIntervals knows this is a dead even though it's MachineOperand is
- // not flagged as such. Since this register will not be recorded as
- // live-out, increase its PDiff value to avoid underflowing pressure.
- if (PDiff)
- PDiff->addPressureChange(Reg, false, MRI);
- } else {
- if (LiveRegs.erase(Reg))
- decreaseRegPressure(Reg);
- else
- discoverLiveOut(Reg);
- }
+ for (unsigned Reg : RegOpers.Defs) {
+ if (LiveRegs.erase(Reg))
+ decreaseRegPressure(Reg);
+ else
+ discoverLiveOut(Reg);
}
+ SlotIndex SlotIdx;
+ if (RequireIntervals)
+ SlotIdx = LIS->getInstructionIndex(CurrPos).getRegSlot();
+
// Generate liveness for uses.
- for (unsigned i = 0, e = RegOpers.Uses.size(); i < e; ++i) {
- unsigned Reg = RegOpers.Uses[i];
+ for (unsigned Reg : RegOpers.Uses) {
if (!LiveRegs.contains(Reg)) {
// Adjust liveouts if LiveIntervals are available.
if (RequireIntervals) {
- const LiveRange *LR = getLiveRange(Reg);
+ const LiveRange *LR = getLiveRange(*LIS, Reg);
if (LR) {
LiveQueryResult LRQ = LR->Query(SlotIdx);
if (!LRQ.isKill() && !LRQ.valueDefined())
}
}
if (TrackUntiedDefs) {
- for (unsigned i = 0, e = RegOpers.Defs.size(); i < e; ++i) {
- unsigned Reg = RegOpers.Defs[i];
+ for (unsigned Reg : RegOpers.Defs) {
if (TargetRegisterInfo::isVirtualRegister(Reg) && !LiveRegs.contains(Reg))
UntiedDefs.insert(Reg);
}
}
}
+void RegPressureTracker::recedeSkipDebugValues() {
+ assert(CurrPos != MBB->begin());
+ if (!isBottomClosed())
+ closeBottom();
+
+ // Open the top of the region using block iterators.
+ if (!RequireIntervals && isTopClosed())
+ static_cast<RegionPressure&>(P).openTop(CurrPos);
+
+ // Find the previous instruction.
+ do
+ --CurrPos;
+ while (CurrPos != MBB->begin() && CurrPos->isDebugValue());
+
+ SlotIndex SlotIdx;
+ if (RequireIntervals)
+ SlotIdx = LIS->getInstructionIndex(CurrPos).getRegSlot();
+
+ // Open the top of the region using slot indexes.
+ if (RequireIntervals && isTopClosed())
+ static_cast<IntervalPressure&>(P).openTop(SlotIdx);
+}
+
+void RegPressureTracker::recede(SmallVectorImpl<unsigned> *LiveUses) {
+ recedeSkipDebugValues();
+
+ const MachineInstr &MI = *CurrPos;
+ RegisterOperands RegOpers;
+ RegOpers.collect(MI, *TRI, *MRI);
+ if (RequireIntervals)
+ RegOpers.detectDeadDefs(MI, *LIS);
+
+ recede(RegOpers, LiveUses);
+}
+
/// Advance across the current instruction.
void RegPressureTracker::advance() {
assert(!TrackUntiedDefs && "unsupported mode");
RegisterOperands RegOpers;
RegOpers.collect(*CurrPos, *TRI, *MRI);
- for (unsigned i = 0, e = RegOpers.Uses.size(); i < e; ++i) {
- unsigned Reg = RegOpers.Uses[i];
+ for (unsigned Reg : RegOpers.Uses) {
// Discover live-ins.
bool isLive = LiveRegs.contains(Reg);
if (!isLive)
// Kill liveness at last uses.
bool lastUse = false;
if (RequireIntervals) {
- const LiveRange *LR = getLiveRange(Reg);
+ const LiveRange *LR = getLiveRange(*LIS, Reg);
lastUse = LR && LR->Query(SlotIdx).isKill();
- }
- else {
+ } else {
// Allocatable physregs are always single-use before register rewriting.
lastUse = !TargetRegisterInfo::isVirtualRegister(Reg);
}
if (lastUse && isLive) {
LiveRegs.erase(Reg);
decreaseRegPressure(Reg);
- }
- else if (!lastUse && !isLive)
+ } else if (!lastUse && !isLive)
increaseRegPressure(Reg);
}
// Generate liveness for defs.
- for (unsigned i = 0, e = RegOpers.Defs.size(); i < e; ++i) {
- unsigned Reg = RegOpers.Defs[i];
+ for (unsigned Reg : RegOpers.Defs) {
if (LiveRegs.insert(Reg))
increaseRegPressure(Reg);
}
PDiff = 0; // Under the limit
else
PDiff = PNew - Limit; // Just exceeded limit.
- }
- else if (Limit > PNew)
+ } else if (Limit > PNew)
PDiff = Limit - POld; // Just obeyed limit.
if (PDiff) {
RegisterOperands RegOpers;
RegOpers.collect(*MI, *TRI, *MRI, /*IgnoreDead=*/true);
assert(RegOpers.DeadDefs.size() == 0);
+ if (RequireIntervals)
+ RegOpers.detectDeadDefs(*MI, *LIS);
// Kill liveness at live defs.
- for (unsigned i = 0, e = RegOpers.Defs.size(); i < e; ++i) {
- unsigned Reg = RegOpers.Defs[i];
- bool DeadDef = false;
- if (RequireIntervals) {
- const LiveRange *LR = getLiveRange(Reg);
- if (LR) {
- SlotIndex SlotIdx = LIS->getInstructionIndex(MI);
- LiveQueryResult LRQ = LR->Query(SlotIdx);
- DeadDef = LRQ.isDeadDef();
- }
- }
- if (!DeadDef) {
- if (!containsReg(RegOpers.Uses, Reg))
- decreaseRegPressure(Reg);
- }
+ for (unsigned Reg : RegOpers.Defs) {
+ if (!containsReg(RegOpers.Uses, Reg))
+ decreaseRegPressure(Reg);
}
// Generate liveness for uses.
- for (unsigned i = 0, e = RegOpers.Uses.size(); i < e; ++i) {
- unsigned Reg = RegOpers.Uses[i];
+ for (unsigned Reg : RegOpers.Uses) {
if (!LiveRegs.contains(Reg))
increaseRegPressure(Reg);
}
if (RequireIntervals)
SlotIdx = LIS->getInstructionIndex(MI).getRegSlot();
- for (unsigned i = 0, e = RegOpers.Uses.size(); i < e; ++i) {
- unsigned Reg = RegOpers.Uses[i];
+ for (unsigned Reg : RegOpers.Uses) {
if (RequireIntervals) {
// FIXME: allow the caller to pass in the list of vreg uses that remain
// to be bottom-scheduled to avoid searching uses at each query.
SlotIndex CurrIdx = getCurrSlot();
- const LiveRange *LR = getLiveRange(Reg);
+ const LiveRange *LR = getLiveRange(*LIS, Reg);
if (LR) {
LiveQueryResult LRQ = LR->Query(SlotIdx);
if (LRQ.isKill() && !findUseBetween(Reg, CurrIdx, SlotIdx, *MRI, LIS))
decreaseRegPressure(Reg);
}
- }
- else if (!TargetRegisterInfo::isVirtualRegister(Reg)) {
+ } else if (!TargetRegisterInfo::isVirtualRegister(Reg)) {
// Allocatable physregs are always single-use before register rewriting.
decreaseRegPressure(Reg);
}
projects / oota-llvm.git / blobdiff