Taints the non-acquire RMW's store address with the load part

[oota-llvm.git] / lib / CodeGen / RegAllocPBQP.cpp

diff --git a/lib/CodeGen/RegAllocPBQP.cpp b/lib/CodeGen/RegAllocPBQP.cpp
index f08d616e6812c0b4dae241fa3ee173f40c133ee1..fd28b05ed80a5446bb9b53e7970aa120d6098c53 100644 (file)
--- a/lib/CodeGen/RegAllocPBQP.cpp
+++ b/lib/CodeGen/RegAllocPBQP.cpp
@@ -47,6 +47,7 @@
 #include "llvm/IR/Module.h"
 #include "llvm/Support/Debug.h"
 #include "llvm/Support/FileSystem.h"
+#include "llvm/Support/Printable.h"
 #include "llvm/Support/raw_ostream.h"
 #include "llvm/Target/TargetInstrInfo.h"
 #include "llvm/Target/TargetSubtargetInfo.h"
@@ -808,13 +809,13 @@ bool RegAllocPBQP::runOnMachineFunction(MachineFunction &MF) {
 /// Create Printable object for node and register info.
 static Printable PrintNodeInfo(PBQP::RegAlloc::PBQPRAGraph::NodeId NId,
                                const PBQP::RegAlloc::PBQPRAGraph &G) {
-  return [NId, &G](raw_ostream &OS) {
+  return Printable([NId, &G](raw_ostream &OS) {
     const MachineRegisterInfo &MRI = G.getMetadata().MF.getRegInfo();
     const TargetRegisterInfo *TRI = MRI.getTargetRegisterInfo();
     unsigned VReg = G.getNodeMetadata(NId).getVReg();
     const char *RegClassName = TRI->getRegClassName(MRI.getRegClass(VReg));
     OS << NId << " (" << RegClassName << ':' << PrintReg(VReg, TRI) << ')';
-  };
+  });
 }
 
 void PBQP::RegAlloc::PBQPRAGraph::dump(raw_ostream &OS) const {