namespace {
/// A wrapper struct around the 'MachineOperand' struct that includes a source
-/// range.
-struct MachineOperandWithLocation {
+/// range and other attributes.
+struct ParsedMachineOperand {
MachineOperand Operand;
StringRef::iterator Begin;
StringRef::iterator End;
-
- MachineOperandWithLocation(const MachineOperand &Operand,
- StringRef::iterator Begin, StringRef::iterator End)
- : Operand(Operand), Begin(Begin), End(End) {}
+ Optional<unsigned> TiedDefIdx;
+
+ ParsedMachineOperand(const MachineOperand &Operand, StringRef::iterator Begin,
+ StringRef::iterator End, Optional<unsigned> &TiedDefIdx)
+ : Operand(Operand), Begin(Begin), End(End), TiedDefIdx(TiedDefIdx) {
+ if (TiedDefIdx)
+ assert(Operand.isReg() && Operand.isUse() &&
+ "Only used register operands can be tied");
+ }
};
class MIParser {
StringMap<unsigned> Names2SubRegIndices;
/// Maps from slot numbers to function's unnamed basic blocks.
DenseMap<unsigned, const BasicBlock *> Slots2BasicBlocks;
+ /// Maps from slot numbers to function's unnamed values.
+ DenseMap<unsigned, const Value *> Slots2Values;
/// Maps from target index names to target indices.
StringMap<int> Names2TargetIndices;
/// Maps from direct target flag names to the direct target flag values.
StringMap<unsigned> Names2DirectTargetFlags;
+ /// Maps from direct target flag names to the bitmask target flag values.
+ StringMap<unsigned> Names2BitmaskTargetFlags;
public:
MIParser(SourceMgr &SM, MachineFunction &MF, SMDiagnostic &Error,
bool parseStandaloneMBB(MachineBasicBlock *&MBB);
bool parseStandaloneNamedRegister(unsigned &Reg);
bool parseStandaloneVirtualRegister(unsigned &Reg);
+ bool parseStandaloneStackObject(int &FI);
+ bool parseStandaloneMDNode(MDNode *&Node);
bool
parseBasicBlockDefinition(DenseMap<unsigned, MachineBasicBlock *> &MBBSlots);
bool parseRegister(unsigned &Reg);
bool parseRegisterFlag(unsigned &Flags);
bool parseSubRegisterIndex(unsigned &SubReg);
- bool parseRegisterOperand(MachineOperand &Dest, bool IsDef = false);
+ bool parseRegisterTiedDefIndex(unsigned &TiedDefIdx);
+ bool parseRegisterOperand(MachineOperand &Dest,
+ Optional<unsigned> &TiedDefIdx, bool IsDef = false);
bool parseImmediateOperand(MachineOperand &Dest);
+ bool parseIRConstant(StringRef::iterator Loc, StringRef Source,
+ const Constant *&C);
bool parseIRConstant(StringRef::iterator Loc, const Constant *&C);
bool parseTypedImmediateOperand(MachineOperand &Dest);
bool parseFPImmediateOperand(MachineOperand &Dest);
bool parseMBBReference(MachineBasicBlock *&MBB);
bool parseMBBOperand(MachineOperand &Dest);
+ bool parseStackFrameIndex(int &FI);
bool parseStackObjectOperand(MachineOperand &Dest);
bool parseFixedStackFrameIndex(int &FI);
bool parseFixedStackObjectOperand(MachineOperand &Dest);
bool parseBlockAddressOperand(MachineOperand &Dest);
bool parseTargetIndexOperand(MachineOperand &Dest);
bool parseLiveoutRegisterMaskOperand(MachineOperand &Dest);
- bool parseMachineOperand(MachineOperand &Dest);
- bool parseMachineOperandAndTargetFlags(MachineOperand &Dest);
+ bool parseMachineOperand(MachineOperand &Dest,
+ Optional<unsigned> &TiedDefIdx);
+ bool parseMachineOperandAndTargetFlags(MachineOperand &Dest,
+ Optional<unsigned> &TiedDefIdx);
bool parseOffset(int64_t &Offset);
bool parseAlignment(unsigned &Alignment);
bool parseOperandsOffset(MachineOperand &Op);
- bool parseIRValue(Value *&V);
+ bool parseIRValue(const Value *&V);
bool parseMemoryOperandFlag(unsigned &Flags);
bool parseMemoryPseudoSourceValue(const PseudoSourceValue *&PSV);
bool parseMachinePointerInfo(MachinePointerInfo &Dest);
bool parseInstruction(unsigned &OpCode, unsigned &Flags);
- bool verifyImplicitOperands(ArrayRef<MachineOperandWithLocation> Operands,
+ bool assignRegisterTies(MachineInstr &MI,
+ ArrayRef<ParsedMachineOperand> Operands);
+
+ bool verifyImplicitOperands(ArrayRef<ParsedMachineOperand> Operands,
const MCInstrDesc &MCID);
void initNames2Regs();
const BasicBlock *getIRBlock(unsigned Slot);
const BasicBlock *getIRBlock(unsigned Slot, const Function &F);
+ const Value *getIRValue(unsigned Slot);
+
void initNames2TargetIndices();
/// Try to convert a name of target index to the corresponding target index.
///
/// Return true if the name isn't a name of a direct flag.
bool getDirectTargetFlag(StringRef Name, unsigned &Flag);
+
+ void initNames2BitmaskTargetFlags();
+
+ /// Try to convert a name of a bitmask target flag to the corresponding
+ /// target flag.
+ ///
+ /// Return true if the name isn't a name of a bitmask target flag.
+ bool getBitmaskTargetFlag(StringRef Name, unsigned &Flag);
};
} // end anonymous namespace
bool MIParser::parse(MachineInstr *&MI) {
// Parse any register operands before '='
MachineOperand MO = MachineOperand::CreateImm(0);
- SmallVector<MachineOperandWithLocation, 8> Operands;
+ SmallVector<ParsedMachineOperand, 8> Operands;
while (Token.isRegister() || Token.isRegisterFlag()) {
auto Loc = Token.location();
- if (parseRegisterOperand(MO, /*IsDef=*/true))
+ Optional<unsigned> TiedDefIdx;
+ if (parseRegisterOperand(MO, TiedDefIdx, /*IsDef=*/true))
return true;
- Operands.push_back(MachineOperandWithLocation(MO, Loc, Token.location()));
+ Operands.push_back(
+ ParsedMachineOperand(MO, Loc, Token.location(), TiedDefIdx));
if (Token.isNot(MIToken::comma))
break;
lex();
while (!Token.isNewlineOrEOF() && Token.isNot(MIToken::kw_debug_location) &&
Token.isNot(MIToken::coloncolon) && Token.isNot(MIToken::lbrace)) {
auto Loc = Token.location();
- if (parseMachineOperandAndTargetFlags(MO))
+ Optional<unsigned> TiedDefIdx;
+ if (parseMachineOperandAndTargetFlags(MO, TiedDefIdx))
return true;
- Operands.push_back(MachineOperandWithLocation(MO, Loc, Token.location()));
+ Operands.push_back(
+ ParsedMachineOperand(MO, Loc, Token.location(), TiedDefIdx));
if (Token.isNewlineOrEOF() || Token.is(MIToken::coloncolon) ||
Token.is(MIToken::lbrace))
break;
MI->setFlags(Flags);
for (const auto &Operand : Operands)
MI->addOperand(MF, Operand.Operand);
+ if (assignRegisterTies(*MI, Operands))
+ return true;
if (MemOperands.empty())
return false;
MachineInstr::mmo_iterator MemRefs =
if (Token.isNot(MIToken::NamedRegister))
return error("expected a named register");
if (parseRegister(Reg))
- return 0;
+ return true;
lex();
if (Token.isNot(MIToken::Eof))
return error("expected end of string after the register reference");
if (Token.isNot(MIToken::VirtualRegister))
return error("expected a virtual register");
if (parseRegister(Reg))
- return 0;
+ return true;
lex();
if (Token.isNot(MIToken::Eof))
return error("expected end of string after the register reference");
return false;
}
+bool MIParser::parseStandaloneStackObject(int &FI) {
+ lex();
+ if (Token.isNot(MIToken::StackObject))
+ return error("expected a stack object");
+ if (parseStackFrameIndex(FI))
+ return true;
+ if (Token.isNot(MIToken::Eof))
+ return error("expected end of string after the stack object reference");
+ return false;
+}
+
+bool MIParser::parseStandaloneMDNode(MDNode *&Node) {
+ lex();
+ if (Token.isNot(MIToken::exclaim))
+ return error("expected a metadata node");
+ if (parseMDNode(Node))
+ return true;
+ if (Token.isNot(MIToken::Eof))
+ return error("expected end of string after the metadata node");
+ return false;
+}
+
static const char *printImplicitRegisterFlag(const MachineOperand &MO) {
assert(MO.isImplicit());
return MO.isDef() ? "implicit-def" : "implicit";
return StringRef(TRI->getName(Reg)).lower();
}
-bool MIParser::verifyImplicitOperands(
- ArrayRef<MachineOperandWithLocation> Operands, const MCInstrDesc &MCID) {
+bool MIParser::verifyImplicitOperands(ArrayRef<ParsedMachineOperand> Operands,
+ const MCInstrDesc &MCID) {
if (MCID.isCall())
// We can't verify call instructions as they can contain arbitrary implicit
// register and register mask operands.
if (ImplicitOperand.isIdenticalTo(Operand))
continue;
if (Operand.isReg() && Operand.isImplicit()) {
+ // Check if this implicit register is a subregister of an explicit
+ // register operand.
+ bool IsImplicitSubRegister = false;
+ for (size_t K = 0, E = Operands.size(); K < E; ++K) {
+ const auto &Op = Operands[K].Operand;
+ if (Op.isReg() && !Op.isImplicit() &&
+ TRI->isSubRegister(Op.getReg(), Operand.getReg())) {
+ IsImplicitSubRegister = true;
+ break;
+ }
+ }
+ if (IsImplicitSubRegister)
+ continue;
return error(Operands[J].Begin,
Twine("expected an implicit register operand '") +
printImplicitRegisterFlag(ImplicitOperand) + " %" +
case MIToken::kw_implicit_define:
Flags |= RegState::ImplicitDefine;
break;
+ case MIToken::kw_def:
+ Flags |= RegState::Define;
+ break;
case MIToken::kw_dead:
Flags |= RegState::Dead;
break;
return false;
}
-bool MIParser::parseRegisterOperand(MachineOperand &Dest, bool IsDef) {
+bool MIParser::parseRegisterTiedDefIndex(unsigned &TiedDefIdx) {
+ if (!consumeIfPresent(MIToken::kw_tied_def))
+ return error("expected 'tied-def' after '('");
+ if (Token.isNot(MIToken::IntegerLiteral))
+ return error("expected an integer literal after 'tied-def'");
+ if (getUnsigned(TiedDefIdx))
+ return true;
+ lex();
+ if (expectAndConsume(MIToken::rparen))
+ return true;
+ return false;
+}
+
+bool MIParser::assignRegisterTies(MachineInstr &MI,
+ ArrayRef<ParsedMachineOperand> Operands) {
+ SmallVector<std::pair<unsigned, unsigned>, 4> TiedRegisterPairs;
+ for (unsigned I = 0, E = Operands.size(); I != E; ++I) {
+ if (!Operands[I].TiedDefIdx)
+ continue;
+ // The parser ensures that this operand is a register use, so we just have
+ // to check the tied-def operand.
+ unsigned DefIdx = Operands[I].TiedDefIdx.getValue();
+ if (DefIdx >= E)
+ return error(Operands[I].Begin,
+ Twine("use of invalid tied-def operand index '" +
+ Twine(DefIdx) + "'; instruction has only ") +
+ Twine(E) + " operands");
+ const auto &DefOperand = Operands[DefIdx].Operand;
+ if (!DefOperand.isReg() || !DefOperand.isDef())
+ // FIXME: add note with the def operand.
+ return error(Operands[I].Begin,
+ Twine("use of invalid tied-def operand index '") +
+ Twine(DefIdx) + "'; the operand #" + Twine(DefIdx) +
+ " isn't a defined register");
+ // Check that the tied-def operand wasn't tied elsewhere.
+ for (const auto &TiedPair : TiedRegisterPairs) {
+ if (TiedPair.first == DefIdx)
+ return error(Operands[I].Begin,
+ Twine("the tied-def operand #") + Twine(DefIdx) +
+ " is already tied with another register operand");
+ }
+ TiedRegisterPairs.push_back(std::make_pair(DefIdx, I));
+ }
+ // FIXME: Verify that for non INLINEASM instructions, the def and use tied
+ // indices must be less than tied max.
+ for (const auto &TiedPair : TiedRegisterPairs)
+ MI.tieOperands(TiedPair.first, TiedPair.second);
+ return false;
+}
+
+bool MIParser::parseRegisterOperand(MachineOperand &Dest,
+ Optional<unsigned> &TiedDefIdx,
+ bool IsDef) {
unsigned Reg;
unsigned Flags = IsDef ? RegState::Define : 0;
while (Token.isRegisterFlag()) {
if (parseSubRegisterIndex(SubReg))
return true;
}
+ if ((Flags & RegState::Define) == 0 && consumeIfPresent(MIToken::lparen)) {
+ unsigned Idx;
+ if (parseRegisterTiedDefIndex(Idx))
+ return true;
+ TiedDefIdx = Idx;
+ }
Dest = MachineOperand::CreateReg(
Reg, Flags & RegState::Define, Flags & RegState::Implicit,
Flags & RegState::Kill, Flags & RegState::Dead, Flags & RegState::Undef,
return false;
}
-bool MIParser::parseIRConstant(StringRef::iterator Loc, const Constant *&C) {
- auto Source = StringRef(Loc, Token.range().end() - Loc).str();
- lex();
+bool MIParser::parseIRConstant(StringRef::iterator Loc, StringRef StringValue,
+ const Constant *&C) {
+ auto Source = StringValue.str(); // The source has to be null terminated.
SMDiagnostic Err;
- C = parseConstantValue(Source.c_str(), Err, *MF.getFunction()->getParent());
+ C = parseConstantValue(Source.c_str(), Err, *MF.getFunction()->getParent(),
+ &IRSlots);
if (!C)
return error(Loc + Err.getColumnNo(), Err.getMessage());
return false;
}
+bool MIParser::parseIRConstant(StringRef::iterator Loc, const Constant *&C) {
+ if (parseIRConstant(Loc, StringRef(Loc, Token.range().end() - Loc), C))
+ return true;
+ lex();
+ return false;
+}
+
bool MIParser::parseTypedImmediateOperand(MachineOperand &Dest) {
assert(Token.is(MIToken::IntegerType));
auto Loc = Token.location();
return false;
}
-bool MIParser::parseStackObjectOperand(MachineOperand &Dest) {
+bool MIParser::parseStackFrameIndex(int &FI) {
assert(Token.is(MIToken::StackObject));
unsigned ID;
if (getUnsigned(ID))
return error(Twine("the name of the stack object '%stack.") + Twine(ID) +
"' isn't '" + Token.stringValue() + "'");
lex();
- Dest = MachineOperand::CreateFI(ObjectInfo->second);
+ FI = ObjectInfo->second;
+ return false;
+}
+
+bool MIParser::parseStackObjectOperand(MachineOperand &Dest) {
+ int FI;
+ if (parseStackFrameIndex(FI))
+ return true;
+ Dest = MachineOperand::CreateFI(FI);
return false;
}
return false;
}
-bool MIParser::parseMachineOperand(MachineOperand &Dest) {
+bool MIParser::parseMachineOperand(MachineOperand &Dest,
+ Optional<unsigned> &TiedDefIdx) {
switch (Token.kind()) {
case MIToken::kw_implicit:
case MIToken::kw_implicit_define:
+ case MIToken::kw_def:
case MIToken::kw_dead:
case MIToken::kw_killed:
case MIToken::kw_undef:
case MIToken::underscore:
case MIToken::NamedRegister:
case MIToken::VirtualRegister:
- return parseRegisterOperand(Dest);
+ return parseRegisterOperand(Dest, TiedDefIdx);
case MIToken::IntegerLiteral:
return parseImmediateOperand(Dest);
case MIToken::IntegerType:
}
// fallthrough
default:
- // TODO: parse the other machine operands.
+ // FIXME: Parse the MCSymbol machine operand.
return error("expected a machine operand");
}
return false;
}
-bool MIParser::parseMachineOperandAndTargetFlags(MachineOperand &Dest) {
+bool MIParser::parseMachineOperandAndTargetFlags(
+ MachineOperand &Dest, Optional<unsigned> &TiedDefIdx) {
unsigned TF = 0;
bool HasTargetFlags = false;
if (Token.is(MIToken::kw_target_flags)) {
return true;
if (Token.isNot(MIToken::Identifier))
return error("expected the name of the target flag");
- if (getDirectTargetFlag(Token.stringValue(), TF))
- return error("use of undefined target flag '" + Token.stringValue() +
- "'");
+ if (getDirectTargetFlag(Token.stringValue(), TF)) {
+ if (getBitmaskTargetFlag(Token.stringValue(), TF))
+ return error("use of undefined target flag '" + Token.stringValue() +
+ "'");
+ }
lex();
- // TODO: Parse target's bit target flags.
+ while (Token.is(MIToken::comma)) {
+ lex();
+ if (Token.isNot(MIToken::Identifier))
+ return error("expected the name of the target flag");
+ unsigned BitFlag = 0;
+ if (getBitmaskTargetFlag(Token.stringValue(), BitFlag))
+ return error("use of undefined target flag '" + Token.stringValue() +
+ "'");
+ // TODO: Report an error when using a duplicate bit target flag.
+ TF |= BitFlag;
+ lex();
+ }
if (expectAndConsume(MIToken::rparen))
return true;
}
auto Loc = Token.location();
- if (parseMachineOperand(Dest))
+ if (parseMachineOperand(Dest, TiedDefIdx))
return true;
if (!HasTargetFlags)
return false;
return false;
}
-bool MIParser::parseIRValue(Value *&V) {
+bool MIParser::parseIRValue(const Value *&V) {
switch (Token.kind()) {
case MIToken::NamedIRValue: {
V = MF.getFunction()->getValueSymbolTable().lookup(Token.stringValue());
- if (!V)
- V = MF.getFunction()->getParent()->getValueSymbolTable().lookup(
- Token.stringValue());
- if (!V)
- return error(Twine("use of undefined IR value '") + Token.range() + "'");
break;
}
- // TODO: Parse unnamed IR value references.
+ case MIToken::IRValue: {
+ unsigned SlotNumber = 0;
+ if (getUnsigned(SlotNumber))
+ return true;
+ V = getIRValue(SlotNumber);
+ break;
+ }
+ case MIToken::NamedGlobalValue:
+ case MIToken::GlobalValue: {
+ GlobalValue *GV = nullptr;
+ if (parseGlobalValue(GV))
+ return true;
+ V = GV;
+ break;
+ }
+ case MIToken::QuotedIRValue: {
+ const Constant *C = nullptr;
+ if (parseIRConstant(Token.location(), Token.stringValue(), C))
+ return true;
+ V = C;
+ break;
+ }
default:
llvm_unreachable("The current token should be an IR block reference");
}
+ if (!V)
+ return error(Twine("use of undefined IR value '") + Token.range() + "'");
return false;
}
// The token was already consumed, so use return here instead of break.
return false;
}
- case MIToken::GlobalValue:
- case MIToken::NamedGlobalValue: {
- GlobalValue *GV = nullptr;
- if (parseGlobalValue(GV))
- return true;
- PSV = MF.getPSVManager().getGlobalValueCallEntry(GV);
+ case MIToken::kw_call_entry: {
+ lex();
+ switch (Token.kind()) {
+ case MIToken::GlobalValue:
+ case MIToken::NamedGlobalValue: {
+ GlobalValue *GV = nullptr;
+ if (parseGlobalValue(GV))
+ return true;
+ PSV = MF.getPSVManager().getGlobalValueCallEntry(GV);
+ break;
+ }
+ case MIToken::ExternalSymbol:
+ PSV = MF.getPSVManager().getExternalSymbolCallEntry(
+ MF.createExternalSymbolName(Token.stringValue()));
+ break;
+ default:
+ return error(
+ "expected a global value or an external symbol after 'call-entry'");
+ }
break;
}
- case MIToken::ExternalSymbol:
- PSV = MF.getPSVManager().getExternalSymbolCallEntry(
- MF.createExternalSymbolName(Token.stringValue()));
- break;
default:
llvm_unreachable("The current token should be pseudo source value");
}
bool MIParser::parseMachinePointerInfo(MachinePointerInfo &Dest) {
if (Token.is(MIToken::kw_constant_pool) || Token.is(MIToken::kw_stack) ||
Token.is(MIToken::kw_got) || Token.is(MIToken::kw_jump_table) ||
- Token.is(MIToken::FixedStackObject) || Token.is(MIToken::GlobalValue) ||
- Token.is(MIToken::NamedGlobalValue) ||
- Token.is(MIToken::ExternalSymbol)) {
+ Token.is(MIToken::FixedStackObject) || Token.is(MIToken::kw_call_entry)) {
const PseudoSourceValue *PSV = nullptr;
if (parseMemoryPseudoSourceValue(PSV))
return true;
Dest = MachinePointerInfo(PSV, Offset);
return false;
}
- if (Token.isNot(MIToken::NamedIRValue))
+ if (Token.isNot(MIToken::NamedIRValue) && Token.isNot(MIToken::IRValue) &&
+ Token.isNot(MIToken::GlobalValue) &&
+ Token.isNot(MIToken::NamedGlobalValue) &&
+ Token.isNot(MIToken::QuotedIRValue))
return error("expected an IR value reference");
- Value *V = nullptr;
+ const Value *V = nullptr;
if (parseIRValue(V))
return true;
if (!V->getType()->isPointerTy())
if (parseMachinePointerInfo(Ptr))
return true;
unsigned BaseAlignment = Size;
- if (Token.is(MIToken::comma)) {
- lex();
- if (Token.isNot(MIToken::kw_align))
- return error("expected 'align'");
- if (parseAlignment(BaseAlignment))
- return true;
+ AAMDNodes AAInfo;
+ MDNode *Range = nullptr;
+ while (consumeIfPresent(MIToken::comma)) {
+ switch (Token.kind()) {
+ case MIToken::kw_align:
+ if (parseAlignment(BaseAlignment))
+ return true;
+ break;
+ case MIToken::md_tbaa:
+ lex();
+ if (parseMDNode(AAInfo.TBAA))
+ return true;
+ break;
+ case MIToken::md_alias_scope:
+ lex();
+ if (parseMDNode(AAInfo.Scope))
+ return true;
+ break;
+ case MIToken::md_noalias:
+ lex();
+ if (parseMDNode(AAInfo.NoAlias))
+ return true;
+ break;
+ case MIToken::md_range:
+ lex();
+ if (parseMDNode(Range))
+ return true;
+ break;
+ // TODO: Report an error on duplicate metadata nodes.
+ default:
+ return error("expected 'align' or '!tbaa' or '!alias.scope' or "
+ "'!noalias' or '!range'");
+ }
}
- // TODO: Parse the attached metadata nodes.
if (expectAndConsume(MIToken::rparen))
return true;
- Dest = MF.getMachineMemOperand(Ptr, Flags, Size, BaseAlignment);
+ Dest =
+ MF.getMachineMemOperand(Ptr, Flags, Size, BaseAlignment, AAInfo, Range);
return false;
}
return getIRBlockFromSlot(Slot, CustomSlots2BasicBlocks);
}
+static void mapValueToSlot(const Value *V, ModuleSlotTracker &MST,
+ DenseMap<unsigned, const Value *> &Slots2Values) {
+ int Slot = MST.getLocalSlot(V);
+ if (Slot == -1)
+ return;
+ Slots2Values.insert(std::make_pair(unsigned(Slot), V));
+}
+
+/// Creates the mapping from slot numbers to function's unnamed IR values.
+static void initSlots2Values(const Function &F,
+ DenseMap<unsigned, const Value *> &Slots2Values) {
+ ModuleSlotTracker MST(F.getParent(), /*ShouldInitializeAllMetadata=*/false);
+ MST.incorporateFunction(F);
+ for (const auto &Arg : F.args())
+ mapValueToSlot(&Arg, MST, Slots2Values);
+ for (const auto &BB : F) {
+ mapValueToSlot(&BB, MST, Slots2Values);
+ for (const auto &I : BB)
+ mapValueToSlot(&I, MST, Slots2Values);
+ }
+}
+
+const Value *MIParser::getIRValue(unsigned Slot) {
+ if (Slots2Values.empty())
+ initSlots2Values(*MF.getFunction(), Slots2Values);
+ auto ValueInfo = Slots2Values.find(Slot);
+ if (ValueInfo == Slots2Values.end())
+ return nullptr;
+ return ValueInfo->second;
+}
+
void MIParser::initNames2TargetIndices() {
if (!Names2TargetIndices.empty())
return;
return false;
}
+void MIParser::initNames2BitmaskTargetFlags() {
+ if (!Names2BitmaskTargetFlags.empty())
+ return;
+ const auto *TII = MF.getSubtarget().getInstrInfo();
+ assert(TII && "Expected target instruction info");
+ auto Flags = TII->getSerializableBitmaskMachineOperandTargetFlags();
+ for (const auto &I : Flags)
+ Names2BitmaskTargetFlags.insert(
+ std::make_pair(StringRef(I.second), I.first));
+}
+
+bool MIParser::getBitmaskTargetFlag(StringRef Name, unsigned &Flag) {
+ initNames2BitmaskTargetFlags();
+ auto FlagInfo = Names2BitmaskTargetFlags.find(Name);
+ if (FlagInfo == Names2BitmaskTargetFlags.end())
+ return true;
+ Flag = FlagInfo->second;
+ return false;
+}
+
bool llvm::parseMachineBasicBlockDefinitions(MachineFunction &MF, StringRef Src,
PerFunctionMIParsingState &PFS,
const SlotMapping &IRSlots,
return MIParser(SM, MF, Error, Src, PFS, IRSlots)
.parseStandaloneVirtualRegister(Reg);
}
+
+bool llvm::parseStackObjectReference(int &FI, SourceMgr &SM,
+ MachineFunction &MF, StringRef Src,
+ const PerFunctionMIParsingState &PFS,
+ const SlotMapping &IRSlots,
+ SMDiagnostic &Error) {
+ return MIParser(SM, MF, Error, Src, PFS, IRSlots)
+ .parseStandaloneStackObject(FI);
+}
+
+bool llvm::parseMDNode(MDNode *&Node, SourceMgr &SM, MachineFunction &MF,
+ StringRef Src, const PerFunctionMIParsingState &PFS,
+ const SlotMapping &IRSlots, SMDiagnostic &Error) {
+ return MIParser(SM, MF, Error, Src, PFS, IRSlots).parseStandaloneMDNode(Node);
+}
projects / oota-llvm.git / blobdiff