/// that is an implicit def.
void AsmPrinter::emitImplicitDef(const MachineInstr *MI) const {
unsigned RegNo = MI->getOperand(0).getReg();
- OutStreamer->AddComment(Twine("implicit-def: ") +
- MMI->getContext().getRegisterInfo()->getName(RegNo));
+
+ SmallString<128> Str;
+ raw_svector_ostream OS(Str);
+ OS << "implicit-def: "
+ << PrintReg(RegNo, MF->getSubtarget().getRegisterInfo());
+
+ OutStreamer->AddComment(OS.str());
OutStreamer->AddBlankLine();
}
static void emitKill(const MachineInstr *MI, AsmPrinter &AP) {
- std::string Str = "kill:";
+ std::string Str;
+ raw_string_ostream OS(Str);
+ OS << "kill:";
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
const MachineOperand &Op = MI->getOperand(i);
assert(Op.isReg() && "KILL instruction must have only register operands");
- Str += ' ';
- Str += AP.MMI->getContext().getRegisterInfo()->getName(Op.getReg());
- Str += (Op.isDef() ? "<def>" : "<kill>");
+ OS << ' '
+ << PrintReg(Op.getReg(),
+ AP.MF->getSubtarget().getRegisterInfo())
+ << (Op.isDef() ? "<def>" : "<kill>");
}
AP.OutStreamer->AddComment(Str);
AP.OutStreamer->AddBlankLine();
}
if (Deref)
OS << '[';
- OS << AP.MMI->getContext().getRegisterInfo()->getName(Reg);
+ OS << PrintReg(Reg, AP.MF->getSubtarget().getRegisterInfo());
}
if (Deref)