Revert r164061-r164067. Most of the new subtarget emitter.

[oota-llvm.git] / include / llvm / Target / TargetSubtargetInfo.h

diff --git a/include/llvm/Target/TargetSubtargetInfo.h b/include/llvm/Target/TargetSubtargetInfo.h
index 8fcefcbfa7718d2e8a3c24c9d7178eaf933de5b6..8c6c695b1949fd40cba7d40e9f7e894dedce8309 100644 (file)
--- a/include/llvm/Target/TargetSubtargetInfo.h
+++ b/include/llvm/Target/TargetSubtargetInfo.h
@@ -14,7 +14,6 @@
 #ifndef LLVM_TARGET_TARGETSUBTARGETINFO_H
 #define LLVM_TARGET_TARGETSUBTARGETINFO_H
 
-#include "llvm/Codegen/TargetSchedule.h"
 #include "llvm/MC/MCSubtargetInfo.h"
 #include "llvm/Support/CodeGen.h"
 
@@ -44,24 +43,6 @@ public:
 
   virtual ~TargetSubtargetInfo();
 
-  /// Initialize a copy of the scheduling model for this subtarget.
-  /// TargetSchedModel provides the interface for the subtarget's
-  /// instruction scheduling information.
-  void initSchedModel(TargetSchedModel &SchedModel,
-                      const TargetInstrInfo *TII) const {
-    // CPUSchedModel is initialized to a static instance by InitMCSubtargetInfo.
-    SchedModel.init(*getSchedModel(), this, TII);
-  }
-
-  /// Resolve a SchedClass at runtime, where SchedClass identifies an
-  /// MCSchedClassDesc with the isVariant property. This may return the ID of
-  /// another variant SchedClass, but repeated invocation must quickly terminate
-  /// in a nonvariant SchedClass.
-  virtual unsigned resolveSchedClass(unsigned SchedClass, const MachineInstr *MI,
-                                     const TargetSchedModel* SchedModel) const {
-    return 0;
-  }
-
   /// getSpecialAddressLatency - For targets where it is beneficial to
   /// backschedule instructions that compute addresses, return a value
   /// indicating the number of scheduling cycles of backscheduling that