#include <vector>
namespace llvm {
- class StringRef;
+class StringRef;
// Target specific information into their own namespaces. These should be
// generated from TableGen because the information is already there, and there
// even if the back-end is not compiled with LLVM, plus we need to create a new
// back-end to TableGen to create these clean tables.
namespace ARM {
- // FPU names.
- enum FPUKind {
- FK_INVALID = 0,
- FK_NONE,
- FK_VFP,
- FK_VFPV2,
- FK_VFPV3,
- FK_VFPV3_FP16,
- FK_VFPV3_D16,
- FK_VFPV3_D16_FP16,
- FK_VFPV3XD,
- FK_VFPV3XD_FP16,
- FK_VFPV4,
- FK_VFPV4_D16,
- FK_FPV4_SP_D16,
- FK_FPV5_D16,
- FK_FPV5_SP_D16,
- FK_FP_ARMV8,
- FK_NEON,
- FK_NEON_FP16,
- FK_NEON_VFPV4,
- FK_NEON_FP_ARMV8,
- FK_CRYPTO_NEON_FP_ARMV8,
- FK_SOFTVFP,
- FK_LAST
- };
-
- // FPU Version
- enum FPUVersion {
- FV_NONE = 0,
- FV_VFPV2,
- FV_VFPV3,
- FV_VFPV3_FP16,
- FV_VFPV4,
- FV_VFPV5
- };
-
- // An FPU name implies one of three levels of Neon support:
- enum NeonSupportLevel {
- NS_None = 0, ///< No Neon
- NS_Neon, ///< Neon
- NS_Crypto ///< Neon with Crypto
- };
-
- // An FPU name restricts the FPU in one of three ways:
- enum FPURestriction {
- FR_None = 0, ///< No restriction
- FR_D16, ///< Only 16 D registers
- FR_SP_D16 ///< Only single-precision instructions, with 16 D registers
- };
-
- // Arch names.
- enum ArchKind {
- AK_INVALID = 0,
- AK_ARMV2,
- AK_ARMV2A,
- AK_ARMV3,
- AK_ARMV3M,
- AK_ARMV4,
- AK_ARMV4T,
- AK_ARMV5T,
- AK_ARMV5TE,
- AK_ARMV5TEJ,
- AK_ARMV6,
- AK_ARMV6K,
- AK_ARMV6T2,
- AK_ARMV6Z,
- AK_ARMV6ZK,
- AK_ARMV6M,
- AK_ARMV6SM,
- AK_ARMV7A,
- AK_ARMV7R,
- AK_ARMV7M,
- AK_ARMV7EM,
- AK_ARMV8A,
- AK_ARMV8_1A,
- // Non-standard Arch names.
- AK_IWMMXT,
- AK_IWMMXT2,
- AK_XSCALE,
- AK_ARMV5,
- AK_ARMV5E,
- AK_ARMV6J,
- AK_ARMV6HL,
- AK_ARMV7,
- AK_ARMV7L,
- AK_ARMV7HL,
- AK_ARMV7S,
- AK_ARMV7K,
- AK_LAST
- };
-
- // Arch extension modifiers for CPUs.
- enum ArchExtKind : unsigned {
- AEK_INVALID = 0x0,
- AEK_NONE = 0x1,
- AEK_CRC = 0x2,
- AEK_CRYPTO = 0x4,
- AEK_FP = 0x8,
- AEK_HWDIV = 0x10,
- AEK_HWDIVARM = 0x20,
- AEK_MP = 0x40,
- AEK_SIMD = 0x80,
- AEK_SEC = 0x100,
- AEK_VIRT = 0x200,
- // Unsupported extensions.
- AEK_OS = 0x8000000,
- AEK_IWMMXT = 0x10000000,
- AEK_IWMMXT2 = 0x20000000,
- AEK_MAVERICK = 0x40000000,
- AEK_XSCALE = 0x80000000,
- };
-
- // ISA kinds.
- enum ISAKind {
- IK_INVALID = 0,
- IK_ARM,
- IK_THUMB,
- IK_AARCH64
- };
-
- // Endianness
- // FIXME: BE8 vs. BE32?
- enum EndianKind {
- EK_INVALID = 0,
- EK_LITTLE,
- EK_BIG
- };
-
- // v6/v7/v8 Profile
- enum ProfileKind {
- PK_INVALID = 0,
- PK_A,
- PK_R,
- PK_M
- };
-} // namespace ARM
-// Target Parsers, one per architecture.
-class ARMTargetParser {
- static StringRef getHWDivSynonym(StringRef HWDiv);
- static StringRef getFPUSynonym(StringRef FPU);
- static StringRef getArchSynonym(StringRef Arch);
-
-public:
- static StringRef getCanonicalArchName(StringRef Arch);
-
- // Information by ID
- static const char * getFPUName(unsigned FPUKind);
- static unsigned getFPUVersion(unsigned FPUKind);
- static unsigned getFPUNeonSupportLevel(unsigned FPUKind);
- static unsigned getFPURestriction(unsigned FPUKind);
- static unsigned getDefaultFPU(StringRef CPU);
- // FIXME: This should be moved to TargetTuple once it exists
- static bool getFPUFeatures(unsigned FPUKind,
- std::vector<const char*> &Features);
- static bool getHWDivFeatures(unsigned HWDivKind,
- std::vector<const char*> &Features);
- static const char * getArchName(unsigned ArchKind);
- static unsigned getArchAttr(unsigned ArchKind);
- static const char * getCPUAttr(unsigned ArchKind);
- static const char * getSubArch(unsigned ArchKind);
- static const char * getArchExtName(unsigned ArchExtKind);
- static const char * getHWDivName(unsigned HWDivKind);
- static const char * getDefaultCPU(StringRef Arch);
-
- // Parser
- static unsigned parseHWDiv(StringRef HWDiv);
- static unsigned parseFPU(StringRef FPU);
- static unsigned parseArch(StringRef Arch);
- static unsigned parseArchExt(StringRef ArchExt);
- static unsigned parseCPUArch(StringRef CPU);
- static unsigned parseArchISA(StringRef Arch);
- static unsigned parseArchEndian(StringRef Arch);
- static unsigned parseArchProfile(StringRef Arch);
- static unsigned parseArchVersion(StringRef Arch);
+// FPU names.
+enum FPUKind {
+#define ARM_FPU(NAME, KIND, VERSION, NEON_SUPPORT, RESTRICTION) KIND,
+#include "ARMTargetParser.def"
+ FK_LAST
+};
+
+// FPU Version
+enum FPUVersion {
+ FV_NONE = 0,
+ FV_VFPV2,
+ FV_VFPV3,
+ FV_VFPV3_FP16,
+ FV_VFPV4,
+ FV_VFPV5
+};
+
+// An FPU name implies one of three levels of Neon support:
+enum NeonSupportLevel {
+ NS_None = 0, ///< No Neon
+ NS_Neon, ///< Neon
+ NS_Crypto ///< Neon with Crypto
+};
+
+// An FPU name restricts the FPU in one of three ways:
+enum FPURestriction {
+ FR_None = 0, ///< No restriction
+ FR_D16, ///< Only 16 D registers
+ FR_SP_D16 ///< Only single-precision instructions, with 16 D registers
+};
+
+// Arch names.
+enum ArchKind {
+#define ARM_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU, ARCH_BASE_EXT) ID,
+#include "ARMTargetParser.def"
+ AK_LAST
+};
+// Arch extension modifiers for CPUs.
+enum ArchExtKind : unsigned {
+ AEK_INVALID = 0x0,
+ AEK_NONE = 0x1,
+ AEK_CRC = 0x2,
+ AEK_CRYPTO = 0x4,
+ AEK_FP = 0x8,
+ AEK_HWDIV = 0x10,
+ AEK_HWDIVARM = 0x20,
+ AEK_MP = 0x40,
+ AEK_SIMD = 0x80,
+ AEK_SEC = 0x100,
+ AEK_VIRT = 0x200,
+ AEK_DSP = 0x400,
+ // Unsupported extensions.
+ AEK_OS = 0x8000000,
+ AEK_IWMMXT = 0x10000000,
+ AEK_IWMMXT2 = 0x20000000,
+ AEK_MAVERICK = 0x40000000,
+ AEK_XSCALE = 0x80000000,
};
+// ISA kinds.
+enum ISAKind { IK_INVALID = 0, IK_ARM, IK_THUMB, IK_AARCH64 };
+
+// Endianness
+// FIXME: BE8 vs. BE32?
+enum EndianKind { EK_INVALID = 0, EK_LITTLE, EK_BIG };
+
+// v6/v7/v8 Profile
+enum ProfileKind { PK_INVALID = 0, PK_A, PK_R, PK_M };
+
+StringRef getCanonicalArchName(StringRef Arch);
+
+// Information by ID
+StringRef getFPUName(unsigned FPUKind);
+unsigned getFPUVersion(unsigned FPUKind);
+unsigned getFPUNeonSupportLevel(unsigned FPUKind);
+unsigned getFPURestriction(unsigned FPUKind);
+
+// FIXME: These should be moved to TargetTuple once it exists
+bool getFPUFeatures(unsigned FPUKind, std::vector<const char *> &Features);
+bool getHWDivFeatures(unsigned HWDivKind, std::vector<const char *> &Features);
+bool getExtensionFeatures(unsigned Extensions,
+ std::vector<const char*> &Features);
+
+StringRef getArchName(unsigned ArchKind);
+unsigned getArchAttr(unsigned ArchKind);
+StringRef getCPUAttr(unsigned ArchKind);
+StringRef getSubArch(unsigned ArchKind);
+StringRef getArchExtName(unsigned ArchExtKind);
+const char *getArchExtFeature(StringRef ArchExt);
+StringRef getHWDivName(unsigned HWDivKind);
+
+// Information by Name
+unsigned getDefaultFPU(StringRef CPU, unsigned ArchKind);
+unsigned getDefaultExtensions(StringRef CPU, unsigned ArchKind);
+StringRef getDefaultCPU(StringRef Arch);
+
+// Parser
+unsigned parseHWDiv(StringRef HWDiv);
+unsigned parseFPU(StringRef FPU);
+unsigned parseArch(StringRef Arch);
+unsigned parseArchExt(StringRef ArchExt);
+unsigned parseCPUArch(StringRef CPU);
+unsigned parseArchISA(StringRef Arch);
+unsigned parseArchEndian(StringRef Arch);
+unsigned parseArchProfile(StringRef Arch);
+unsigned parseArchVersion(StringRef Arch);
+
+} // namespace ARM
} // namespace llvm
#endif
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