};
// Machine architectures
+// See current registered ELF machine architectures at:
+// http://www.uxsglobal.com/developers/gabi/latest/ch4.eheader.html
enum {
EM_NONE = 0, // No machine
EM_M32 = 1, // AT&T WE 32100
EM_RL78 = 197, // Renesas RL78 family
EM_VIDEOCORE5 = 198, // Broadcom VideoCore V processor
EM_78KOR = 199, // Renesas 78KOR family
- EM_56800EX = 200 // Freescale 56800EX Digital Signal Controller (DSC)
+ EM_56800EX = 200, // Freescale 56800EX Digital Signal Controller (DSC)
+ EM_BA1 = 201, // Beyond BA1 CPU architecture
+ EM_BA2 = 202, // Beyond BA2 CPU architecture
+ EM_XCORE = 203, // XMOS xCORE processor family
+ EM_MCHP_PIC = 204, // Microchip 8-bit PIC(r) family
+ EM_INTEL205 = 205, // Reserved by Intel
+ EM_INTEL206 = 206, // Reserved by Intel
+ EM_INTEL207 = 207, // Reserved by Intel
+ EM_INTEL208 = 208, // Reserved by Intel
+ EM_INTEL209 = 209, // Reserved by Intel
+ EM_KM32 = 210, // KM211 KM32 32-bit processor
+ EM_KMX32 = 211, // KM211 KMX32 32-bit processor
+ EM_KMX16 = 212, // KM211 KMX16 16-bit processor
+ EM_KMX8 = 213, // KM211 KMX8 8-bit processor
+ EM_KVARC = 214, // KM211 KVARC processor
+ EM_CDP = 215, // Paneve CDP architecture family
+ EM_COGE = 216, // Cognitive Smart Memory Processor
+ EM_COOL = 217, // iCelero CoolEngine
+ EM_NORC = 218, // Nanoradio Optimized RISC
+ EM_CSR_KALIMBA = 219 // CSR Kalimba architecture family
};
// Object file classes.
R_PPC_GOT16_LO = 15,
R_PPC_GOT16_HI = 16,
R_PPC_GOT16_HA = 17,
+ R_PPC_PLTREL24 = 18,
+ R_PPC_JMP_SLOT = 21,
R_PPC_REL32 = 26,
R_PPC_TLS = 67,
R_PPC_DTPMOD32 = 68,
R_PPC_REL16_HA = 252
};
+// Specific e_flags for PPC64
+enum {
+ // e_flags bits specifying ABI:
+ // 1 for original ABI using function descriptors,
+ // 2 for revised ABI without function descriptors,
+ // 0 for unspecified or not using any features affected by the differences.
+ EF_PPC64_ABI = 3
+};
+
+// Special values for the st_other field in the symbol table entry for PPC64.
+enum {
+ STO_PPC64_LOCAL_BIT = 5,
+ STO_PPC64_LOCAL_MASK = (7 << STO_PPC64_LOCAL_BIT)
+};
+static inline int64_t
+decodePPC64LocalEntryOffset(unsigned Other) {
+ unsigned Val = (Other & STO_PPC64_LOCAL_MASK) >> STO_PPC64_LOCAL_BIT;
+ return ((1 << Val) >> 2) << 2;
+}
+static inline unsigned
+encodePPC64LocalEntryOffset(int64_t Offset) {
+ unsigned Val = (Offset >= 4 * 4
+ ? (Offset >= 8 * 4
+ ? (Offset >= 16 * 4 ? 6 : 5)
+ : 4)
+ : (Offset >= 2 * 4
+ ? 3
+ : (Offset >= 1 * 4 ? 2 : 0)));
+ return Val << STO_PPC64_LOCAL_BIT;
+}
+
// ELF Relocation types for PPC64
enum {
R_PPC64_NONE = 0,
R_PPC64_GOT16_LO = 15,
R_PPC64_GOT16_HI = 16,
R_PPC64_GOT16_HA = 17,
+ R_PPC64_JMP_SLOT = 21,
R_PPC64_REL32 = 26,
R_PPC64_ADDR64 = 38,
R_PPC64_ADDR16_HIGHER = 39,
R_AARCH64_LDST128_ABS_LO12_NC = 0x12b,
+ R_AARCH64_GOTREL64 = 0x133,
+ R_AARCH64_GOTREL32 = 0x134,
+
R_AARCH64_ADR_GOT_PAGE = 0x137,
R_AARCH64_LD64_GOT_LO12_NC = 0x138,
R_AARCH64_TLSDESC_LD64_LO12_NC = 0x233,
R_AARCH64_TLSDESC_ADD_LO12_NC = 0x234,
- R_AARCH64_TLSDESC_CALL = 0x239
+ R_AARCH64_TLSDESC_CALL = 0x239,
+
+ R_AARCH64_COPY = 0x400,
+ R_AARCH64_GLOB_DAT = 0x401,
+ R_AARCH64_JUMP_SLOT = 0x402,
+ R_AARCH64_RELATIVE = 0x403,
+ R_AARCH64_TLS_DTPREL64 = 0x404,
+ R_AARCH64_TLS_DTPMOD64 = 0x405,
+ R_AARCH64_TLS_TPREL64 = 0x406,
+ R_AARCH64_TLSDESC = 0x407,
+ R_AARCH64_IRELATIVE = 0x408
};
// ARM Specific e_flags
EF_MIPS_CPIC = 0x00000004, // Call object with Position independent code
EF_MIPS_ABI2 = 0x00000020,
EF_MIPS_32BITMODE = 0x00000100,
+ EF_MIPS_NAN2008 = 0x00000400, // Uses IEE 754-2008 NaN encoding
EF_MIPS_ABI_O32 = 0x00001000, // This file follows the first MIPS 32 bit ABI
//ARCH_ASE
EF_MIPS_ARCH_64 = 0x60000000, // MIPS64 instruction set per linux not elf.h
EF_MIPS_ARCH_32R2 = 0x70000000, // mips32r2
EF_MIPS_ARCH_64R2 = 0x80000000, // mips64r2
+ EF_MIPS_ARCH_32R6 = 0x90000000, // mips32r6
+ EF_MIPS_ARCH_64R6 = 0xa0000000, // mips64r6
EF_MIPS_ARCH = 0xf0000000 // Mask for applying EF_MIPS_ARCH_ variant
};
// ELF Relocation types for Mips
-// .
enum {
R_MIPS_NONE = 0,
R_MIPS_16 = 1,
R_MIPS_GPREL16 = 7,
R_MIPS_LITERAL = 8,
R_MIPS_GOT16 = 9,
- R_MIPS_GOT = 9,
R_MIPS_PC16 = 10,
R_MIPS_CALL16 = 11,
R_MIPS_GPREL32 = 12,
R_MIPS_TLS_TPREL_HI16 = 49,
R_MIPS_TLS_TPREL_LO16 = 50,
R_MIPS_GLOB_DAT = 51,
+ R_MIPS_PC21_S2 = 60,
+ R_MIPS_PC26_S2 = 61,
+ R_MIPS_PC18_S3 = 62,
+ R_MIPS_PC19_S2 = 63,
+ R_MIPS_PCHI16 = 64,
+ R_MIPS_PCLO16 = 65,
+ R_MIPS16_GOT16 = 102,
+ R_MIPS16_HI16 = 104,
+ R_MIPS16_LO16 = 105,
R_MIPS_COPY = 126,
R_MIPS_JUMP_SLOT = 127,
R_MICROMIPS_26_S1 = 133,
// Special values for the st_other field in the symbol table entry for MIPS.
enum {
- STO_MIPS_MICROMIPS = 0x80 // MIPS Specific ISA for MicroMips
+ STO_MIPS_OPTIONAL = 0x04, // Symbol whose definition is optional
+ STO_MIPS_PLT = 0x08, // PLT entry related dynamic table record
+ STO_MIPS_PIC = 0x20, // PIC func in an object mixes PIC/non-PIC
+ STO_MIPS_MICROMIPS = 0x80, // MIPS Specific ISA for MicroMips
+ STO_MIPS_MIPS16 = 0xf0 // MIPS Specific ISA for Mips16
};
// Hexagon Specific e_flags
SHT_MIPS_REGINFO = 0x70000006, // Register usage information
SHT_MIPS_OPTIONS = 0x7000000d, // General options
+ SHT_MIPS_ABIFLAGS = 0x7000002a, // ABI information.
SHT_HIPROC = 0x7fffffff, // Highest processor arch-specific type.
SHT_LOUSER = 0x80000000, // Lowest type reserved for applications.
Elf32_Addr st_value; // Value or address associated with the symbol
Elf32_Word st_size; // Size of the symbol
unsigned char st_info; // Symbol's type and binding attributes
- unsigned char st_other; // Must be zero; reserved
+ unsigned char st_other; // Visibility in the lower 2 bits, the rest is zero
Elf32_Half st_shndx; // Which section (header table index) it's defined in
// These accessors and mutators correspond to the ELF32_ST_BIND,
// ELF32_ST_TYPE, and ELF32_ST_INFO macros defined in the ELF specification:
unsigned char getBinding() const { return st_info >> 4; }
unsigned char getType() const { return st_info & 0x0f; }
+ unsigned char getVisibility() const { return st_other & 0x3; }
void setBinding(unsigned char b) { setBindingAndType(b, getType()); }
void setType(unsigned char t) { setBindingAndType(getBinding(), t); }
void setBindingAndType(unsigned char b, unsigned char t) {
st_info = (b << 4) + (t & 0x0f);
}
+ void setVisibility(unsigned char v) {
+ st_other = (st_other & ~0x3) | (v & 0x3);
+ }
};
// Symbol table entries for ELF64.
struct Elf64_Sym {
Elf64_Word st_name; // Symbol name (index into string table)
unsigned char st_info; // Symbol's type and binding attributes
- unsigned char st_other; // Must be zero; reserved
+ unsigned char st_other; // Visibility in the lower 2 bits, the rest is zero
Elf64_Half st_shndx; // Which section (header tbl index) it's defined in
Elf64_Addr st_value; // Value or address associated with the symbol
Elf64_Xword st_size; // Size of the symbol
// symbol table entries.
unsigned char getBinding() const { return st_info >> 4; }
unsigned char getType() const { return st_info & 0x0f; }
+ unsigned char getVisibility() const { return st_other & 0x3; }
void setBinding(unsigned char b) { setBindingAndType(b, getType()); }
void setType(unsigned char t) { setBindingAndType(getBinding(), t); }
void setBindingAndType(unsigned char b, unsigned char t) {
st_info = (b << 4) + (t & 0x0f);
}
+ void setVisibility(unsigned char v) {
+ st_other = (st_other & ~0x3) | (v & 0x3);
+ }
};
// The size (in bytes) of symbol table entries.
// MIPS program header types.
PT_MIPS_REGINFO = 0x70000000, // Register usage information.
PT_MIPS_RTPROC = 0x70000001, // Runtime procedure table.
- PT_MIPS_OPTIONS = 0x70000002 // Options segment.
+ PT_MIPS_OPTIONS = 0x70000002, // Options segment.
+ PT_MIPS_ABIFLAGS = 0x70000003 // Abiflags segment.
};
// Segment flag bits.
DT_LOPROC = 0x70000000, // Start of processor specific tags.
DT_HIPROC = 0x7FFFFFFF, // End of processor specific tags.
+ DT_GNU_HASH = 0x6FFFFEF5, // Reference to the GNU hash table.
DT_RELACOUNT = 0x6FFFFFF9, // ELF32_Rela count.
DT_RELCOUNT = 0x6FFFFFFA, // ELF32_Rel count.
projects / oota-llvm.git / blobdiff