<div class="doc_text">
-<p>In general, you want to follow the format of X86 or PowerPC (in
-<tt>lib/Target</tt>).</p>
+<p>In general, you want to follow the format of SPARC, X86 or PowerPC (in
+<tt>lib/Target</tt>). SPARC is the simplest backend, and is RISC, so if
+you're working on a RISC target, it is a good one to start with.</p>
<p>To create a static compiler (one that emits text assembly), you need to
implement the following:</p>
<ul>
-<li>Describe the register set
+<li>Describe the register set.
<ul>
<li>Create a <a href="TableGenFundamentals.html">TableGen</a> description of
the register set and register classes</li>
<li>Implement a subclass of <tt><a
href="CodeGenerator.html#mregisterinfo">MRegisterInfo</a></tt></li>
</ul></li>
-<li>Describe the instruction set
+<li>Describe the instruction set.
<ul>
<li>Create a <a href="TableGenFundamentals.html">TableGen</a> description of
the instruction set</li>
<li>Implement a subclass of <tt><a
href="CodeGenerator.html#targetinstrinfo">TargetInstrInfo</a></tt></li>
</ul></li>
-<li>Describe the target machine
+<li>Describe the target machine.
<ul>
<li>Create a <a href="TableGenFundamentals.html">TableGen</a> description of
the target that describes the pointer size and references the instruction
href="CodeGenerator.html#targetmachine">TargetMachine</a></tt>, which
configures <tt><a href="CodeGenerator.html#targetdata">TargetData</a></tt>
correctly</li>
+ <li>Register your new target using the <tt>RegisterTarget</tt>
+ template:<br><br>
+<div class="doc_code"><pre>
+RegisterTarget<<em>MyTargetMachine</em>> M("short_name", " Target name");
+</pre></div>
+ <br>Here, <em>MyTargetMachine</em> is the name of your implemented
+ subclass of <tt><a
+ href="CodeGenerator.html#targetmachine">TargetMachine</a></tt>,
+ <em>short_name</em> is the option that will be active following
+ <tt>-march=</tt> to select a target in llc and lli, and the last string
+ is the description of your target to appear in <tt>-help</tt>
+ listing.</li>
</ul></li>
-<li>Implement the assembly printer for the architecture. Usually, if you have
-described the instruction set with the assembly printer generator in mind, that
-step can be almost automated.</li>
-</ul>
-
-<p>Now, for static code generation you also need to write an instruction
-selector for your platform: see <tt>lib/Target/*/*ISelSimple.cpp</tt> which
-is no longer "simple" but it gives you the idea: you have to be able to create
-MachineInstrs for any given LLVM instruction using the <tt>InstVisitor</tt>
-pattern, and produce a <tt>MachineFunction</tt> with
-<tt>MachineBasicBlock</tt>s full of <tt><a
-href="CodeGenerator.html#machineinstr">MachineInstr</a></tt>s for a
-corresponding LLVM Function. Creating an instruction selector is perhaps the
-most time-consuming part of creating a back-end.</p>
-
-<p>To create a JIT for your platform:</p>
-
+<li>Implement the assembly printer for the architecture.
+ <ul>
+ <li>Define all of the assembly strings for your target, adding them to the
+ instructions in your *InstrInfo.td file.</li>
+ <li>Implement the <tt>llvm::AsmPrinter</tt> interface.</li>
+ </ul>
+</li>
+<li>Implement an instruction selector for the architecture.
+ <ul>
+ <li>The recommended method is the <a href="CodeGenerator.html#instselect">
+ pattern-matching DAG-to-DAG instruction selector</a> (for example, see
+ the PowerPC backend in PPCISelDAGtoDAG.cpp). Parts of instruction
+ selector creation can be performed by adding patterns to the instructions
+ in your <tt>.td</tt> file.</li>
+ </ul>
+</li>
+<li>Optionally, add subtarget support.
<ul>
-<li>Create a subclass of <tt><a
- href="CodeGenerator.html#targetjitinfo">TargetJITInfo</a></tt></li>
-<li>Create a machine code emitter that will be used to emit binary code
- directly into memory, given <tt>MachineInstr</tt>s</li>
+ <li>If your target has multiple subtargets (e.g. variants with different
+ capabilities), implement the <tt>llvm::TargetSubtarget</tt> interface
+ for your architecture. This allows you to add <tt>-mcpu=</tt> and
+ <tt>-mattr=</tt> options.</li>
+</ul>
+<li>Optionally, add JIT support.
+ <ul>
+ <li>Create a subclass of <tt><a
+ href="CodeGenerator.html#targetjitinfo">TargetJITInfo</a></tt></li>
+ <li>Create a machine code emitter that will be used to emit binary code
+ directly into memory, given <tt>MachineInstr</tt>s</li>
+ </ul>
</ul>
-
-<p>Note that <tt>lib/target/Skeleton</tt> is a clean skeleton for a new target,
-so you might want to start with that and adapt it for your target, and if you
-are wondering how things are done, peek in the X86 or PowerPC target.</p>
-
-<p>The Skeleton target is non-functional but provides the basic building blocks
-you will need for your endeavor.</p>
-
</div>
<!-- _______________________________________________________________________ -->
<ul>
<li><a href="CodeGenerator.html">Code generator</a> -
describes some of the classes in code generation at a high level, but
- it is not (yet) complete.</li>
+ it is not (yet) complete</li>
<li><a href="TableGenFundamentals.html">TableGen fundamentals</a> -
- describes how to use TableGen to describe your target information succinctly
-</li>
+ describes how to use TableGen to describe your target information
+ succinctly</li>
+<li><a href="HowToSubmitABug.html#codegen">Debugging code generation with
+ bugpoint</a> - shows bugpoint usage scenarios to simplify backend
+ development</li>
</ul>
</div>
src="http://www.w3.org/Icons/valid-html401" alt="Valid HTML 4.01!" /></a>
<a href="http://misha.brukman.net">Misha Brukman</a><br>
- <a href="http://llvm.cs.uiuc.edu">The LLVM Compiler Infrastructure</a>
+ <a href="http://llvm.org">The LLVM Compiler Infrastructure</a>
<br>
Last modified: $Date$
</address>
projects / oota-llvm.git / blobdiff