edits for chapter 7

[oota-llvm.git] / docs / CodeGenerator.html

diff --git a/docs/CodeGenerator.html b/docs/CodeGenerator.html
index e77b97048f85ecce3bf24cc633d196a69611dbfd..bb4119c767cf82b6cdea2148a28b0cf4033a3a6e 100644 (file)
--- a/docs/CodeGenerator.html
+++ b/docs/CodeGenerator.html
@@ -98,9 +98,10 @@
 
 <div class="doc_author">
   <p>Written by <a href="mailto:sabre@nondot.org">Chris Lattner</a>,
-                <a href="mailto:isanbard@gmail.com">Bill Wendling</a>, and
+                <a href="mailto:isanbard@gmail.com">Bill Wendling</a>,
                 <a href="mailto:pronesto@gmail.com">Fernando Magno Quintao
-                                                    Pereira</a></p>
+                                                    Pereira</a> and
+                <a href="mailto:jlaskey@mac.com">Jim Laskey</a></p>
 </div>
 
 <div class="doc_warning">
@@ -747,11 +748,8 @@ explains how they work and some of the rationale behind their design.</p>
 <p>
 Instruction Selection is the process of translating LLVM code presented to the
 code generator into target-specific machine instructions.  There are several
-well-known ways to do this in the literature.  In LLVM there are two main forms:
-the SelectionDAG based instruction selector framework and an old-style 'simple'
-instruction selector, which effectively peephole selects each LLVM instruction
-into a series of machine instructions.  We recommend that all targets use the
-SelectionDAG infrastructure.
+well-known ways to do this in the literature.  LLVM uses a SelectionDAG based
+instruction selector.
 </p>
 
 <p>Portions of the DAG instruction selector are generated from the target 
@@ -864,7 +862,11 @@ of the code compiled (if you only get errors printed to the console while using
 this, you probably <a href="ProgrammersManual.html#ViewGraph">need to configure
 your system</a> to add support for it).  The <tt>-view-sched-dags</tt> option
 views the SelectionDAG output from the Select phase and input to the Scheduler
-phase.</p>
+phase.  The <tt>-view-sunit-dags</tt> option views the ScheduleDAG, which is
+based on the final SelectionDAG, with nodes that must be scheduled as a unit
+bundled together into a single node, and with immediate operands and other
+nodes that aren't relevent for scheduling omitted.
+</p>
 
 </div>
 
@@ -1356,7 +1358,7 @@ if that register is being used by the instruction. The method
 <tt>MachineOperand::isDef()</tt> informs if that registers is being
 defined.</p>
 
-<p>We will call physical registers present in the LLVM bytecode before
+<p>We will call physical registers present in the LLVM bitcode before
 register allocation <i>pre-colored registers</i>. Pre-colored
 registers are used in many different situations, for instance, to pass
 parameters of functions calls, and to store results of particular