arm64*-*) llvm_cv_target_arch="AArch64" ;;
arm*-*) llvm_cv_target_arch="ARM" ;;
aarch64*-*) llvm_cv_target_arch="AArch64" ;;
+ avr-*) llvm_cv_target_arch="AVR" ;;
mips-* | mips64-*) llvm_cv_target_arch="Mips" ;;
mipsel-* | mips64el-*) llvm_cv_target_arch="Mips" ;;
xcore-*) llvm_cv_target_arch="XCore" ;;
arm64*-*) host_arch="AArch64" ;;
arm*-*) host_arch="ARM" ;;
aarch64*-*) host_arch="AArch64" ;;
+ avr-*) host_arch="AVR" ;;
mips-* | mips64-*) host_arch="Mips" ;;
mipsel-* | mips64el-*) host_arch="Mips" ;;
xcore-*) host_arch="XCore" ;;
x86_64) TARGET_HAS_JIT=1
;;
ARM) TARGET_HAS_JIT=1
+ ;;
+ AVR) TARGET_HAS_JIT=0
;;
Mips) TARGET_HAS_JIT=1
;;