1 ; RUN: opt -instcombine -S < %s | FileCheck %s
3 %overflow.result = type {i8, i1}
4 %ov.result.32 = type { i32, i1 }
7 declare %overflow.result @llvm.uadd.with.overflow.i8(i8, i8) nounwind readnone
8 declare %overflow.result @llvm.umul.with.overflow.i8(i8, i8) nounwind readnone
9 declare %ov.result.32 @llvm.sadd.with.overflow.i32(i32, i32) nounwind readnone
10 declare %ov.result.32 @llvm.uadd.with.overflow.i32(i32, i32) nounwind readnone
11 declare %ov.result.32 @llvm.ssub.with.overflow.i32(i32, i32) nounwind readnone
12 declare %ov.result.32 @llvm.usub.with.overflow.i32(i32, i32) nounwind readnone
13 declare %ov.result.32 @llvm.smul.with.overflow.i32(i32, i32) nounwind readnone
14 declare %ov.result.32 @llvm.umul.with.overflow.i32(i32, i32) nounwind readnone
15 declare double @llvm.powi.f64(double, i32) nounwind readonly
16 declare i32 @llvm.cttz.i32(i32, i1) nounwind readnone
17 declare i32 @llvm.ctlz.i32(i32, i1) nounwind readnone
18 declare i32 @llvm.ctpop.i32(i32) nounwind readnone
19 declare i8 @llvm.ctlz.i8(i8, i1) nounwind readnone
20 declare double @llvm.cos.f64(double %Val) nounwind readonly
21 declare double @llvm.sin.f64(double %Val) nounwind readonly
23 define i8 @uaddtest1(i8 %A, i8 %B) {
24 %x = call %overflow.result @llvm.uadd.with.overflow.i8(i8 %A, i8 %B)
25 %y = extractvalue %overflow.result %x, 0
27 ; CHECK-LABEL: @uaddtest1(
28 ; CHECK-NEXT: %y = add i8 %A, %B
29 ; CHECK-NEXT: ret i8 %y
32 define i8 @uaddtest2(i8 %A, i8 %B, i1* %overflowPtr) {
33 %and.A = and i8 %A, 127
34 %and.B = and i8 %B, 127
35 %x = call %overflow.result @llvm.uadd.with.overflow.i8(i8 %and.A, i8 %and.B)
36 %y = extractvalue %overflow.result %x, 0
37 %z = extractvalue %overflow.result %x, 1
38 store i1 %z, i1* %overflowPtr
40 ; CHECK-LABEL: @uaddtest2(
41 ; CHECK-NEXT: %and.A = and i8 %A, 127
42 ; CHECK-NEXT: %and.B = and i8 %B, 127
43 ; CHECK-NEXT: %x = add nuw i8 %and.A, %and.B
44 ; CHECK-NEXT: store i1 false, i1* %overflowPtr
45 ; CHECK-NEXT: ret i8 %x
48 define i8 @uaddtest3(i8 %A, i8 %B, i1* %overflowPtr) {
49 %or.A = or i8 %A, -128
50 %or.B = or i8 %B, -128
51 %x = call %overflow.result @llvm.uadd.with.overflow.i8(i8 %or.A, i8 %or.B)
52 %y = extractvalue %overflow.result %x, 0
53 %z = extractvalue %overflow.result %x, 1
54 store i1 %z, i1* %overflowPtr
56 ; CHECK-LABEL: @uaddtest3(
57 ; CHECK-NEXT: %or.A = or i8 %A, -128
58 ; CHECK-NEXT: %or.B = or i8 %B, -128
59 ; CHECK-NEXT: %x = add i8 %or.A, %or.B
60 ; CHECK-NEXT: store i1 true, i1* %overflowPtr
61 ; CHECK-NEXT: ret i8 %x
64 define i8 @uaddtest4(i8 %A, i1* %overflowPtr) {
65 %x = call %overflow.result @llvm.uadd.with.overflow.i8(i8 undef, i8 %A)
66 %y = extractvalue %overflow.result %x, 0
67 %z = extractvalue %overflow.result %x, 1
68 store i1 %z, i1* %overflowPtr
70 ; CHECK-LABEL: @uaddtest4(
71 ; CHECK-NEXT: ret i8 undef
74 define i8 @uaddtest5(i8 %A, i1* %overflowPtr) {
75 %x = call %overflow.result @llvm.uadd.with.overflow.i8(i8 0, i8 %A)
76 %y = extractvalue %overflow.result %x, 0
77 %z = extractvalue %overflow.result %x, 1
78 store i1 %z, i1* %overflowPtr
80 ; CHECK-LABEL: @uaddtest5(
84 define i1 @uaddtest6(i8 %A, i8 %B) {
85 %x = call %overflow.result @llvm.uadd.with.overflow.i8(i8 %A, i8 -4)
86 %z = extractvalue %overflow.result %x, 1
88 ; CHECK-LABEL: @uaddtest6(
89 ; CHECK-NEXT: %z = icmp ugt i8 %A, 3
90 ; CHECK-NEXT: ret i1 %z
93 define i8 @uaddtest7(i8 %A, i8 %B) {
94 %x = call %overflow.result @llvm.uadd.with.overflow.i8(i8 %A, i8 %B)
95 %z = extractvalue %overflow.result %x, 0
97 ; CHECK-LABEL: @uaddtest7(
98 ; CHECK-NEXT: %z = add i8 %A, %B
99 ; CHECK-NEXT: ret i8 %z
103 define %ov.result.32 @saddtest_nsw(i8 %a, i8 %b) {
104 %A = sext i8 %a to i32
105 %B = sext i8 %b to i32
106 %x = call %ov.result.32 @llvm.sadd.with.overflow.i32(i32 %A, i32 %B)
108 ; CHECK-LABEL: @saddtest_nsw
109 ; CHECK: %x = add nsw i32 %A, %B
110 ; CHECK-NEXT: %1 = insertvalue %ov.result.32 { i32 undef, i1 false }, i32 %x, 0
111 ; CHECK-NEXT: ret %ov.result.32 %1
114 define %ov.result.32 @uaddtest_nuw(i32 %a, i32 %b) {
115 %A = and i32 %a, 2147483647
116 %B = and i32 %b, 2147483647
117 %x = call %ov.result.32 @llvm.uadd.with.overflow.i32(i32 %A, i32 %B)
119 ; CHECK-LABEL: @uaddtest_nuw
120 ; CHECK: %x = add nuw i32 %A, %B
121 ; CHECK-NEXT: %1 = insertvalue %ov.result.32 { i32 undef, i1 false }, i32 %x, 0
122 ; CHECK-NEXT: ret %ov.result.32 %1
125 define %ov.result.32 @ssubtest_nsw(i8 %a, i8 %b) {
126 %A = sext i8 %a to i32
127 %B = sext i8 %b to i32
128 %x = call %ov.result.32 @llvm.ssub.with.overflow.i32(i32 %A, i32 %B)
130 ; CHECK-LABEL: @ssubtest_nsw
131 ; CHECK: %x = sub nsw i32 %A, %B
132 ; CHECK-NEXT: %1 = insertvalue %ov.result.32 { i32 undef, i1 false }, i32 %x, 0
133 ; CHECK-NEXT: ret %ov.result.32 %1
136 define %ov.result.32 @usubtest_nuw(i32 %a, i32 %b) {
137 %A = or i32 %a, 2147483648
138 %B = and i32 %b, 2147483647
139 %x = call %ov.result.32 @llvm.usub.with.overflow.i32(i32 %A, i32 %B)
141 ; CHECK-LABEL: @usubtest_nuw
142 ; CHECK: %x = sub nuw i32 %A, %B
143 ; CHECK-NEXT: %1 = insertvalue %ov.result.32 { i32 undef, i1 false }, i32 %x, 0
144 ; CHECK-NEXT: ret %ov.result.32 %1
147 define %ov.result.32 @smultest1_nsw(i32 %a, i32 %b) {
148 %A = and i32 %a, 4095 ; 0xfff
149 %B = and i32 %b, 524287; 0x7ffff
150 %x = call %ov.result.32 @llvm.smul.with.overflow.i32(i32 %A, i32 %B)
152 ; CHECK-LABEL: @smultest1_nsw
153 ; CHECK: %x = mul nuw nsw i32 %A, %B
154 ; CHECK-NEXT: %1 = insertvalue %ov.result.32 { i32 undef, i1 false }, i32 %x, 0
155 ; CHECK-NEXT: ret %ov.result.32 %1
158 define %ov.result.32 @smultest2_nsw(i32 %a, i32 %b) {
161 %x = call %ov.result.32 @llvm.smul.with.overflow.i32(i32 %A, i32 %B)
163 ; CHECK-LABEL: @smultest2_nsw
164 ; CHECK: %x = mul nsw i32 %A, %B
165 ; CHECK-NEXT: %1 = insertvalue %ov.result.32 { i32 undef, i1 false }, i32 %x, 0
166 ; CHECK-NEXT: ret %ov.result.32 %1
169 define %ov.result.32 @smultest3_sw(i32 %a, i32 %b) {
172 %x = call %ov.result.32 @llvm.smul.with.overflow.i32(i32 %A, i32 %B)
174 ; CHECK-LABEL: @smultest3_sw
175 ; CHECK: %x = call %ov.result.32 @llvm.smul.with.overflow.i32(i32 %A, i32 %B)
176 ; CHECK-NEXT: ret %ov.result.32 %x
179 define %ov.result.32 @umultest_nuw(i32 %a, i32 %b) {
180 %A = and i32 %a, 65535 ; 0xffff
181 %B = and i32 %b, 65535 ; 0xffff
182 %x = call %ov.result.32 @llvm.umul.with.overflow.i32(i32 %A, i32 %B)
184 ; CHECK-LABEL: @umultest_nuw
185 ; CHECK: %x = mul nuw i32 %A, %B
186 ; CHECK-NEXT: %1 = insertvalue %ov.result.32 { i32 undef, i1 false }, i32 %x, 0
187 ; CHECK-NEXT: ret %ov.result.32 %1
190 define i8 @umultest1(i8 %A, i1* %overflowPtr) {
191 %x = call %overflow.result @llvm.umul.with.overflow.i8(i8 0, i8 %A)
192 %y = extractvalue %overflow.result %x, 0
193 %z = extractvalue %overflow.result %x, 1
194 store i1 %z, i1* %overflowPtr
196 ; CHECK-LABEL: @umultest1(
197 ; CHECK-NEXT: store i1 false, i1* %overflowPtr
198 ; CHECK-NEXT: ret i8 0
201 define i8 @umultest2(i8 %A, i1* %overflowPtr) {
202 %x = call %overflow.result @llvm.umul.with.overflow.i8(i8 1, i8 %A)
203 %y = extractvalue %overflow.result %x, 0
204 %z = extractvalue %overflow.result %x, 1
205 store i1 %z, i1* %overflowPtr
207 ; CHECK-LABEL: @umultest2(
208 ; CHECK-NEXT: store i1 false, i1* %overflowPtr
209 ; CHECK-NEXT: ret i8 %A
212 define i32 @umultest3(i32 %n) nounwind {
213 %shr = lshr i32 %n, 2
214 %mul = call %ov.result.32 @llvm.umul.with.overflow.i32(i32 %shr, i32 3)
215 %ov = extractvalue %ov.result.32 %mul, 1
216 %res = extractvalue %ov.result.32 %mul, 0
217 %ret = select i1 %ov, i32 -1, i32 %res
219 ; CHECK-LABEL: @umultest3(
221 ; CHECK-NEXT: mul nuw
225 define i32 @umultest4(i32 %n) nounwind {
226 %shr = lshr i32 %n, 1
227 %mul = call %ov.result.32 @llvm.umul.with.overflow.i32(i32 %shr, i32 4)
228 %ov = extractvalue %ov.result.32 %mul, 1
229 %res = extractvalue %ov.result.32 %mul, 0
230 %ret = select i1 %ov, i32 -1, i32 %res
232 ; CHECK-LABEL: @umultest4(
233 ; CHECK: umul.with.overflow
236 define %ov.result.32 @umultest5(i32 %x, i32 %y) nounwind {
237 %or_x = or i32 %x, 2147483648
238 %or_y = or i32 %y, 2147483648
239 %mul = call %ov.result.32 @llvm.umul.with.overflow.i32(i32 %or_x, i32 %or_y)
240 ret %ov.result.32 %mul
241 ; CHECK-LABEL: @umultest5(
242 ; CHECK-NEXT: %[[or_x:.*]] = or i32 %x, -2147483648
243 ; CHECK-NEXT: %[[or_y:.*]] = or i32 %y, -2147483648
244 ; CHECK-NEXT: %[[mul:.*]] = mul i32 %[[or_x]], %[[or_y]]
245 ; CHECK-NEXT: %[[ret:.*]] = insertvalue %ov.result.32 { i32 undef, i1 true }, i32 %[[mul]], 0
246 ; CHECK-NEXT: ret %ov.result.32 %[[ret]]
249 define void @powi(double %V, double *%P) {
251 %A = tail call double @llvm.powi.f64(double %V, i32 -1) nounwind
252 store volatile double %A, double* %P
254 %B = tail call double @llvm.powi.f64(double %V, i32 0) nounwind
255 store volatile double %B, double* %P
257 %C = tail call double @llvm.powi.f64(double %V, i32 1) nounwind
258 store volatile double %C, double* %P
260 ; CHECK-LABEL: @powi(
261 ; CHECK: %A = fdiv double 1.0{{.*}}, %V
262 ; CHECK: store volatile double %A,
263 ; CHECK: store volatile double 1.0
264 ; CHECK: store volatile double %V
267 define i32 @cttz(i32 %a) {
270 %and = and i32 %or, -8
271 %count = tail call i32 @llvm.cttz.i32(i32 %and, i1 true) nounwind readnone
273 ; CHECK-LABEL: @cttz(
275 ; CHECK-NEXT: ret i32 3
278 define i8 @ctlz(i8 %a) {
281 %and = and i8 %or, 63
282 %count = tail call i8 @llvm.ctlz.i8(i8 %and, i1 true) nounwind readnone
284 ; CHECK-LABEL: @ctlz(
286 ; CHECK-NEXT: ret i8 2
289 define void @cmp.simplify(i32 %a, i32 %b, i1* %c) {
291 %lz = tail call i32 @llvm.ctlz.i32(i32 %a, i1 false) nounwind readnone
292 %lz.cmp = icmp eq i32 %lz, 32
293 store volatile i1 %lz.cmp, i1* %c
294 %tz = tail call i32 @llvm.cttz.i32(i32 %a, i1 false) nounwind readnone
295 %tz.cmp = icmp ne i32 %tz, 32
296 store volatile i1 %tz.cmp, i1* %c
297 %pop = tail call i32 @llvm.ctpop.i32(i32 %b) nounwind readnone
298 %pop.cmp = icmp eq i32 %pop, 0
299 store volatile i1 %pop.cmp, i1* %c
301 ; CHECK: @cmp.simplify
303 ; CHECK-NEXT: %lz.cmp = icmp eq i32 %a, 0
304 ; CHECK-NEXT: store volatile i1 %lz.cmp, i1* %c
305 ; CHECK-NEXT: %tz.cmp = icmp ne i32 %a, 0
306 ; CHECK-NEXT: store volatile i1 %tz.cmp, i1* %c
307 ; CHECK-NEXT: %pop.cmp = icmp eq i32 %b, 0
308 ; CHECK-NEXT: store volatile i1 %pop.cmp, i1* %c
311 define i32 @cttz_simplify1a(i32 %x) nounwind readnone ssp {
312 %tmp1 = tail call i32 @llvm.ctlz.i32(i32 %x, i1 false)
313 %shr3 = lshr i32 %tmp1, 5
316 ; CHECK-LABEL: @cttz_simplify1a(
317 ; CHECK: icmp eq i32 %x, 0
318 ; CHECK-NEXT: zext i1
319 ; CHECK-NEXT: ret i32
322 define i32 @cttz_simplify1b(i32 %x) nounwind readnone ssp {
323 %tmp1 = tail call i32 @llvm.ctlz.i32(i32 %x, i1 true)
324 %shr3 = lshr i32 %tmp1, 5
327 ; CHECK-LABEL: @cttz_simplify1b(
328 ; CHECK-NEXT: ret i32 0
331 define i32 @ctlz_undef(i32 %Value) nounwind {
332 %ctlz = call i32 @llvm.ctlz.i32(i32 0, i1 true)
335 ; CHECK-LABEL: @ctlz_undef(
336 ; CHECK-NEXT: ret i32 undef
339 define i32 @cttz_undef(i32 %Value) nounwind {
340 %cttz = call i32 @llvm.cttz.i32(i32 0, i1 true)
343 ; CHECK-LABEL: @cttz_undef(
344 ; CHECK-NEXT: ret i32 undef
347 define i32 @ctlz_select(i32 %Value) nounwind {
348 %tobool = icmp ne i32 %Value, 0
349 %ctlz = call i32 @llvm.ctlz.i32(i32 %Value, i1 true)
350 %s = select i1 %tobool, i32 %ctlz, i32 32
353 ; CHECK-LABEL: @ctlz_select(
354 ; CHECK-NEXT: call i32 @llvm.ctlz.i32(i32 %Value, i1 false)
355 ; CHECK-NEXT: ret i32
358 define i32 @cttz_select(i32 %Value) nounwind {
359 %tobool = icmp ne i32 %Value, 0
360 %cttz = call i32 @llvm.cttz.i32(i32 %Value, i1 true)
361 %s = select i1 %tobool, i32 %cttz, i32 32
364 ; CHECK-LABEL: @cttz_select(
365 ; CHECK-NEXT: call i32 @llvm.cttz.i32(i32 %Value, i1 false)
366 ; CHECK-NEXT: ret i32
369 ; CHECK-LABEL: @overflow_div_add(
370 ; CHECK: ret i1 false
371 define i1 @overflow_div_add(i32 %v1, i32 %v2) nounwind {
373 %div = sdiv i32 %v1, 2
374 %t = call %ov.result.32 @llvm.sadd.with.overflow.i32(i32 %div, i32 1)
375 %obit = extractvalue %ov.result.32 %t, 1
379 ; CHECK-LABEL: @overflow_div_sub(
380 ; CHECK: ret i1 false
381 define i1 @overflow_div_sub(i32 %v1, i32 %v2) nounwind {
383 ; Check cases where the known sign bits are larger than the word size.
384 %a = ashr i32 %v1, 18
385 %div = sdiv i32 %a, 65536
386 %t = call %ov.result.32 @llvm.ssub.with.overflow.i32(i32 %div, i32 1)
387 %obit = extractvalue %ov.result.32 %t, 1
391 ; CHECK-LABEL: @overflow_mod_mul(
392 ; CHECK: ret i1 false
393 define i1 @overflow_mod_mul(i32 %v1, i32 %v2) nounwind {
395 %rem = srem i32 %v1, 1000
396 %t = call %ov.result.32 @llvm.smul.with.overflow.i32(i32 %rem, i32 %rem)
397 %obit = extractvalue %ov.result.32 %t, 1
401 ; CHECK-LABEL: @overflow_mod_overflow_mul(
402 ; CHECK-NOT: ret i1 false
403 define i1 @overflow_mod_overflow_mul(i32 %v1, i32 %v2) nounwind {
405 %rem = srem i32 %v1, 65537
406 ; This may overflow because the result of the mul operands may be greater than 16bits
407 ; and the result greater than 32.
408 %t = call %ov.result.32 @llvm.smul.with.overflow.i32(i32 %rem, i32 %rem)
409 %obit = extractvalue %ov.result.32 %t, 1
413 define %ov.result.32 @ssubtest_reorder(i8 %a) {
414 %A = sext i8 %a to i32
415 %x = call %ov.result.32 @llvm.ssub.with.overflow.i32(i32 0, i32 %A)
417 ; CHECK-LABEL: @ssubtest_reorder
418 ; CHECK: %x = sub nsw i32 0, %A
419 ; CHECK-NEXT: %1 = insertvalue %ov.result.32 { i32 undef, i1 false }, i32 %x, 0
420 ; CHECK-NEXT: ret %ov.result.32 %1
423 define %ov.result.32 @never_overflows_ssub_test0(i32 %a) {
424 %x = call %ov.result.32 @llvm.ssub.with.overflow.i32(i32 %a, i32 0)
426 ; CHECK-LABEL: @never_overflows_ssub_test0
427 ; CHECK-NEXT: %[[x:.*]] = insertvalue %ov.result.32 { i32 undef, i1 false }, i32 %a, 0
428 ; CHECK-NEXT: ret %ov.result.32 %[[x]]
431 define void @cos(double *%P) {
433 %B = tail call double @llvm.cos.f64(double 0.0) nounwind
434 store volatile double %B, double* %P
438 ; CHECK: store volatile double 1.000000e+00, double* %P
441 define void @sin(double *%P) {
443 %B = tail call double @llvm.sin.f64(double 0.0) nounwind
444 store volatile double %B, double* %P
448 ; CHECK: store volatile double 0.000000e+00, double* %P