1 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 | FileCheck %s
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -stop-after machine-combiner -o /dev/null 2>&1 | FileCheck %s --check-prefix=DEAD
4 ; Verify that integer multiplies are reassociated. The first multiply in
5 ; each test should be independent of the result of the preceding add (lea).
7 ; TODO: This test does not actually test i16 machine instruction reassociation
8 ; because the operands are being promoted to i32 types.
10 define i16 @reassociate_muls_i16(i16 %x0, i16 %x1, i16 %x2, i16 %x3) {
11 ; CHECK-LABEL: reassociate_muls_i16:
13 ; CHECK-NEXT: leal (%rdi,%rsi), %eax
14 ; CHECK-NEXT: imull %ecx, %edx
15 ; CHECK-NEXT: imull %edx, %eax
17 %t0 = add i16 %x0, %x1
18 %t1 = mul i16 %x2, %t0
19 %t2 = mul i16 %x3, %t1
23 define i32 @reassociate_muls_i32(i32 %x0, i32 %x1, i32 %x2, i32 %x3) {
24 ; CHECK-LABEL: reassociate_muls_i32:
26 ; CHECK-NEXT: leal (%rdi,%rsi), %eax
27 ; CHECK-NEXT: imull %ecx, %edx
28 ; CHECK-NEXT: imull %edx, %eax
32 ; DEAD-NEXT: IMUL32rr{{.*}}implicit-def dead %eflags
33 ; DEAD-NEXT: IMUL32rr{{.*}}implicit-def dead %eflags
35 %t0 = add i32 %x0, %x1
36 %t1 = mul i32 %x2, %t0
37 %t2 = mul i32 %x3, %t1
41 define i64 @reassociate_muls_i64(i64 %x0, i64 %x1, i64 %x2, i64 %x3) {
42 ; CHECK-LABEL: reassociate_muls_i64:
44 ; CHECK-NEXT: leaq (%rdi,%rsi), %rax
45 ; CHECK-NEXT: imulq %rcx, %rdx
46 ; CHECK-NEXT: imulq %rdx, %rax
48 %t0 = add i64 %x0, %x1
49 %t1 = mul i64 %x2, %t0
50 %t2 = mul i64 %x3, %t1
54 ; Verify that integer 'ands' are reassociated. The first 'and' in
55 ; each test should be independent of the result of the preceding sub.
57 define i8 @reassociate_ands_i8(i8 %x0, i8 %x1, i8 %x2, i8 %x3) {
58 ; CHECK-LABEL: reassociate_ands_i8:
60 ; CHECK-NEXT: subb %sil, %dil
61 ; CHECK-NEXT: andb %cl, %dl
62 ; CHECK-NEXT: andb %dil, %dl
63 ; CHECK_NEXT: movb %dx, %ax
71 ; TODO: No way to test i16? These appear to always get promoted to i32.
73 define i32 @reassociate_ands_i32(i32 %x0, i32 %x1, i32 %x2, i32 %x3) {
74 ; CHECK-LABEL: reassociate_ands_i32:
76 ; CHECK-NEXT: subl %esi, %edi
77 ; CHECK-NEXT: andl %ecx, %edx
78 ; CHECK-NEXT: andl %edi, %edx
79 ; CHECK_NEXT: movl %edx, %eax
81 %t0 = sub i32 %x0, %x1
82 %t1 = and i32 %x2, %t0
83 %t2 = and i32 %x3, %t1
87 define i64 @reassociate_ands_i64(i64 %x0, i64 %x1, i64 %x2, i64 %x3) {
88 ; CHECK-LABEL: reassociate_ands_i64:
90 ; CHECK-NEXT: subq %rsi, %rdi
91 ; CHECK-NEXT: andq %rcx, %rdx
92 ; CHECK-NEXT: andq %rdi, %rdx
93 ; CHECK-NEXT: movq %rdx, %rax
95 %t0 = sub i64 %x0, %x1
96 %t1 = and i64 %x2, %t0
97 %t2 = and i64 %x3, %t1