1 //===- LoopStrengthReduce.cpp - Strength Reduce IVs in Loops --------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This transformation analyzes and transforms the induction variables (and
11 // computations derived from them) into forms suitable for efficient execution
14 // This pass performs a strength reduction on array references inside loops that
15 // have as one or more of their components the loop induction variable, it
16 // rewrites expressions to take advantage of scaled-index addressing modes
17 // available on the target, and it performs a variety of other optimizations
18 // related to loop induction variables.
20 // Terminology note: this code has a lot of handling for "post-increment" or
21 // "post-inc" users. This is not talking about post-increment addressing modes;
22 // it is instead talking about code like this:
24 // %i = phi [ 0, %entry ], [ %i.next, %latch ]
26 // %i.next = add %i, 1
27 // %c = icmp eq %i.next, %n
29 // The SCEV for %i is {0,+,1}<%L>. The SCEV for %i.next is {1,+,1}<%L>, however
30 // it's useful to think about these as the same register, with some uses using
31 // the value of the register before the add and some using // it after. In this
32 // example, the icmp is a post-increment user, since it uses %i.next, which is
33 // the value of the induction variable after the increment. The other common
34 // case of post-increment users is users outside the loop.
36 // TODO: More sophistication in the way Formulae are generated and filtered.
38 // TODO: Handle multiple loops at a time.
40 // TODO: Should the addressing mode BaseGV be changed to a ConstantExpr instead
43 // TODO: When truncation is free, truncate ICmp users' operands to make it a
44 // smaller encoding (on x86 at least).
46 // TODO: When a negated register is used by an add (such as in a list of
47 // multiple base registers, or as the increment expression in an addrec),
48 // we may not actually need both reg and (-1 * reg) in registers; the
49 // negation can be implemented by using a sub instead of an add. The
50 // lack of support for taking this into consideration when making
51 // register pressure decisions is partly worked around by the "Special"
54 //===----------------------------------------------------------------------===//
56 #include "llvm/Transforms/Scalar.h"
57 #include "llvm/ADT/DenseSet.h"
58 #include "llvm/ADT/Hashing.h"
59 #include "llvm/ADT/STLExtras.h"
60 #include "llvm/ADT/SetVector.h"
61 #include "llvm/ADT/SmallBitVector.h"
62 #include "llvm/Analysis/IVUsers.h"
63 #include "llvm/Analysis/LoopPass.h"
64 #include "llvm/Analysis/ScalarEvolutionExpander.h"
65 #include "llvm/Analysis/TargetTransformInfo.h"
66 #include "llvm/IR/Constants.h"
67 #include "llvm/IR/DerivedTypes.h"
68 #include "llvm/IR/Dominators.h"
69 #include "llvm/IR/Instructions.h"
70 #include "llvm/IR/IntrinsicInst.h"
71 #include "llvm/IR/ValueHandle.h"
72 #include "llvm/Support/CommandLine.h"
73 #include "llvm/Support/Debug.h"
74 #include "llvm/Support/raw_ostream.h"
75 #include "llvm/Transforms/Utils/BasicBlockUtils.h"
76 #include "llvm/Transforms/Utils/Local.h"
80 #define DEBUG_TYPE "loop-reduce"
82 /// MaxIVUsers is an arbitrary threshold that provides an early opportunitiy for
83 /// bail out. This threshold is far beyond the number of users that LSR can
84 /// conceivably solve, so it should not affect generated code, but catches the
85 /// worst cases before LSR burns too much compile time and stack space.
86 static const unsigned MaxIVUsers = 200;
88 // Temporary flag to cleanup congruent phis after LSR phi expansion.
89 // It's currently disabled until we can determine whether it's truly useful or
90 // not. The flag should be removed after the v3.0 release.
91 // This is now needed for ivchains.
92 static cl::opt<bool> EnablePhiElim(
93 "enable-lsr-phielim", cl::Hidden, cl::init(true),
94 cl::desc("Enable LSR phi elimination"));
97 // Stress test IV chain generation.
98 static cl::opt<bool> StressIVChain(
99 "stress-ivchain", cl::Hidden, cl::init(false),
100 cl::desc("Stress test LSR IV chains"));
102 static bool StressIVChain = false;
107 /// RegSortData - This class holds data which is used to order reuse candidates.
110 /// UsedByIndices - This represents the set of LSRUse indices which reference
111 /// a particular register.
112 SmallBitVector UsedByIndices;
116 void print(raw_ostream &OS) const;
122 void RegSortData::print(raw_ostream &OS) const {
123 OS << "[NumUses=" << UsedByIndices.count() << ']';
126 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
127 void RegSortData::dump() const {
128 print(errs()); errs() << '\n';
134 /// RegUseTracker - Map register candidates to information about how they are
136 class RegUseTracker {
137 typedef DenseMap<const SCEV *, RegSortData> RegUsesTy;
139 RegUsesTy RegUsesMap;
140 SmallVector<const SCEV *, 16> RegSequence;
143 void CountRegister(const SCEV *Reg, size_t LUIdx);
144 void DropRegister(const SCEV *Reg, size_t LUIdx);
145 void SwapAndDropUse(size_t LUIdx, size_t LastLUIdx);
147 bool isRegUsedByUsesOtherThan(const SCEV *Reg, size_t LUIdx) const;
149 const SmallBitVector &getUsedByIndices(const SCEV *Reg) const;
153 typedef SmallVectorImpl<const SCEV *>::iterator iterator;
154 typedef SmallVectorImpl<const SCEV *>::const_iterator const_iterator;
155 iterator begin() { return RegSequence.begin(); }
156 iterator end() { return RegSequence.end(); }
157 const_iterator begin() const { return RegSequence.begin(); }
158 const_iterator end() const { return RegSequence.end(); }
164 RegUseTracker::CountRegister(const SCEV *Reg, size_t LUIdx) {
165 std::pair<RegUsesTy::iterator, bool> Pair =
166 RegUsesMap.insert(std::make_pair(Reg, RegSortData()));
167 RegSortData &RSD = Pair.first->second;
169 RegSequence.push_back(Reg);
170 RSD.UsedByIndices.resize(std::max(RSD.UsedByIndices.size(), LUIdx + 1));
171 RSD.UsedByIndices.set(LUIdx);
175 RegUseTracker::DropRegister(const SCEV *Reg, size_t LUIdx) {
176 RegUsesTy::iterator It = RegUsesMap.find(Reg);
177 assert(It != RegUsesMap.end());
178 RegSortData &RSD = It->second;
179 assert(RSD.UsedByIndices.size() > LUIdx);
180 RSD.UsedByIndices.reset(LUIdx);
184 RegUseTracker::SwapAndDropUse(size_t LUIdx, size_t LastLUIdx) {
185 assert(LUIdx <= LastLUIdx);
187 // Update RegUses. The data structure is not optimized for this purpose;
188 // we must iterate through it and update each of the bit vectors.
189 for (RegUsesTy::iterator I = RegUsesMap.begin(), E = RegUsesMap.end();
191 SmallBitVector &UsedByIndices = I->second.UsedByIndices;
192 if (LUIdx < UsedByIndices.size())
193 UsedByIndices[LUIdx] =
194 LastLUIdx < UsedByIndices.size() ? UsedByIndices[LastLUIdx] : 0;
195 UsedByIndices.resize(std::min(UsedByIndices.size(), LastLUIdx));
200 RegUseTracker::isRegUsedByUsesOtherThan(const SCEV *Reg, size_t LUIdx) const {
201 RegUsesTy::const_iterator I = RegUsesMap.find(Reg);
202 if (I == RegUsesMap.end())
204 const SmallBitVector &UsedByIndices = I->second.UsedByIndices;
205 int i = UsedByIndices.find_first();
206 if (i == -1) return false;
207 if ((size_t)i != LUIdx) return true;
208 return UsedByIndices.find_next(i) != -1;
211 const SmallBitVector &RegUseTracker::getUsedByIndices(const SCEV *Reg) const {
212 RegUsesTy::const_iterator I = RegUsesMap.find(Reg);
213 assert(I != RegUsesMap.end() && "Unknown register!");
214 return I->second.UsedByIndices;
217 void RegUseTracker::clear() {
224 /// Formula - This class holds information that describes a formula for
225 /// computing satisfying a use. It may include broken-out immediates and scaled
228 /// Global base address used for complex addressing.
231 /// Base offset for complex addressing.
234 /// Whether any complex addressing has a base register.
237 /// The scale of any complex addressing.
240 /// BaseRegs - The list of "base" registers for this use. When this is
241 /// non-empty. The canonical representation of a formula is
242 /// 1. BaseRegs.size > 1 implies ScaledReg != NULL and
243 /// 2. ScaledReg != NULL implies Scale != 1 || !BaseRegs.empty().
244 /// #1 enforces that the scaled register is always used when at least two
245 /// registers are needed by the formula: e.g., reg1 + reg2 is reg1 + 1 * reg2.
246 /// #2 enforces that 1 * reg is reg.
247 /// This invariant can be temporarly broken while building a formula.
248 /// However, every formula inserted into the LSRInstance must be in canonical
250 SmallVector<const SCEV *, 4> BaseRegs;
252 /// ScaledReg - The 'scaled' register for this use. This should be non-null
253 /// when Scale is not zero.
254 const SCEV *ScaledReg;
256 /// UnfoldedOffset - An additional constant offset which added near the
257 /// use. This requires a temporary register, but the offset itself can
258 /// live in an add immediate field rather than a register.
259 int64_t UnfoldedOffset;
262 : BaseGV(nullptr), BaseOffset(0), HasBaseReg(false), Scale(0),
263 ScaledReg(nullptr), UnfoldedOffset(0) {}
265 void InitialMatch(const SCEV *S, Loop *L, ScalarEvolution &SE);
267 bool isCanonical() const;
273 size_t getNumRegs() const;
274 Type *getType() const;
276 void DeleteBaseReg(const SCEV *&S);
278 bool referencesReg(const SCEV *S) const;
279 bool hasRegsUsedByUsesOtherThan(size_t LUIdx,
280 const RegUseTracker &RegUses) const;
282 void print(raw_ostream &OS) const;
288 /// DoInitialMatch - Recursion helper for InitialMatch.
289 static void DoInitialMatch(const SCEV *S, Loop *L,
290 SmallVectorImpl<const SCEV *> &Good,
291 SmallVectorImpl<const SCEV *> &Bad,
292 ScalarEvolution &SE) {
293 // Collect expressions which properly dominate the loop header.
294 if (SE.properlyDominates(S, L->getHeader())) {
299 // Look at add operands.
300 if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(S)) {
301 for (SCEVAddExpr::op_iterator I = Add->op_begin(), E = Add->op_end();
303 DoInitialMatch(*I, L, Good, Bad, SE);
307 // Look at addrec operands.
308 if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(S))
309 if (!AR->getStart()->isZero()) {
310 DoInitialMatch(AR->getStart(), L, Good, Bad, SE);
311 DoInitialMatch(SE.getAddRecExpr(SE.getConstant(AR->getType(), 0),
312 AR->getStepRecurrence(SE),
313 // FIXME: AR->getNoWrapFlags()
314 AR->getLoop(), SCEV::FlagAnyWrap),
319 // Handle a multiplication by -1 (negation) if it didn't fold.
320 if (const SCEVMulExpr *Mul = dyn_cast<SCEVMulExpr>(S))
321 if (Mul->getOperand(0)->isAllOnesValue()) {
322 SmallVector<const SCEV *, 4> Ops(Mul->op_begin()+1, Mul->op_end());
323 const SCEV *NewMul = SE.getMulExpr(Ops);
325 SmallVector<const SCEV *, 4> MyGood;
326 SmallVector<const SCEV *, 4> MyBad;
327 DoInitialMatch(NewMul, L, MyGood, MyBad, SE);
328 const SCEV *NegOne = SE.getSCEV(ConstantInt::getAllOnesValue(
329 SE.getEffectiveSCEVType(NewMul->getType())));
330 for (SmallVectorImpl<const SCEV *>::const_iterator I = MyGood.begin(),
331 E = MyGood.end(); I != E; ++I)
332 Good.push_back(SE.getMulExpr(NegOne, *I));
333 for (SmallVectorImpl<const SCEV *>::const_iterator I = MyBad.begin(),
334 E = MyBad.end(); I != E; ++I)
335 Bad.push_back(SE.getMulExpr(NegOne, *I));
339 // Ok, we can't do anything interesting. Just stuff the whole thing into a
340 // register and hope for the best.
344 /// InitialMatch - Incorporate loop-variant parts of S into this Formula,
345 /// attempting to keep all loop-invariant and loop-computable values in a
346 /// single base register.
347 void Formula::InitialMatch(const SCEV *S, Loop *L, ScalarEvolution &SE) {
348 SmallVector<const SCEV *, 4> Good;
349 SmallVector<const SCEV *, 4> Bad;
350 DoInitialMatch(S, L, Good, Bad, SE);
352 const SCEV *Sum = SE.getAddExpr(Good);
354 BaseRegs.push_back(Sum);
358 const SCEV *Sum = SE.getAddExpr(Bad);
360 BaseRegs.push_back(Sum);
366 /// \brief Check whether or not this formula statisfies the canonical
368 /// \see Formula::BaseRegs.
369 bool Formula::isCanonical() const {
371 return Scale != 1 || !BaseRegs.empty();
372 return BaseRegs.size() <= 1;
375 /// \brief Helper method to morph a formula into its canonical representation.
376 /// \see Formula::BaseRegs.
377 /// Every formula having more than one base register, must use the ScaledReg
378 /// field. Otherwise, we would have to do special cases everywhere in LSR
379 /// to treat reg1 + reg2 + ... the same way as reg1 + 1*reg2 + ...
380 /// On the other hand, 1*reg should be canonicalized into reg.
381 void Formula::Canonicalize() {
384 // So far we did not need this case. This is easy to implement but it is
385 // useless to maintain dead code. Beside it could hurt compile time.
386 assert(!BaseRegs.empty() && "1*reg => reg, should not be needed.");
387 // Keep the invariant sum in BaseRegs and one of the variant sum in ScaledReg.
388 ScaledReg = BaseRegs.back();
391 size_t BaseRegsSize = BaseRegs.size();
393 // If ScaledReg is an invariant, try to find a variant expression.
394 while (Try < BaseRegsSize && !isa<SCEVAddRecExpr>(ScaledReg))
395 std::swap(ScaledReg, BaseRegs[Try++]);
398 /// \brief Get rid of the scale in the formula.
399 /// In other words, this method morphes reg1 + 1*reg2 into reg1 + reg2.
400 /// \return true if it was possible to get rid of the scale, false otherwise.
401 /// \note After this operation the formula may not be in the canonical form.
402 bool Formula::Unscale() {
406 BaseRegs.push_back(ScaledReg);
411 /// getNumRegs - Return the total number of register operands used by this
412 /// formula. This does not include register uses implied by non-constant
414 size_t Formula::getNumRegs() const {
415 return !!ScaledReg + BaseRegs.size();
418 /// getType - Return the type of this formula, if it has one, or null
419 /// otherwise. This type is meaningless except for the bit size.
420 Type *Formula::getType() const {
421 return !BaseRegs.empty() ? BaseRegs.front()->getType() :
422 ScaledReg ? ScaledReg->getType() :
423 BaseGV ? BaseGV->getType() :
427 /// DeleteBaseReg - Delete the given base reg from the BaseRegs list.
428 void Formula::DeleteBaseReg(const SCEV *&S) {
429 if (&S != &BaseRegs.back())
430 std::swap(S, BaseRegs.back());
434 /// referencesReg - Test if this formula references the given register.
435 bool Formula::referencesReg(const SCEV *S) const {
436 return S == ScaledReg ||
437 std::find(BaseRegs.begin(), BaseRegs.end(), S) != BaseRegs.end();
440 /// hasRegsUsedByUsesOtherThan - Test whether this formula uses registers
441 /// which are used by uses other than the use with the given index.
442 bool Formula::hasRegsUsedByUsesOtherThan(size_t LUIdx,
443 const RegUseTracker &RegUses) const {
445 if (RegUses.isRegUsedByUsesOtherThan(ScaledReg, LUIdx))
447 for (SmallVectorImpl<const SCEV *>::const_iterator I = BaseRegs.begin(),
448 E = BaseRegs.end(); I != E; ++I)
449 if (RegUses.isRegUsedByUsesOtherThan(*I, LUIdx))
454 void Formula::print(raw_ostream &OS) const {
457 if (!First) OS << " + "; else First = false;
458 BaseGV->printAsOperand(OS, /*PrintType=*/false);
460 if (BaseOffset != 0) {
461 if (!First) OS << " + "; else First = false;
464 for (SmallVectorImpl<const SCEV *>::const_iterator I = BaseRegs.begin(),
465 E = BaseRegs.end(); I != E; ++I) {
466 if (!First) OS << " + "; else First = false;
467 OS << "reg(" << **I << ')';
469 if (HasBaseReg && BaseRegs.empty()) {
470 if (!First) OS << " + "; else First = false;
471 OS << "**error: HasBaseReg**";
472 } else if (!HasBaseReg && !BaseRegs.empty()) {
473 if (!First) OS << " + "; else First = false;
474 OS << "**error: !HasBaseReg**";
477 if (!First) OS << " + "; else First = false;
478 OS << Scale << "*reg(";
485 if (UnfoldedOffset != 0) {
486 if (!First) OS << " + ";
487 OS << "imm(" << UnfoldedOffset << ')';
491 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
492 void Formula::dump() const {
493 print(errs()); errs() << '\n';
497 /// isAddRecSExtable - Return true if the given addrec can be sign-extended
498 /// without changing its value.
499 static bool isAddRecSExtable(const SCEVAddRecExpr *AR, ScalarEvolution &SE) {
501 IntegerType::get(SE.getContext(), SE.getTypeSizeInBits(AR->getType()) + 1);
502 return isa<SCEVAddRecExpr>(SE.getSignExtendExpr(AR, WideTy));
505 /// isAddSExtable - Return true if the given add can be sign-extended
506 /// without changing its value.
507 static bool isAddSExtable(const SCEVAddExpr *A, ScalarEvolution &SE) {
509 IntegerType::get(SE.getContext(), SE.getTypeSizeInBits(A->getType()) + 1);
510 return isa<SCEVAddExpr>(SE.getSignExtendExpr(A, WideTy));
513 /// isMulSExtable - Return true if the given mul can be sign-extended
514 /// without changing its value.
515 static bool isMulSExtable(const SCEVMulExpr *M, ScalarEvolution &SE) {
517 IntegerType::get(SE.getContext(),
518 SE.getTypeSizeInBits(M->getType()) * M->getNumOperands());
519 return isa<SCEVMulExpr>(SE.getSignExtendExpr(M, WideTy));
522 /// getExactSDiv - Return an expression for LHS /s RHS, if it can be determined
523 /// and if the remainder is known to be zero, or null otherwise. If
524 /// IgnoreSignificantBits is true, expressions like (X * Y) /s Y are simplified
525 /// to Y, ignoring that the multiplication may overflow, which is useful when
526 /// the result will be used in a context where the most significant bits are
528 static const SCEV *getExactSDiv(const SCEV *LHS, const SCEV *RHS,
530 bool IgnoreSignificantBits = false) {
531 // Handle the trivial case, which works for any SCEV type.
533 return SE.getConstant(LHS->getType(), 1);
535 // Handle a few RHS special cases.
536 const SCEVConstant *RC = dyn_cast<SCEVConstant>(RHS);
538 const APInt &RA = RC->getValue()->getValue();
539 // Handle x /s -1 as x * -1, to give ScalarEvolution a chance to do
541 if (RA.isAllOnesValue())
542 return SE.getMulExpr(LHS, RC);
543 // Handle x /s 1 as x.
548 // Check for a division of a constant by a constant.
549 if (const SCEVConstant *C = dyn_cast<SCEVConstant>(LHS)) {
552 const APInt &LA = C->getValue()->getValue();
553 const APInt &RA = RC->getValue()->getValue();
554 if (LA.srem(RA) != 0)
556 return SE.getConstant(LA.sdiv(RA));
559 // Distribute the sdiv over addrec operands, if the addrec doesn't overflow.
560 if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(LHS)) {
561 if (IgnoreSignificantBits || isAddRecSExtable(AR, SE)) {
562 const SCEV *Step = getExactSDiv(AR->getStepRecurrence(SE), RHS, SE,
563 IgnoreSignificantBits);
564 if (!Step) return nullptr;
565 const SCEV *Start = getExactSDiv(AR->getStart(), RHS, SE,
566 IgnoreSignificantBits);
567 if (!Start) return nullptr;
568 // FlagNW is independent of the start value, step direction, and is
569 // preserved with smaller magnitude steps.
570 // FIXME: AR->getNoWrapFlags(SCEV::FlagNW)
571 return SE.getAddRecExpr(Start, Step, AR->getLoop(), SCEV::FlagAnyWrap);
576 // Distribute the sdiv over add operands, if the add doesn't overflow.
577 if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(LHS)) {
578 if (IgnoreSignificantBits || isAddSExtable(Add, SE)) {
579 SmallVector<const SCEV *, 8> Ops;
580 for (SCEVAddExpr::op_iterator I = Add->op_begin(), E = Add->op_end();
582 const SCEV *Op = getExactSDiv(*I, RHS, SE,
583 IgnoreSignificantBits);
584 if (!Op) return nullptr;
587 return SE.getAddExpr(Ops);
592 // Check for a multiply operand that we can pull RHS out of.
593 if (const SCEVMulExpr *Mul = dyn_cast<SCEVMulExpr>(LHS)) {
594 if (IgnoreSignificantBits || isMulSExtable(Mul, SE)) {
595 SmallVector<const SCEV *, 4> Ops;
597 for (SCEVMulExpr::op_iterator I = Mul->op_begin(), E = Mul->op_end();
601 if (const SCEV *Q = getExactSDiv(S, RHS, SE,
602 IgnoreSignificantBits)) {
608 return Found ? SE.getMulExpr(Ops) : nullptr;
613 // Otherwise we don't know.
617 /// ExtractImmediate - If S involves the addition of a constant integer value,
618 /// return that integer value, and mutate S to point to a new SCEV with that
620 static int64_t ExtractImmediate(const SCEV *&S, ScalarEvolution &SE) {
621 if (const SCEVConstant *C = dyn_cast<SCEVConstant>(S)) {
622 if (C->getValue()->getValue().getMinSignedBits() <= 64) {
623 S = SE.getConstant(C->getType(), 0);
624 return C->getValue()->getSExtValue();
626 } else if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(S)) {
627 SmallVector<const SCEV *, 8> NewOps(Add->op_begin(), Add->op_end());
628 int64_t Result = ExtractImmediate(NewOps.front(), SE);
630 S = SE.getAddExpr(NewOps);
632 } else if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(S)) {
633 SmallVector<const SCEV *, 8> NewOps(AR->op_begin(), AR->op_end());
634 int64_t Result = ExtractImmediate(NewOps.front(), SE);
636 S = SE.getAddRecExpr(NewOps, AR->getLoop(),
637 // FIXME: AR->getNoWrapFlags(SCEV::FlagNW)
644 /// ExtractSymbol - If S involves the addition of a GlobalValue address,
645 /// return that symbol, and mutate S to point to a new SCEV with that
647 static GlobalValue *ExtractSymbol(const SCEV *&S, ScalarEvolution &SE) {
648 if (const SCEVUnknown *U = dyn_cast<SCEVUnknown>(S)) {
649 if (GlobalValue *GV = dyn_cast<GlobalValue>(U->getValue())) {
650 S = SE.getConstant(GV->getType(), 0);
653 } else if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(S)) {
654 SmallVector<const SCEV *, 8> NewOps(Add->op_begin(), Add->op_end());
655 GlobalValue *Result = ExtractSymbol(NewOps.back(), SE);
657 S = SE.getAddExpr(NewOps);
659 } else if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(S)) {
660 SmallVector<const SCEV *, 8> NewOps(AR->op_begin(), AR->op_end());
661 GlobalValue *Result = ExtractSymbol(NewOps.front(), SE);
663 S = SE.getAddRecExpr(NewOps, AR->getLoop(),
664 // FIXME: AR->getNoWrapFlags(SCEV::FlagNW)
671 /// isAddressUse - Returns true if the specified instruction is using the
672 /// specified value as an address.
673 static bool isAddressUse(Instruction *Inst, Value *OperandVal) {
674 bool isAddress = isa<LoadInst>(Inst);
675 if (StoreInst *SI = dyn_cast<StoreInst>(Inst)) {
676 if (SI->getOperand(1) == OperandVal)
678 } else if (IntrinsicInst *II = dyn_cast<IntrinsicInst>(Inst)) {
679 // Addressing modes can also be folded into prefetches and a variety
681 switch (II->getIntrinsicID()) {
683 case Intrinsic::prefetch:
684 case Intrinsic::x86_sse_storeu_ps:
685 case Intrinsic::x86_sse2_storeu_pd:
686 case Intrinsic::x86_sse2_storeu_dq:
687 case Intrinsic::x86_sse2_storel_dq:
688 if (II->getArgOperand(0) == OperandVal)
696 /// getAccessType - Return the type of the memory being accessed.
697 static Type *getAccessType(const Instruction *Inst) {
698 Type *AccessTy = Inst->getType();
699 if (const StoreInst *SI = dyn_cast<StoreInst>(Inst))
700 AccessTy = SI->getOperand(0)->getType();
701 else if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(Inst)) {
702 // Addressing modes can also be folded into prefetches and a variety
704 switch (II->getIntrinsicID()) {
706 case Intrinsic::x86_sse_storeu_ps:
707 case Intrinsic::x86_sse2_storeu_pd:
708 case Intrinsic::x86_sse2_storeu_dq:
709 case Intrinsic::x86_sse2_storel_dq:
710 AccessTy = II->getArgOperand(0)->getType();
715 // All pointers have the same requirements, so canonicalize them to an
716 // arbitrary pointer type to minimize variation.
717 if (PointerType *PTy = dyn_cast<PointerType>(AccessTy))
718 AccessTy = PointerType::get(IntegerType::get(PTy->getContext(), 1),
719 PTy->getAddressSpace());
724 /// isExistingPhi - Return true if this AddRec is already a phi in its loop.
725 static bool isExistingPhi(const SCEVAddRecExpr *AR, ScalarEvolution &SE) {
726 for (BasicBlock::iterator I = AR->getLoop()->getHeader()->begin();
727 PHINode *PN = dyn_cast<PHINode>(I); ++I) {
728 if (SE.isSCEVable(PN->getType()) &&
729 (SE.getEffectiveSCEVType(PN->getType()) ==
730 SE.getEffectiveSCEVType(AR->getType())) &&
731 SE.getSCEV(PN) == AR)
737 /// Check if expanding this expression is likely to incur significant cost. This
738 /// is tricky because SCEV doesn't track which expressions are actually computed
739 /// by the current IR.
741 /// We currently allow expansion of IV increments that involve adds,
742 /// multiplication by constants, and AddRecs from existing phis.
744 /// TODO: Allow UDivExpr if we can find an existing IV increment that is an
745 /// obvious multiple of the UDivExpr.
746 static bool isHighCostExpansion(const SCEV *S,
747 SmallPtrSetImpl<const SCEV*> &Processed,
748 ScalarEvolution &SE) {
749 // Zero/One operand expressions
750 switch (S->getSCEVType()) {
755 return isHighCostExpansion(cast<SCEVTruncateExpr>(S)->getOperand(),
758 return isHighCostExpansion(cast<SCEVZeroExtendExpr>(S)->getOperand(),
761 return isHighCostExpansion(cast<SCEVSignExtendExpr>(S)->getOperand(),
765 if (!Processed.insert(S))
768 if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(S)) {
769 for (SCEVAddExpr::op_iterator I = Add->op_begin(), E = Add->op_end();
771 if (isHighCostExpansion(*I, Processed, SE))
777 if (const SCEVMulExpr *Mul = dyn_cast<SCEVMulExpr>(S)) {
778 if (Mul->getNumOperands() == 2) {
779 // Multiplication by a constant is ok
780 if (isa<SCEVConstant>(Mul->getOperand(0)))
781 return isHighCostExpansion(Mul->getOperand(1), Processed, SE);
783 // If we have the value of one operand, check if an existing
784 // multiplication already generates this expression.
785 if (const SCEVUnknown *U = dyn_cast<SCEVUnknown>(Mul->getOperand(1))) {
786 Value *UVal = U->getValue();
787 for (User *UR : UVal->users()) {
788 // If U is a constant, it may be used by a ConstantExpr.
789 Instruction *UI = dyn_cast<Instruction>(UR);
790 if (UI && UI->getOpcode() == Instruction::Mul &&
791 SE.isSCEVable(UI->getType())) {
792 return SE.getSCEV(UI) == Mul;
799 if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(S)) {
800 if (isExistingPhi(AR, SE))
804 // Fow now, consider any other type of expression (div/mul/min/max) high cost.
808 /// DeleteTriviallyDeadInstructions - If any of the instructions is the
809 /// specified set are trivially dead, delete them and see if this makes any of
810 /// their operands subsequently dead.
812 DeleteTriviallyDeadInstructions(SmallVectorImpl<WeakVH> &DeadInsts) {
813 bool Changed = false;
815 while (!DeadInsts.empty()) {
816 Value *V = DeadInsts.pop_back_val();
817 Instruction *I = dyn_cast_or_null<Instruction>(V);
819 if (!I || !isInstructionTriviallyDead(I))
822 for (User::op_iterator OI = I->op_begin(), E = I->op_end(); OI != E; ++OI)
823 if (Instruction *U = dyn_cast<Instruction>(*OI)) {
826 DeadInsts.push_back(U);
829 I->eraseFromParent();
840 /// \brief Check if the addressing mode defined by \p F is completely
841 /// folded in \p LU at isel time.
842 /// This includes address-mode folding and special icmp tricks.
843 /// This function returns true if \p LU can accommodate what \p F
844 /// defines and up to 1 base + 1 scaled + offset.
845 /// In other words, if \p F has several base registers, this function may
846 /// still return true. Therefore, users still need to account for
847 /// additional base registers and/or unfolded offsets to derive an
848 /// accurate cost model.
849 static bool isAMCompletelyFolded(const TargetTransformInfo &TTI,
850 const LSRUse &LU, const Formula &F);
851 // Get the cost of the scaling factor used in F for LU.
852 static unsigned getScalingFactorCost(const TargetTransformInfo &TTI,
853 const LSRUse &LU, const Formula &F);
857 /// Cost - This class is used to measure and compare candidate formulae.
859 /// TODO: Some of these could be merged. Also, a lexical ordering
860 /// isn't always optimal.
864 unsigned NumBaseAdds;
871 : NumRegs(0), AddRecCost(0), NumIVMuls(0), NumBaseAdds(0), ImmCost(0),
872 SetupCost(0), ScaleCost(0) {}
874 bool operator<(const Cost &Other) const;
879 // Once any of the metrics loses, they must all remain losers.
881 return ((NumRegs | AddRecCost | NumIVMuls | NumBaseAdds
882 | ImmCost | SetupCost | ScaleCost) != ~0u)
883 || ((NumRegs & AddRecCost & NumIVMuls & NumBaseAdds
884 & ImmCost & SetupCost & ScaleCost) == ~0u);
889 assert(isValid() && "invalid cost");
890 return NumRegs == ~0u;
893 void RateFormula(const TargetTransformInfo &TTI,
895 SmallPtrSetImpl<const SCEV *> &Regs,
896 const DenseSet<const SCEV *> &VisitedRegs,
898 const SmallVectorImpl<int64_t> &Offsets,
899 ScalarEvolution &SE, DominatorTree &DT,
901 SmallPtrSetImpl<const SCEV *> *LoserRegs = nullptr);
903 void print(raw_ostream &OS) const;
907 void RateRegister(const SCEV *Reg,
908 SmallPtrSetImpl<const SCEV *> &Regs,
910 ScalarEvolution &SE, DominatorTree &DT);
911 void RatePrimaryRegister(const SCEV *Reg,
912 SmallPtrSetImpl<const SCEV *> &Regs,
914 ScalarEvolution &SE, DominatorTree &DT,
915 SmallPtrSetImpl<const SCEV *> *LoserRegs);
920 /// RateRegister - Tally up interesting quantities from the given register.
921 void Cost::RateRegister(const SCEV *Reg,
922 SmallPtrSetImpl<const SCEV *> &Regs,
924 ScalarEvolution &SE, DominatorTree &DT) {
925 if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(Reg)) {
926 // If this is an addrec for another loop, don't second-guess its addrec phi
927 // nodes. LSR isn't currently smart enough to reason about more than one
928 // loop at a time. LSR has already run on inner loops, will not run on outer
929 // loops, and cannot be expected to change sibling loops.
930 if (AR->getLoop() != L) {
931 // If the AddRec exists, consider it's register free and leave it alone.
932 if (isExistingPhi(AR, SE))
935 // Otherwise, do not consider this formula at all.
939 AddRecCost += 1; /// TODO: This should be a function of the stride.
941 // Add the step value register, if it needs one.
942 // TODO: The non-affine case isn't precisely modeled here.
943 if (!AR->isAffine() || !isa<SCEVConstant>(AR->getOperand(1))) {
944 if (!Regs.count(AR->getOperand(1))) {
945 RateRegister(AR->getOperand(1), Regs, L, SE, DT);
953 // Rough heuristic; favor registers which don't require extra setup
954 // instructions in the preheader.
955 if (!isa<SCEVUnknown>(Reg) &&
956 !isa<SCEVConstant>(Reg) &&
957 !(isa<SCEVAddRecExpr>(Reg) &&
958 (isa<SCEVUnknown>(cast<SCEVAddRecExpr>(Reg)->getStart()) ||
959 isa<SCEVConstant>(cast<SCEVAddRecExpr>(Reg)->getStart()))))
962 NumIVMuls += isa<SCEVMulExpr>(Reg) &&
963 SE.hasComputableLoopEvolution(Reg, L);
966 /// RatePrimaryRegister - Record this register in the set. If we haven't seen it
967 /// before, rate it. Optional LoserRegs provides a way to declare any formula
968 /// that refers to one of those regs an instant loser.
969 void Cost::RatePrimaryRegister(const SCEV *Reg,
970 SmallPtrSetImpl<const SCEV *> &Regs,
972 ScalarEvolution &SE, DominatorTree &DT,
973 SmallPtrSetImpl<const SCEV *> *LoserRegs) {
974 if (LoserRegs && LoserRegs->count(Reg)) {
978 if (Regs.insert(Reg)) {
979 RateRegister(Reg, Regs, L, SE, DT);
980 if (LoserRegs && isLoser())
981 LoserRegs->insert(Reg);
985 void Cost::RateFormula(const TargetTransformInfo &TTI,
987 SmallPtrSetImpl<const SCEV *> &Regs,
988 const DenseSet<const SCEV *> &VisitedRegs,
990 const SmallVectorImpl<int64_t> &Offsets,
991 ScalarEvolution &SE, DominatorTree &DT,
993 SmallPtrSetImpl<const SCEV *> *LoserRegs) {
994 assert(F.isCanonical() && "Cost is accurate only for canonical formula");
995 // Tally up the registers.
996 if (const SCEV *ScaledReg = F.ScaledReg) {
997 if (VisitedRegs.count(ScaledReg)) {
1001 RatePrimaryRegister(ScaledReg, Regs, L, SE, DT, LoserRegs);
1005 for (SmallVectorImpl<const SCEV *>::const_iterator I = F.BaseRegs.begin(),
1006 E = F.BaseRegs.end(); I != E; ++I) {
1007 const SCEV *BaseReg = *I;
1008 if (VisitedRegs.count(BaseReg)) {
1012 RatePrimaryRegister(BaseReg, Regs, L, SE, DT, LoserRegs);
1017 // Determine how many (unfolded) adds we'll need inside the loop.
1018 size_t NumBaseParts = F.getNumRegs();
1019 if (NumBaseParts > 1)
1020 // Do not count the base and a possible second register if the target
1021 // allows to fold 2 registers.
1023 NumBaseParts - (1 + (F.Scale && isAMCompletelyFolded(TTI, LU, F)));
1024 NumBaseAdds += (F.UnfoldedOffset != 0);
1026 // Accumulate non-free scaling amounts.
1027 ScaleCost += getScalingFactorCost(TTI, LU, F);
1029 // Tally up the non-zero immediates.
1030 for (SmallVectorImpl<int64_t>::const_iterator I = Offsets.begin(),
1031 E = Offsets.end(); I != E; ++I) {
1032 int64_t Offset = (uint64_t)*I + F.BaseOffset;
1034 ImmCost += 64; // Handle symbolic values conservatively.
1035 // TODO: This should probably be the pointer size.
1036 else if (Offset != 0)
1037 ImmCost += APInt(64, Offset, true).getMinSignedBits();
1039 assert(isValid() && "invalid cost");
1042 /// Lose - Set this cost to a losing value.
1053 /// operator< - Choose the lower cost.
1054 bool Cost::operator<(const Cost &Other) const {
1055 return std::tie(NumRegs, AddRecCost, NumIVMuls, NumBaseAdds, ScaleCost,
1056 ImmCost, SetupCost) <
1057 std::tie(Other.NumRegs, Other.AddRecCost, Other.NumIVMuls,
1058 Other.NumBaseAdds, Other.ScaleCost, Other.ImmCost,
1062 void Cost::print(raw_ostream &OS) const {
1063 OS << NumRegs << " reg" << (NumRegs == 1 ? "" : "s");
1064 if (AddRecCost != 0)
1065 OS << ", with addrec cost " << AddRecCost;
1067 OS << ", plus " << NumIVMuls << " IV mul" << (NumIVMuls == 1 ? "" : "s");
1068 if (NumBaseAdds != 0)
1069 OS << ", plus " << NumBaseAdds << " base add"
1070 << (NumBaseAdds == 1 ? "" : "s");
1072 OS << ", plus " << ScaleCost << " scale cost";
1074 OS << ", plus " << ImmCost << " imm cost";
1076 OS << ", plus " << SetupCost << " setup cost";
1079 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1080 void Cost::dump() const {
1081 print(errs()); errs() << '\n';
1087 /// LSRFixup - An operand value in an instruction which is to be replaced
1088 /// with some equivalent, possibly strength-reduced, replacement.
1090 /// UserInst - The instruction which will be updated.
1091 Instruction *UserInst;
1093 /// OperandValToReplace - The operand of the instruction which will
1094 /// be replaced. The operand may be used more than once; every instance
1095 /// will be replaced.
1096 Value *OperandValToReplace;
1098 /// PostIncLoops - If this user is to use the post-incremented value of an
1099 /// induction variable, this variable is non-null and holds the loop
1100 /// associated with the induction variable.
1101 PostIncLoopSet PostIncLoops;
1103 /// LUIdx - The index of the LSRUse describing the expression which
1104 /// this fixup needs, minus an offset (below).
1107 /// Offset - A constant offset to be added to the LSRUse expression.
1108 /// This allows multiple fixups to share the same LSRUse with different
1109 /// offsets, for example in an unrolled loop.
1112 bool isUseFullyOutsideLoop(const Loop *L) const;
1116 void print(raw_ostream &OS) const;
1122 LSRFixup::LSRFixup()
1123 : UserInst(nullptr), OperandValToReplace(nullptr), LUIdx(~size_t(0)),
1126 /// isUseFullyOutsideLoop - Test whether this fixup always uses its
1127 /// value outside of the given loop.
1128 bool LSRFixup::isUseFullyOutsideLoop(const Loop *L) const {
1129 // PHI nodes use their value in their incoming blocks.
1130 if (const PHINode *PN = dyn_cast<PHINode>(UserInst)) {
1131 for (unsigned i = 0, e = PN->getNumIncomingValues(); i != e; ++i)
1132 if (PN->getIncomingValue(i) == OperandValToReplace &&
1133 L->contains(PN->getIncomingBlock(i)))
1138 return !L->contains(UserInst);
1141 void LSRFixup::print(raw_ostream &OS) const {
1143 // Store is common and interesting enough to be worth special-casing.
1144 if (StoreInst *Store = dyn_cast<StoreInst>(UserInst)) {
1146 Store->getOperand(0)->printAsOperand(OS, /*PrintType=*/false);
1147 } else if (UserInst->getType()->isVoidTy())
1148 OS << UserInst->getOpcodeName();
1150 UserInst->printAsOperand(OS, /*PrintType=*/false);
1152 OS << ", OperandValToReplace=";
1153 OperandValToReplace->printAsOperand(OS, /*PrintType=*/false);
1155 for (PostIncLoopSet::const_iterator I = PostIncLoops.begin(),
1156 E = PostIncLoops.end(); I != E; ++I) {
1157 OS << ", PostIncLoop=";
1158 (*I)->getHeader()->printAsOperand(OS, /*PrintType=*/false);
1161 if (LUIdx != ~size_t(0))
1162 OS << ", LUIdx=" << LUIdx;
1165 OS << ", Offset=" << Offset;
1168 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1169 void LSRFixup::dump() const {
1170 print(errs()); errs() << '\n';
1176 /// UniquifierDenseMapInfo - A DenseMapInfo implementation for holding
1177 /// DenseMaps and DenseSets of sorted SmallVectors of const SCEV*.
1178 struct UniquifierDenseMapInfo {
1179 static SmallVector<const SCEV *, 4> getEmptyKey() {
1180 SmallVector<const SCEV *, 4> V;
1181 V.push_back(reinterpret_cast<const SCEV *>(-1));
1185 static SmallVector<const SCEV *, 4> getTombstoneKey() {
1186 SmallVector<const SCEV *, 4> V;
1187 V.push_back(reinterpret_cast<const SCEV *>(-2));
1191 static unsigned getHashValue(const SmallVector<const SCEV *, 4> &V) {
1192 return static_cast<unsigned>(hash_combine_range(V.begin(), V.end()));
1195 static bool isEqual(const SmallVector<const SCEV *, 4> &LHS,
1196 const SmallVector<const SCEV *, 4> &RHS) {
1201 /// LSRUse - This class holds the state that LSR keeps for each use in
1202 /// IVUsers, as well as uses invented by LSR itself. It includes information
1203 /// about what kinds of things can be folded into the user, information about
1204 /// the user itself, and information about how the use may be satisfied.
1205 /// TODO: Represent multiple users of the same expression in common?
1207 DenseSet<SmallVector<const SCEV *, 4>, UniquifierDenseMapInfo> Uniquifier;
1210 /// KindType - An enum for a kind of use, indicating what types of
1211 /// scaled and immediate operands it might support.
1213 Basic, ///< A normal use, with no folding.
1214 Special, ///< A special case of basic, allowing -1 scales.
1215 Address, ///< An address use; folding according to TargetLowering
1216 ICmpZero ///< An equality icmp with both operands folded into one.
1217 // TODO: Add a generic icmp too?
1220 typedef PointerIntPair<const SCEV *, 2, KindType> SCEVUseKindPair;
1225 SmallVector<int64_t, 8> Offsets;
1229 /// AllFixupsOutsideLoop - This records whether all of the fixups using this
1230 /// LSRUse are outside of the loop, in which case some special-case heuristics
1232 bool AllFixupsOutsideLoop;
1234 /// RigidFormula is set to true to guarantee that this use will be associated
1235 /// with a single formula--the one that initially matched. Some SCEV
1236 /// expressions cannot be expanded. This allows LSR to consider the registers
1237 /// used by those expressions without the need to expand them later after
1238 /// changing the formula.
1241 /// WidestFixupType - This records the widest use type for any fixup using
1242 /// this LSRUse. FindUseWithSimilarFormula can't consider uses with different
1243 /// max fixup widths to be equivalent, because the narrower one may be relying
1244 /// on the implicit truncation to truncate away bogus bits.
1245 Type *WidestFixupType;
1247 /// Formulae - A list of ways to build a value that can satisfy this user.
1248 /// After the list is populated, one of these is selected heuristically and
1249 /// used to formulate a replacement for OperandValToReplace in UserInst.
1250 SmallVector<Formula, 12> Formulae;
1252 /// Regs - The set of register candidates used by all formulae in this LSRUse.
1253 SmallPtrSet<const SCEV *, 4> Regs;
1255 LSRUse(KindType K, Type *T) : Kind(K), AccessTy(T),
1256 MinOffset(INT64_MAX),
1257 MaxOffset(INT64_MIN),
1258 AllFixupsOutsideLoop(true),
1259 RigidFormula(false),
1260 WidestFixupType(nullptr) {}
1262 bool HasFormulaWithSameRegs(const Formula &F) const;
1263 bool InsertFormula(const Formula &F);
1264 void DeleteFormula(Formula &F);
1265 void RecomputeRegs(size_t LUIdx, RegUseTracker &Reguses);
1267 void print(raw_ostream &OS) const;
1273 /// HasFormula - Test whether this use as a formula which has the same
1274 /// registers as the given formula.
1275 bool LSRUse::HasFormulaWithSameRegs(const Formula &F) const {
1276 SmallVector<const SCEV *, 4> Key = F.BaseRegs;
1277 if (F.ScaledReg) Key.push_back(F.ScaledReg);
1278 // Unstable sort by host order ok, because this is only used for uniquifying.
1279 std::sort(Key.begin(), Key.end());
1280 return Uniquifier.count(Key);
1283 /// InsertFormula - If the given formula has not yet been inserted, add it to
1284 /// the list, and return true. Return false otherwise.
1285 /// The formula must be in canonical form.
1286 bool LSRUse::InsertFormula(const Formula &F) {
1287 assert(F.isCanonical() && "Invalid canonical representation");
1289 if (!Formulae.empty() && RigidFormula)
1292 SmallVector<const SCEV *, 4> Key = F.BaseRegs;
1293 if (F.ScaledReg) Key.push_back(F.ScaledReg);
1294 // Unstable sort by host order ok, because this is only used for uniquifying.
1295 std::sort(Key.begin(), Key.end());
1297 if (!Uniquifier.insert(Key).second)
1300 // Using a register to hold the value of 0 is not profitable.
1301 assert((!F.ScaledReg || !F.ScaledReg->isZero()) &&
1302 "Zero allocated in a scaled register!");
1304 for (SmallVectorImpl<const SCEV *>::const_iterator I =
1305 F.BaseRegs.begin(), E = F.BaseRegs.end(); I != E; ++I)
1306 assert(!(*I)->isZero() && "Zero allocated in a base register!");
1309 // Add the formula to the list.
1310 Formulae.push_back(F);
1312 // Record registers now being used by this use.
1313 Regs.insert(F.BaseRegs.begin(), F.BaseRegs.end());
1315 Regs.insert(F.ScaledReg);
1320 /// DeleteFormula - Remove the given formula from this use's list.
1321 void LSRUse::DeleteFormula(Formula &F) {
1322 if (&F != &Formulae.back())
1323 std::swap(F, Formulae.back());
1324 Formulae.pop_back();
1327 /// RecomputeRegs - Recompute the Regs field, and update RegUses.
1328 void LSRUse::RecomputeRegs(size_t LUIdx, RegUseTracker &RegUses) {
1329 // Now that we've filtered out some formulae, recompute the Regs set.
1330 SmallPtrSet<const SCEV *, 4> OldRegs = Regs;
1332 for (SmallVectorImpl<Formula>::const_iterator I = Formulae.begin(),
1333 E = Formulae.end(); I != E; ++I) {
1334 const Formula &F = *I;
1335 if (F.ScaledReg) Regs.insert(F.ScaledReg);
1336 Regs.insert(F.BaseRegs.begin(), F.BaseRegs.end());
1339 // Update the RegTracker.
1340 for (const SCEV *S : OldRegs)
1342 RegUses.DropRegister(S, LUIdx);
1345 void LSRUse::print(raw_ostream &OS) const {
1346 OS << "LSR Use: Kind=";
1348 case Basic: OS << "Basic"; break;
1349 case Special: OS << "Special"; break;
1350 case ICmpZero: OS << "ICmpZero"; break;
1352 OS << "Address of ";
1353 if (AccessTy->isPointerTy())
1354 OS << "pointer"; // the full pointer type could be really verbose
1359 OS << ", Offsets={";
1360 for (SmallVectorImpl<int64_t>::const_iterator I = Offsets.begin(),
1361 E = Offsets.end(); I != E; ++I) {
1363 if (std::next(I) != E)
1368 if (AllFixupsOutsideLoop)
1369 OS << ", all-fixups-outside-loop";
1371 if (WidestFixupType)
1372 OS << ", widest fixup type: " << *WidestFixupType;
1375 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1376 void LSRUse::dump() const {
1377 print(errs()); errs() << '\n';
1381 static bool isAMCompletelyFolded(const TargetTransformInfo &TTI,
1382 LSRUse::KindType Kind, Type *AccessTy,
1383 GlobalValue *BaseGV, int64_t BaseOffset,
1384 bool HasBaseReg, int64_t Scale) {
1386 case LSRUse::Address:
1387 return TTI.isLegalAddressingMode(AccessTy, BaseGV, BaseOffset, HasBaseReg, Scale);
1389 // Otherwise, just guess that reg+reg addressing is legal.
1392 case LSRUse::ICmpZero:
1393 // There's not even a target hook for querying whether it would be legal to
1394 // fold a GV into an ICmp.
1398 // ICmp only has two operands; don't allow more than two non-trivial parts.
1399 if (Scale != 0 && HasBaseReg && BaseOffset != 0)
1402 // ICmp only supports no scale or a -1 scale, as we can "fold" a -1 scale by
1403 // putting the scaled register in the other operand of the icmp.
1404 if (Scale != 0 && Scale != -1)
1407 // If we have low-level target information, ask the target if it can fold an
1408 // integer immediate on an icmp.
1409 if (BaseOffset != 0) {
1411 // ICmpZero BaseReg + BaseOffset => ICmp BaseReg, -BaseOffset
1412 // ICmpZero -1*ScaleReg + BaseOffset => ICmp ScaleReg, BaseOffset
1413 // Offs is the ICmp immediate.
1415 // The cast does the right thing with INT64_MIN.
1416 BaseOffset = -(uint64_t)BaseOffset;
1417 return TTI.isLegalICmpImmediate(BaseOffset);
1420 // ICmpZero BaseReg + -1*ScaleReg => ICmp BaseReg, ScaleReg
1424 // Only handle single-register values.
1425 return !BaseGV && Scale == 0 && BaseOffset == 0;
1427 case LSRUse::Special:
1428 // Special case Basic to handle -1 scales.
1429 return !BaseGV && (Scale == 0 || Scale == -1) && BaseOffset == 0;
1432 llvm_unreachable("Invalid LSRUse Kind!");
1435 static bool isAMCompletelyFolded(const TargetTransformInfo &TTI,
1436 int64_t MinOffset, int64_t MaxOffset,
1437 LSRUse::KindType Kind, Type *AccessTy,
1438 GlobalValue *BaseGV, int64_t BaseOffset,
1439 bool HasBaseReg, int64_t Scale) {
1440 // Check for overflow.
1441 if (((int64_t)((uint64_t)BaseOffset + MinOffset) > BaseOffset) !=
1444 MinOffset = (uint64_t)BaseOffset + MinOffset;
1445 if (((int64_t)((uint64_t)BaseOffset + MaxOffset) > BaseOffset) !=
1448 MaxOffset = (uint64_t)BaseOffset + MaxOffset;
1450 return isAMCompletelyFolded(TTI, Kind, AccessTy, BaseGV, MinOffset,
1451 HasBaseReg, Scale) &&
1452 isAMCompletelyFolded(TTI, Kind, AccessTy, BaseGV, MaxOffset,
1456 static bool isAMCompletelyFolded(const TargetTransformInfo &TTI,
1457 int64_t MinOffset, int64_t MaxOffset,
1458 LSRUse::KindType Kind, Type *AccessTy,
1460 // For the purpose of isAMCompletelyFolded either having a canonical formula
1461 // or a scale not equal to zero is correct.
1462 // Problems may arise from non canonical formulae having a scale == 0.
1463 // Strictly speaking it would best to just rely on canonical formulae.
1464 // However, when we generate the scaled formulae, we first check that the
1465 // scaling factor is profitable before computing the actual ScaledReg for
1466 // compile time sake.
1467 assert((F.isCanonical() || F.Scale != 0));
1468 return isAMCompletelyFolded(TTI, MinOffset, MaxOffset, Kind, AccessTy,
1469 F.BaseGV, F.BaseOffset, F.HasBaseReg, F.Scale);
1472 /// isLegalUse - Test whether we know how to expand the current formula.
1473 static bool isLegalUse(const TargetTransformInfo &TTI, int64_t MinOffset,
1474 int64_t MaxOffset, LSRUse::KindType Kind, Type *AccessTy,
1475 GlobalValue *BaseGV, int64_t BaseOffset, bool HasBaseReg,
1477 // We know how to expand completely foldable formulae.
1478 return isAMCompletelyFolded(TTI, MinOffset, MaxOffset, Kind, AccessTy, BaseGV,
1479 BaseOffset, HasBaseReg, Scale) ||
1480 // Or formulae that use a base register produced by a sum of base
1483 isAMCompletelyFolded(TTI, MinOffset, MaxOffset, Kind, AccessTy,
1484 BaseGV, BaseOffset, true, 0));
1487 static bool isLegalUse(const TargetTransformInfo &TTI, int64_t MinOffset,
1488 int64_t MaxOffset, LSRUse::KindType Kind, Type *AccessTy,
1490 return isLegalUse(TTI, MinOffset, MaxOffset, Kind, AccessTy, F.BaseGV,
1491 F.BaseOffset, F.HasBaseReg, F.Scale);
1494 static bool isAMCompletelyFolded(const TargetTransformInfo &TTI,
1495 const LSRUse &LU, const Formula &F) {
1496 return isAMCompletelyFolded(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind,
1497 LU.AccessTy, F.BaseGV, F.BaseOffset, F.HasBaseReg,
1501 static unsigned getScalingFactorCost(const TargetTransformInfo &TTI,
1502 const LSRUse &LU, const Formula &F) {
1506 // If the use is not completely folded in that instruction, we will have to
1507 // pay an extra cost only for scale != 1.
1508 if (!isAMCompletelyFolded(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind,
1510 return F.Scale != 1;
1513 case LSRUse::Address: {
1514 // Check the scaling factor cost with both the min and max offsets.
1515 int ScaleCostMinOffset =
1516 TTI.getScalingFactorCost(LU.AccessTy, F.BaseGV,
1517 F.BaseOffset + LU.MinOffset,
1518 F.HasBaseReg, F.Scale);
1519 int ScaleCostMaxOffset =
1520 TTI.getScalingFactorCost(LU.AccessTy, F.BaseGV,
1521 F.BaseOffset + LU.MaxOffset,
1522 F.HasBaseReg, F.Scale);
1524 assert(ScaleCostMinOffset >= 0 && ScaleCostMaxOffset >= 0 &&
1525 "Legal addressing mode has an illegal cost!");
1526 return std::max(ScaleCostMinOffset, ScaleCostMaxOffset);
1528 case LSRUse::ICmpZero:
1530 case LSRUse::Special:
1531 // The use is completely folded, i.e., everything is folded into the
1536 llvm_unreachable("Invalid LSRUse Kind!");
1539 static bool isAlwaysFoldable(const TargetTransformInfo &TTI,
1540 LSRUse::KindType Kind, Type *AccessTy,
1541 GlobalValue *BaseGV, int64_t BaseOffset,
1543 // Fast-path: zero is always foldable.
1544 if (BaseOffset == 0 && !BaseGV) return true;
1546 // Conservatively, create an address with an immediate and a
1547 // base and a scale.
1548 int64_t Scale = Kind == LSRUse::ICmpZero ? -1 : 1;
1550 // Canonicalize a scale of 1 to a base register if the formula doesn't
1551 // already have a base register.
1552 if (!HasBaseReg && Scale == 1) {
1557 return isAMCompletelyFolded(TTI, Kind, AccessTy, BaseGV, BaseOffset,
1561 static bool isAlwaysFoldable(const TargetTransformInfo &TTI,
1562 ScalarEvolution &SE, int64_t MinOffset,
1563 int64_t MaxOffset, LSRUse::KindType Kind,
1564 Type *AccessTy, const SCEV *S, bool HasBaseReg) {
1565 // Fast-path: zero is always foldable.
1566 if (S->isZero()) return true;
1568 // Conservatively, create an address with an immediate and a
1569 // base and a scale.
1570 int64_t BaseOffset = ExtractImmediate(S, SE);
1571 GlobalValue *BaseGV = ExtractSymbol(S, SE);
1573 // If there's anything else involved, it's not foldable.
1574 if (!S->isZero()) return false;
1576 // Fast-path: zero is always foldable.
1577 if (BaseOffset == 0 && !BaseGV) return true;
1579 // Conservatively, create an address with an immediate and a
1580 // base and a scale.
1581 int64_t Scale = Kind == LSRUse::ICmpZero ? -1 : 1;
1583 return isAMCompletelyFolded(TTI, MinOffset, MaxOffset, Kind, AccessTy, BaseGV,
1584 BaseOffset, HasBaseReg, Scale);
1589 /// IVInc - An individual increment in a Chain of IV increments.
1590 /// Relate an IV user to an expression that computes the IV it uses from the IV
1591 /// used by the previous link in the Chain.
1593 /// For the head of a chain, IncExpr holds the absolute SCEV expression for the
1594 /// original IVOperand. The head of the chain's IVOperand is only valid during
1595 /// chain collection, before LSR replaces IV users. During chain generation,
1596 /// IncExpr can be used to find the new IVOperand that computes the same
1599 Instruction *UserInst;
1601 const SCEV *IncExpr;
1603 IVInc(Instruction *U, Value *O, const SCEV *E):
1604 UserInst(U), IVOperand(O), IncExpr(E) {}
1607 // IVChain - The list of IV increments in program order.
1608 // We typically add the head of a chain without finding subsequent links.
1610 SmallVector<IVInc,1> Incs;
1611 const SCEV *ExprBase;
1613 IVChain() : ExprBase(nullptr) {}
1615 IVChain(const IVInc &Head, const SCEV *Base)
1616 : Incs(1, Head), ExprBase(Base) {}
1618 typedef SmallVectorImpl<IVInc>::const_iterator const_iterator;
1620 // begin - return the first increment in the chain.
1621 const_iterator begin() const {
1622 assert(!Incs.empty());
1623 return std::next(Incs.begin());
1625 const_iterator end() const {
1629 // hasIncs - Returns true if this chain contains any increments.
1630 bool hasIncs() const { return Incs.size() >= 2; }
1632 // add - Add an IVInc to the end of this chain.
1633 void add(const IVInc &X) { Incs.push_back(X); }
1635 // tailUserInst - Returns the last UserInst in the chain.
1636 Instruction *tailUserInst() const { return Incs.back().UserInst; }
1638 // isProfitableIncrement - Returns true if IncExpr can be profitably added to
1640 bool isProfitableIncrement(const SCEV *OperExpr,
1641 const SCEV *IncExpr,
1645 /// ChainUsers - Helper for CollectChains to track multiple IV increment uses.
1646 /// Distinguish between FarUsers that definitely cross IV increments and
1647 /// NearUsers that may be used between IV increments.
1649 SmallPtrSet<Instruction*, 4> FarUsers;
1650 SmallPtrSet<Instruction*, 4> NearUsers;
1653 /// LSRInstance - This class holds state for the main loop strength reduction
1657 ScalarEvolution &SE;
1660 const TargetTransformInfo &TTI;
1664 /// IVIncInsertPos - This is the insert position that the current loop's
1665 /// induction variable increment should be placed. In simple loops, this is
1666 /// the latch block's terminator. But in more complicated cases, this is a
1667 /// position which will dominate all the in-loop post-increment users.
1668 Instruction *IVIncInsertPos;
1670 /// Factors - Interesting factors between use strides.
1671 SmallSetVector<int64_t, 8> Factors;
1673 /// Types - Interesting use types, to facilitate truncation reuse.
1674 SmallSetVector<Type *, 4> Types;
1676 /// Fixups - The list of operands which are to be replaced.
1677 SmallVector<LSRFixup, 16> Fixups;
1679 /// Uses - The list of interesting uses.
1680 SmallVector<LSRUse, 16> Uses;
1682 /// RegUses - Track which uses use which register candidates.
1683 RegUseTracker RegUses;
1685 // Limit the number of chains to avoid quadratic behavior. We don't expect to
1686 // have more than a few IV increment chains in a loop. Missing a Chain falls
1687 // back to normal LSR behavior for those uses.
1688 static const unsigned MaxChains = 8;
1690 /// IVChainVec - IV users can form a chain of IV increments.
1691 SmallVector<IVChain, MaxChains> IVChainVec;
1693 /// IVIncSet - IV users that belong to profitable IVChains.
1694 SmallPtrSet<Use*, MaxChains> IVIncSet;
1696 void OptimizeShadowIV();
1697 bool FindIVUserForCond(ICmpInst *Cond, IVStrideUse *&CondUse);
1698 ICmpInst *OptimizeMax(ICmpInst *Cond, IVStrideUse* &CondUse);
1699 void OptimizeLoopTermCond();
1701 void ChainInstruction(Instruction *UserInst, Instruction *IVOper,
1702 SmallVectorImpl<ChainUsers> &ChainUsersVec);
1703 void FinalizeChain(IVChain &Chain);
1704 void CollectChains();
1705 void GenerateIVChain(const IVChain &Chain, SCEVExpander &Rewriter,
1706 SmallVectorImpl<WeakVH> &DeadInsts);
1708 void CollectInterestingTypesAndFactors();
1709 void CollectFixupsAndInitialFormulae();
1711 LSRFixup &getNewFixup() {
1712 Fixups.push_back(LSRFixup());
1713 return Fixups.back();
1716 // Support for sharing of LSRUses between LSRFixups.
1717 typedef DenseMap<LSRUse::SCEVUseKindPair, size_t> UseMapTy;
1720 bool reconcileNewOffset(LSRUse &LU, int64_t NewOffset, bool HasBaseReg,
1721 LSRUse::KindType Kind, Type *AccessTy);
1723 std::pair<size_t, int64_t> getUse(const SCEV *&Expr,
1724 LSRUse::KindType Kind,
1727 void DeleteUse(LSRUse &LU, size_t LUIdx);
1729 LSRUse *FindUseWithSimilarFormula(const Formula &F, const LSRUse &OrigLU);
1731 void InsertInitialFormula(const SCEV *S, LSRUse &LU, size_t LUIdx);
1732 void InsertSupplementalFormula(const SCEV *S, LSRUse &LU, size_t LUIdx);
1733 void CountRegisters(const Formula &F, size_t LUIdx);
1734 bool InsertFormula(LSRUse &LU, unsigned LUIdx, const Formula &F);
1736 void CollectLoopInvariantFixupsAndFormulae();
1738 void GenerateReassociations(LSRUse &LU, unsigned LUIdx, Formula Base,
1739 unsigned Depth = 0);
1741 void GenerateReassociationsImpl(LSRUse &LU, unsigned LUIdx,
1742 const Formula &Base, unsigned Depth,
1743 size_t Idx, bool IsScaledReg = false);
1744 void GenerateCombinations(LSRUse &LU, unsigned LUIdx, Formula Base);
1745 void GenerateSymbolicOffsetsImpl(LSRUse &LU, unsigned LUIdx,
1746 const Formula &Base, size_t Idx,
1747 bool IsScaledReg = false);
1748 void GenerateSymbolicOffsets(LSRUse &LU, unsigned LUIdx, Formula Base);
1749 void GenerateConstantOffsetsImpl(LSRUse &LU, unsigned LUIdx,
1750 const Formula &Base,
1751 const SmallVectorImpl<int64_t> &Worklist,
1752 size_t Idx, bool IsScaledReg = false);
1753 void GenerateConstantOffsets(LSRUse &LU, unsigned LUIdx, Formula Base);
1754 void GenerateICmpZeroScales(LSRUse &LU, unsigned LUIdx, Formula Base);
1755 void GenerateScales(LSRUse &LU, unsigned LUIdx, Formula Base);
1756 void GenerateTruncates(LSRUse &LU, unsigned LUIdx, Formula Base);
1757 void GenerateCrossUseConstantOffsets();
1758 void GenerateAllReuseFormulae();
1760 void FilterOutUndesirableDedicatedRegisters();
1762 size_t EstimateSearchSpaceComplexity() const;
1763 void NarrowSearchSpaceByDetectingSupersets();
1764 void NarrowSearchSpaceByCollapsingUnrolledCode();
1765 void NarrowSearchSpaceByRefilteringUndesirableDedicatedRegisters();
1766 void NarrowSearchSpaceByPickingWinnerRegs();
1767 void NarrowSearchSpaceUsingHeuristics();
1769 void SolveRecurse(SmallVectorImpl<const Formula *> &Solution,
1771 SmallVectorImpl<const Formula *> &Workspace,
1772 const Cost &CurCost,
1773 const SmallPtrSet<const SCEV *, 16> &CurRegs,
1774 DenseSet<const SCEV *> &VisitedRegs) const;
1775 void Solve(SmallVectorImpl<const Formula *> &Solution) const;
1777 BasicBlock::iterator
1778 HoistInsertPosition(BasicBlock::iterator IP,
1779 const SmallVectorImpl<Instruction *> &Inputs) const;
1780 BasicBlock::iterator
1781 AdjustInsertPositionForExpand(BasicBlock::iterator IP,
1784 SCEVExpander &Rewriter) const;
1786 Value *Expand(const LSRFixup &LF,
1788 BasicBlock::iterator IP,
1789 SCEVExpander &Rewriter,
1790 SmallVectorImpl<WeakVH> &DeadInsts) const;
1791 void RewriteForPHI(PHINode *PN, const LSRFixup &LF,
1793 SCEVExpander &Rewriter,
1794 SmallVectorImpl<WeakVH> &DeadInsts,
1796 void Rewrite(const LSRFixup &LF,
1798 SCEVExpander &Rewriter,
1799 SmallVectorImpl<WeakVH> &DeadInsts,
1801 void ImplementSolution(const SmallVectorImpl<const Formula *> &Solution,
1805 LSRInstance(Loop *L, Pass *P);
1807 bool getChanged() const { return Changed; }
1809 void print_factors_and_types(raw_ostream &OS) const;
1810 void print_fixups(raw_ostream &OS) const;
1811 void print_uses(raw_ostream &OS) const;
1812 void print(raw_ostream &OS) const;
1818 /// OptimizeShadowIV - If IV is used in a int-to-float cast
1819 /// inside the loop then try to eliminate the cast operation.
1820 void LSRInstance::OptimizeShadowIV() {
1821 const SCEV *BackedgeTakenCount = SE.getBackedgeTakenCount(L);
1822 if (isa<SCEVCouldNotCompute>(BackedgeTakenCount))
1825 for (IVUsers::const_iterator UI = IU.begin(), E = IU.end();
1826 UI != E; /* empty */) {
1827 IVUsers::const_iterator CandidateUI = UI;
1829 Instruction *ShadowUse = CandidateUI->getUser();
1830 Type *DestTy = nullptr;
1831 bool IsSigned = false;
1833 /* If shadow use is a int->float cast then insert a second IV
1834 to eliminate this cast.
1836 for (unsigned i = 0; i < n; ++i)
1842 for (unsigned i = 0; i < n; ++i, ++d)
1845 if (UIToFPInst *UCast = dyn_cast<UIToFPInst>(CandidateUI->getUser())) {
1847 DestTy = UCast->getDestTy();
1849 else if (SIToFPInst *SCast = dyn_cast<SIToFPInst>(CandidateUI->getUser())) {
1851 DestTy = SCast->getDestTy();
1853 if (!DestTy) continue;
1855 // If target does not support DestTy natively then do not apply
1856 // this transformation.
1857 if (!TTI.isTypeLegal(DestTy)) continue;
1859 PHINode *PH = dyn_cast<PHINode>(ShadowUse->getOperand(0));
1861 if (PH->getNumIncomingValues() != 2) continue;
1863 Type *SrcTy = PH->getType();
1864 int Mantissa = DestTy->getFPMantissaWidth();
1865 if (Mantissa == -1) continue;
1866 if ((int)SE.getTypeSizeInBits(SrcTy) > Mantissa)
1869 unsigned Entry, Latch;
1870 if (PH->getIncomingBlock(0) == L->getLoopPreheader()) {
1878 ConstantInt *Init = dyn_cast<ConstantInt>(PH->getIncomingValue(Entry));
1879 if (!Init) continue;
1880 Constant *NewInit = ConstantFP::get(DestTy, IsSigned ?
1881 (double)Init->getSExtValue() :
1882 (double)Init->getZExtValue());
1884 BinaryOperator *Incr =
1885 dyn_cast<BinaryOperator>(PH->getIncomingValue(Latch));
1886 if (!Incr) continue;
1887 if (Incr->getOpcode() != Instruction::Add
1888 && Incr->getOpcode() != Instruction::Sub)
1891 /* Initialize new IV, double d = 0.0 in above example. */
1892 ConstantInt *C = nullptr;
1893 if (Incr->getOperand(0) == PH)
1894 C = dyn_cast<ConstantInt>(Incr->getOperand(1));
1895 else if (Incr->getOperand(1) == PH)
1896 C = dyn_cast<ConstantInt>(Incr->getOperand(0));
1902 // Ignore negative constants, as the code below doesn't handle them
1903 // correctly. TODO: Remove this restriction.
1904 if (!C->getValue().isStrictlyPositive()) continue;
1906 /* Add new PHINode. */
1907 PHINode *NewPH = PHINode::Create(DestTy, 2, "IV.S.", PH);
1909 /* create new increment. '++d' in above example. */
1910 Constant *CFP = ConstantFP::get(DestTy, C->getZExtValue());
1911 BinaryOperator *NewIncr =
1912 BinaryOperator::Create(Incr->getOpcode() == Instruction::Add ?
1913 Instruction::FAdd : Instruction::FSub,
1914 NewPH, CFP, "IV.S.next.", Incr);
1916 NewPH->addIncoming(NewInit, PH->getIncomingBlock(Entry));
1917 NewPH->addIncoming(NewIncr, PH->getIncomingBlock(Latch));
1919 /* Remove cast operation */
1920 ShadowUse->replaceAllUsesWith(NewPH);
1921 ShadowUse->eraseFromParent();
1927 /// FindIVUserForCond - If Cond has an operand that is an expression of an IV,
1928 /// set the IV user and stride information and return true, otherwise return
1930 bool LSRInstance::FindIVUserForCond(ICmpInst *Cond, IVStrideUse *&CondUse) {
1931 for (IVUsers::iterator UI = IU.begin(), E = IU.end(); UI != E; ++UI)
1932 if (UI->getUser() == Cond) {
1933 // NOTE: we could handle setcc instructions with multiple uses here, but
1934 // InstCombine does it as well for simple uses, it's not clear that it
1935 // occurs enough in real life to handle.
1942 /// OptimizeMax - Rewrite the loop's terminating condition if it uses
1943 /// a max computation.
1945 /// This is a narrow solution to a specific, but acute, problem. For loops
1951 /// } while (++i < n);
1953 /// the trip count isn't just 'n', because 'n' might not be positive. And
1954 /// unfortunately this can come up even for loops where the user didn't use
1955 /// a C do-while loop. For example, seemingly well-behaved top-test loops
1956 /// will commonly be lowered like this:
1962 /// } while (++i < n);
1965 /// and then it's possible for subsequent optimization to obscure the if
1966 /// test in such a way that indvars can't find it.
1968 /// When indvars can't find the if test in loops like this, it creates a
1969 /// max expression, which allows it to give the loop a canonical
1970 /// induction variable:
1973 /// max = n < 1 ? 1 : n;
1976 /// } while (++i != max);
1978 /// Canonical induction variables are necessary because the loop passes
1979 /// are designed around them. The most obvious example of this is the
1980 /// LoopInfo analysis, which doesn't remember trip count values. It
1981 /// expects to be able to rediscover the trip count each time it is
1982 /// needed, and it does this using a simple analysis that only succeeds if
1983 /// the loop has a canonical induction variable.
1985 /// However, when it comes time to generate code, the maximum operation
1986 /// can be quite costly, especially if it's inside of an outer loop.
1988 /// This function solves this problem by detecting this type of loop and
1989 /// rewriting their conditions from ICMP_NE back to ICMP_SLT, and deleting
1990 /// the instructions for the maximum computation.
1992 ICmpInst *LSRInstance::OptimizeMax(ICmpInst *Cond, IVStrideUse* &CondUse) {
1993 // Check that the loop matches the pattern we're looking for.
1994 if (Cond->getPredicate() != CmpInst::ICMP_EQ &&
1995 Cond->getPredicate() != CmpInst::ICMP_NE)
1998 SelectInst *Sel = dyn_cast<SelectInst>(Cond->getOperand(1));
1999 if (!Sel || !Sel->hasOneUse()) return Cond;
2001 const SCEV *BackedgeTakenCount = SE.getBackedgeTakenCount(L);
2002 if (isa<SCEVCouldNotCompute>(BackedgeTakenCount))
2004 const SCEV *One = SE.getConstant(BackedgeTakenCount->getType(), 1);
2006 // Add one to the backedge-taken count to get the trip count.
2007 const SCEV *IterationCount = SE.getAddExpr(One, BackedgeTakenCount);
2008 if (IterationCount != SE.getSCEV(Sel)) return Cond;
2010 // Check for a max calculation that matches the pattern. There's no check
2011 // for ICMP_ULE here because the comparison would be with zero, which
2012 // isn't interesting.
2013 CmpInst::Predicate Pred = ICmpInst::BAD_ICMP_PREDICATE;
2014 const SCEVNAryExpr *Max = nullptr;
2015 if (const SCEVSMaxExpr *S = dyn_cast<SCEVSMaxExpr>(BackedgeTakenCount)) {
2016 Pred = ICmpInst::ICMP_SLE;
2018 } else if (const SCEVSMaxExpr *S = dyn_cast<SCEVSMaxExpr>(IterationCount)) {
2019 Pred = ICmpInst::ICMP_SLT;
2021 } else if (const SCEVUMaxExpr *U = dyn_cast<SCEVUMaxExpr>(IterationCount)) {
2022 Pred = ICmpInst::ICMP_ULT;
2029 // To handle a max with more than two operands, this optimization would
2030 // require additional checking and setup.
2031 if (Max->getNumOperands() != 2)
2034 const SCEV *MaxLHS = Max->getOperand(0);
2035 const SCEV *MaxRHS = Max->getOperand(1);
2037 // ScalarEvolution canonicalizes constants to the left. For < and >, look
2038 // for a comparison with 1. For <= and >=, a comparison with zero.
2040 (ICmpInst::isTrueWhenEqual(Pred) ? !MaxLHS->isZero() : (MaxLHS != One)))
2043 // Check the relevant induction variable for conformance to
2045 const SCEV *IV = SE.getSCEV(Cond->getOperand(0));
2046 const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(IV);
2047 if (!AR || !AR->isAffine() ||
2048 AR->getStart() != One ||
2049 AR->getStepRecurrence(SE) != One)
2052 assert(AR->getLoop() == L &&
2053 "Loop condition operand is an addrec in a different loop!");
2055 // Check the right operand of the select, and remember it, as it will
2056 // be used in the new comparison instruction.
2057 Value *NewRHS = nullptr;
2058 if (ICmpInst::isTrueWhenEqual(Pred)) {
2059 // Look for n+1, and grab n.
2060 if (AddOperator *BO = dyn_cast<AddOperator>(Sel->getOperand(1)))
2061 if (ConstantInt *BO1 = dyn_cast<ConstantInt>(BO->getOperand(1)))
2062 if (BO1->isOne() && SE.getSCEV(BO->getOperand(0)) == MaxRHS)
2063 NewRHS = BO->getOperand(0);
2064 if (AddOperator *BO = dyn_cast<AddOperator>(Sel->getOperand(2)))
2065 if (ConstantInt *BO1 = dyn_cast<ConstantInt>(BO->getOperand(1)))
2066 if (BO1->isOne() && SE.getSCEV(BO->getOperand(0)) == MaxRHS)
2067 NewRHS = BO->getOperand(0);
2070 } else if (SE.getSCEV(Sel->getOperand(1)) == MaxRHS)
2071 NewRHS = Sel->getOperand(1);
2072 else if (SE.getSCEV(Sel->getOperand(2)) == MaxRHS)
2073 NewRHS = Sel->getOperand(2);
2074 else if (const SCEVUnknown *SU = dyn_cast<SCEVUnknown>(MaxRHS))
2075 NewRHS = SU->getValue();
2077 // Max doesn't match expected pattern.
2080 // Determine the new comparison opcode. It may be signed or unsigned,
2081 // and the original comparison may be either equality or inequality.
2082 if (Cond->getPredicate() == CmpInst::ICMP_EQ)
2083 Pred = CmpInst::getInversePredicate(Pred);
2085 // Ok, everything looks ok to change the condition into an SLT or SGE and
2086 // delete the max calculation.
2088 new ICmpInst(Cond, Pred, Cond->getOperand(0), NewRHS, "scmp");
2090 // Delete the max calculation instructions.
2091 Cond->replaceAllUsesWith(NewCond);
2092 CondUse->setUser(NewCond);
2093 Instruction *Cmp = cast<Instruction>(Sel->getOperand(0));
2094 Cond->eraseFromParent();
2095 Sel->eraseFromParent();
2096 if (Cmp->use_empty())
2097 Cmp->eraseFromParent();
2101 /// OptimizeLoopTermCond - Change loop terminating condition to use the
2102 /// postinc iv when possible.
2104 LSRInstance::OptimizeLoopTermCond() {
2105 SmallPtrSet<Instruction *, 4> PostIncs;
2107 BasicBlock *LatchBlock = L->getLoopLatch();
2108 SmallVector<BasicBlock*, 8> ExitingBlocks;
2109 L->getExitingBlocks(ExitingBlocks);
2111 for (unsigned i = 0, e = ExitingBlocks.size(); i != e; ++i) {
2112 BasicBlock *ExitingBlock = ExitingBlocks[i];
2114 // Get the terminating condition for the loop if possible. If we
2115 // can, we want to change it to use a post-incremented version of its
2116 // induction variable, to allow coalescing the live ranges for the IV into
2117 // one register value.
2119 BranchInst *TermBr = dyn_cast<BranchInst>(ExitingBlock->getTerminator());
2122 // FIXME: Overly conservative, termination condition could be an 'or' etc..
2123 if (TermBr->isUnconditional() || !isa<ICmpInst>(TermBr->getCondition()))
2126 // Search IVUsesByStride to find Cond's IVUse if there is one.
2127 IVStrideUse *CondUse = nullptr;
2128 ICmpInst *Cond = cast<ICmpInst>(TermBr->getCondition());
2129 if (!FindIVUserForCond(Cond, CondUse))
2132 // If the trip count is computed in terms of a max (due to ScalarEvolution
2133 // being unable to find a sufficient guard, for example), change the loop
2134 // comparison to use SLT or ULT instead of NE.
2135 // One consequence of doing this now is that it disrupts the count-down
2136 // optimization. That's not always a bad thing though, because in such
2137 // cases it may still be worthwhile to avoid a max.
2138 Cond = OptimizeMax(Cond, CondUse);
2140 // If this exiting block dominates the latch block, it may also use
2141 // the post-inc value if it won't be shared with other uses.
2142 // Check for dominance.
2143 if (!DT.dominates(ExitingBlock, LatchBlock))
2146 // Conservatively avoid trying to use the post-inc value in non-latch
2147 // exits if there may be pre-inc users in intervening blocks.
2148 if (LatchBlock != ExitingBlock)
2149 for (IVUsers::const_iterator UI = IU.begin(), E = IU.end(); UI != E; ++UI)
2150 // Test if the use is reachable from the exiting block. This dominator
2151 // query is a conservative approximation of reachability.
2152 if (&*UI != CondUse &&
2153 !DT.properlyDominates(UI->getUser()->getParent(), ExitingBlock)) {
2154 // Conservatively assume there may be reuse if the quotient of their
2155 // strides could be a legal scale.
2156 const SCEV *A = IU.getStride(*CondUse, L);
2157 const SCEV *B = IU.getStride(*UI, L);
2158 if (!A || !B) continue;
2159 if (SE.getTypeSizeInBits(A->getType()) !=
2160 SE.getTypeSizeInBits(B->getType())) {
2161 if (SE.getTypeSizeInBits(A->getType()) >
2162 SE.getTypeSizeInBits(B->getType()))
2163 B = SE.getSignExtendExpr(B, A->getType());
2165 A = SE.getSignExtendExpr(A, B->getType());
2167 if (const SCEVConstant *D =
2168 dyn_cast_or_null<SCEVConstant>(getExactSDiv(B, A, SE))) {
2169 const ConstantInt *C = D->getValue();
2170 // Stride of one or negative one can have reuse with non-addresses.
2171 if (C->isOne() || C->isAllOnesValue())
2172 goto decline_post_inc;
2173 // Avoid weird situations.
2174 if (C->getValue().getMinSignedBits() >= 64 ||
2175 C->getValue().isMinSignedValue())
2176 goto decline_post_inc;
2177 // Check for possible scaled-address reuse.
2178 Type *AccessTy = getAccessType(UI->getUser());
2179 int64_t Scale = C->getSExtValue();
2180 if (TTI.isLegalAddressingMode(AccessTy, /*BaseGV=*/ nullptr,
2182 /*HasBaseReg=*/ false, Scale))
2183 goto decline_post_inc;
2185 if (TTI.isLegalAddressingMode(AccessTy, /*BaseGV=*/ nullptr,
2187 /*HasBaseReg=*/ false, Scale))
2188 goto decline_post_inc;
2192 DEBUG(dbgs() << " Change loop exiting icmp to use postinc iv: "
2195 // It's possible for the setcc instruction to be anywhere in the loop, and
2196 // possible for it to have multiple users. If it is not immediately before
2197 // the exiting block branch, move it.
2198 if (&*++BasicBlock::iterator(Cond) != TermBr) {
2199 if (Cond->hasOneUse()) {
2200 Cond->moveBefore(TermBr);
2202 // Clone the terminating condition and insert into the loopend.
2203 ICmpInst *OldCond = Cond;
2204 Cond = cast<ICmpInst>(Cond->clone());
2205 Cond->setName(L->getHeader()->getName() + ".termcond");
2206 ExitingBlock->getInstList().insert(TermBr, Cond);
2208 // Clone the IVUse, as the old use still exists!
2209 CondUse = &IU.AddUser(Cond, CondUse->getOperandValToReplace());
2210 TermBr->replaceUsesOfWith(OldCond, Cond);
2214 // If we get to here, we know that we can transform the setcc instruction to
2215 // use the post-incremented version of the IV, allowing us to coalesce the
2216 // live ranges for the IV correctly.
2217 CondUse->transformToPostInc(L);
2220 PostIncs.insert(Cond);
2224 // Determine an insertion point for the loop induction variable increment. It
2225 // must dominate all the post-inc comparisons we just set up, and it must
2226 // dominate the loop latch edge.
2227 IVIncInsertPos = L->getLoopLatch()->getTerminator();
2228 for (Instruction *Inst : PostIncs) {
2230 DT.findNearestCommonDominator(IVIncInsertPos->getParent(),
2232 if (BB == Inst->getParent())
2233 IVIncInsertPos = Inst;
2234 else if (BB != IVIncInsertPos->getParent())
2235 IVIncInsertPos = BB->getTerminator();
2239 /// reconcileNewOffset - Determine if the given use can accommodate a fixup
2240 /// at the given offset and other details. If so, update the use and
2243 LSRInstance::reconcileNewOffset(LSRUse &LU, int64_t NewOffset, bool HasBaseReg,
2244 LSRUse::KindType Kind, Type *AccessTy) {
2245 int64_t NewMinOffset = LU.MinOffset;
2246 int64_t NewMaxOffset = LU.MaxOffset;
2247 Type *NewAccessTy = AccessTy;
2249 // Check for a mismatched kind. It's tempting to collapse mismatched kinds to
2250 // something conservative, however this can pessimize in the case that one of
2251 // the uses will have all its uses outside the loop, for example.
2252 if (LU.Kind != Kind)
2255 // Check for a mismatched access type, and fall back conservatively as needed.
2256 // TODO: Be less conservative when the type is similar and can use the same
2257 // addressing modes.
2258 if (Kind == LSRUse::Address && AccessTy != LU.AccessTy)
2259 NewAccessTy = Type::getVoidTy(AccessTy->getContext());
2261 // Conservatively assume HasBaseReg is true for now.
2262 if (NewOffset < LU.MinOffset) {
2263 if (!isAlwaysFoldable(TTI, Kind, NewAccessTy, /*BaseGV=*/nullptr,
2264 LU.MaxOffset - NewOffset, HasBaseReg))
2266 NewMinOffset = NewOffset;
2267 } else if (NewOffset > LU.MaxOffset) {
2268 if (!isAlwaysFoldable(TTI, Kind, NewAccessTy, /*BaseGV=*/nullptr,
2269 NewOffset - LU.MinOffset, HasBaseReg))
2271 NewMaxOffset = NewOffset;
2275 LU.MinOffset = NewMinOffset;
2276 LU.MaxOffset = NewMaxOffset;
2277 LU.AccessTy = NewAccessTy;
2278 if (NewOffset != LU.Offsets.back())
2279 LU.Offsets.push_back(NewOffset);
2283 /// getUse - Return an LSRUse index and an offset value for a fixup which
2284 /// needs the given expression, with the given kind and optional access type.
2285 /// Either reuse an existing use or create a new one, as needed.
2286 std::pair<size_t, int64_t>
2287 LSRInstance::getUse(const SCEV *&Expr,
2288 LSRUse::KindType Kind, Type *AccessTy) {
2289 const SCEV *Copy = Expr;
2290 int64_t Offset = ExtractImmediate(Expr, SE);
2292 // Basic uses can't accept any offset, for example.
2293 if (!isAlwaysFoldable(TTI, Kind, AccessTy, /*BaseGV=*/ nullptr,
2294 Offset, /*HasBaseReg=*/ true)) {
2299 std::pair<UseMapTy::iterator, bool> P =
2300 UseMap.insert(std::make_pair(LSRUse::SCEVUseKindPair(Expr, Kind), 0));
2302 // A use already existed with this base.
2303 size_t LUIdx = P.first->second;
2304 LSRUse &LU = Uses[LUIdx];
2305 if (reconcileNewOffset(LU, Offset, /*HasBaseReg=*/true, Kind, AccessTy))
2307 return std::make_pair(LUIdx, Offset);
2310 // Create a new use.
2311 size_t LUIdx = Uses.size();
2312 P.first->second = LUIdx;
2313 Uses.push_back(LSRUse(Kind, AccessTy));
2314 LSRUse &LU = Uses[LUIdx];
2316 // We don't need to track redundant offsets, but we don't need to go out
2317 // of our way here to avoid them.
2318 if (LU.Offsets.empty() || Offset != LU.Offsets.back())
2319 LU.Offsets.push_back(Offset);
2321 LU.MinOffset = Offset;
2322 LU.MaxOffset = Offset;
2323 return std::make_pair(LUIdx, Offset);
2326 /// DeleteUse - Delete the given use from the Uses list.
2327 void LSRInstance::DeleteUse(LSRUse &LU, size_t LUIdx) {
2328 if (&LU != &Uses.back())
2329 std::swap(LU, Uses.back());
2333 RegUses.SwapAndDropUse(LUIdx, Uses.size());
2336 /// FindUseWithFormula - Look for a use distinct from OrigLU which is has
2337 /// a formula that has the same registers as the given formula.
2339 LSRInstance::FindUseWithSimilarFormula(const Formula &OrigF,
2340 const LSRUse &OrigLU) {
2341 // Search all uses for the formula. This could be more clever.
2342 for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
2343 LSRUse &LU = Uses[LUIdx];
2344 // Check whether this use is close enough to OrigLU, to see whether it's
2345 // worthwhile looking through its formulae.
2346 // Ignore ICmpZero uses because they may contain formulae generated by
2347 // GenerateICmpZeroScales, in which case adding fixup offsets may
2349 if (&LU != &OrigLU &&
2350 LU.Kind != LSRUse::ICmpZero &&
2351 LU.Kind == OrigLU.Kind && OrigLU.AccessTy == LU.AccessTy &&
2352 LU.WidestFixupType == OrigLU.WidestFixupType &&
2353 LU.HasFormulaWithSameRegs(OrigF)) {
2354 // Scan through this use's formulae.
2355 for (SmallVectorImpl<Formula>::const_iterator I = LU.Formulae.begin(),
2356 E = LU.Formulae.end(); I != E; ++I) {
2357 const Formula &F = *I;
2358 // Check to see if this formula has the same registers and symbols
2360 if (F.BaseRegs == OrigF.BaseRegs &&
2361 F.ScaledReg == OrigF.ScaledReg &&
2362 F.BaseGV == OrigF.BaseGV &&
2363 F.Scale == OrigF.Scale &&
2364 F.UnfoldedOffset == OrigF.UnfoldedOffset) {
2365 if (F.BaseOffset == 0)
2367 // This is the formula where all the registers and symbols matched;
2368 // there aren't going to be any others. Since we declined it, we
2369 // can skip the rest of the formulae and proceed to the next LSRUse.
2376 // Nothing looked good.
2380 void LSRInstance::CollectInterestingTypesAndFactors() {
2381 SmallSetVector<const SCEV *, 4> Strides;
2383 // Collect interesting types and strides.
2384 SmallVector<const SCEV *, 4> Worklist;
2385 for (IVUsers::const_iterator UI = IU.begin(), E = IU.end(); UI != E; ++UI) {
2386 const SCEV *Expr = IU.getExpr(*UI);
2388 // Collect interesting types.
2389 Types.insert(SE.getEffectiveSCEVType(Expr->getType()));
2391 // Add strides for mentioned loops.
2392 Worklist.push_back(Expr);
2394 const SCEV *S = Worklist.pop_back_val();
2395 if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(S)) {
2396 if (AR->getLoop() == L)
2397 Strides.insert(AR->getStepRecurrence(SE));
2398 Worklist.push_back(AR->getStart());
2399 } else if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(S)) {
2400 Worklist.append(Add->op_begin(), Add->op_end());
2402 } while (!Worklist.empty());
2405 // Compute interesting factors from the set of interesting strides.
2406 for (SmallSetVector<const SCEV *, 4>::const_iterator
2407 I = Strides.begin(), E = Strides.end(); I != E; ++I)
2408 for (SmallSetVector<const SCEV *, 4>::const_iterator NewStrideIter =
2409 std::next(I); NewStrideIter != E; ++NewStrideIter) {
2410 const SCEV *OldStride = *I;
2411 const SCEV *NewStride = *NewStrideIter;
2413 if (SE.getTypeSizeInBits(OldStride->getType()) !=
2414 SE.getTypeSizeInBits(NewStride->getType())) {
2415 if (SE.getTypeSizeInBits(OldStride->getType()) >
2416 SE.getTypeSizeInBits(NewStride->getType()))
2417 NewStride = SE.getSignExtendExpr(NewStride, OldStride->getType());
2419 OldStride = SE.getSignExtendExpr(OldStride, NewStride->getType());
2421 if (const SCEVConstant *Factor =
2422 dyn_cast_or_null<SCEVConstant>(getExactSDiv(NewStride, OldStride,
2424 if (Factor->getValue()->getValue().getMinSignedBits() <= 64)
2425 Factors.insert(Factor->getValue()->getValue().getSExtValue());
2426 } else if (const SCEVConstant *Factor =
2427 dyn_cast_or_null<SCEVConstant>(getExactSDiv(OldStride,
2430 if (Factor->getValue()->getValue().getMinSignedBits() <= 64)
2431 Factors.insert(Factor->getValue()->getValue().getSExtValue());
2435 // If all uses use the same type, don't bother looking for truncation-based
2437 if (Types.size() == 1)
2440 DEBUG(print_factors_and_types(dbgs()));
2443 /// findIVOperand - Helper for CollectChains that finds an IV operand (computed
2444 /// by an AddRec in this loop) within [OI,OE) or returns OE. If IVUsers mapped
2445 /// Instructions to IVStrideUses, we could partially skip this.
2446 static User::op_iterator
2447 findIVOperand(User::op_iterator OI, User::op_iterator OE,
2448 Loop *L, ScalarEvolution &SE) {
2449 for(; OI != OE; ++OI) {
2450 if (Instruction *Oper = dyn_cast<Instruction>(*OI)) {
2451 if (!SE.isSCEVable(Oper->getType()))
2454 if (const SCEVAddRecExpr *AR =
2455 dyn_cast<SCEVAddRecExpr>(SE.getSCEV(Oper))) {
2456 if (AR->getLoop() == L)
2464 /// getWideOperand - IVChain logic must consistenctly peek base TruncInst
2465 /// operands, so wrap it in a convenient helper.
2466 static Value *getWideOperand(Value *Oper) {
2467 if (TruncInst *Trunc = dyn_cast<TruncInst>(Oper))
2468 return Trunc->getOperand(0);
2472 /// isCompatibleIVType - Return true if we allow an IV chain to include both
2474 static bool isCompatibleIVType(Value *LVal, Value *RVal) {
2475 Type *LType = LVal->getType();
2476 Type *RType = RVal->getType();
2477 return (LType == RType) || (LType->isPointerTy() && RType->isPointerTy());
2480 /// getExprBase - Return an approximation of this SCEV expression's "base", or
2481 /// NULL for any constant. Returning the expression itself is
2482 /// conservative. Returning a deeper subexpression is more precise and valid as
2483 /// long as it isn't less complex than another subexpression. For expressions
2484 /// involving multiple unscaled values, we need to return the pointer-type
2485 /// SCEVUnknown. This avoids forming chains across objects, such as:
2486 /// PrevOper==a[i], IVOper==b[i], IVInc==b-a.
2488 /// Since SCEVUnknown is the rightmost type, and pointers are the rightmost
2489 /// SCEVUnknown, we simply return the rightmost SCEV operand.
2490 static const SCEV *getExprBase(const SCEV *S) {
2491 switch (S->getSCEVType()) {
2492 default: // uncluding scUnknown.
2497 return getExprBase(cast<SCEVTruncateExpr>(S)->getOperand());
2499 return getExprBase(cast<SCEVZeroExtendExpr>(S)->getOperand());
2501 return getExprBase(cast<SCEVSignExtendExpr>(S)->getOperand());
2503 // Skip over scaled operands (scMulExpr) to follow add operands as long as
2504 // there's nothing more complex.
2505 // FIXME: not sure if we want to recognize negation.
2506 const SCEVAddExpr *Add = cast<SCEVAddExpr>(S);
2507 for (std::reverse_iterator<SCEVAddExpr::op_iterator> I(Add->op_end()),
2508 E(Add->op_begin()); I != E; ++I) {
2509 const SCEV *SubExpr = *I;
2510 if (SubExpr->getSCEVType() == scAddExpr)
2511 return getExprBase(SubExpr);
2513 if (SubExpr->getSCEVType() != scMulExpr)
2516 return S; // all operands are scaled, be conservative.
2519 return getExprBase(cast<SCEVAddRecExpr>(S)->getStart());
2523 /// Return true if the chain increment is profitable to expand into a loop
2524 /// invariant value, which may require its own register. A profitable chain
2525 /// increment will be an offset relative to the same base. We allow such offsets
2526 /// to potentially be used as chain increment as long as it's not obviously
2527 /// expensive to expand using real instructions.
2528 bool IVChain::isProfitableIncrement(const SCEV *OperExpr,
2529 const SCEV *IncExpr,
2530 ScalarEvolution &SE) {
2531 // Aggressively form chains when -stress-ivchain.
2535 // Do not replace a constant offset from IV head with a nonconstant IV
2537 if (!isa<SCEVConstant>(IncExpr)) {
2538 const SCEV *HeadExpr = SE.getSCEV(getWideOperand(Incs[0].IVOperand));
2539 if (isa<SCEVConstant>(SE.getMinusSCEV(OperExpr, HeadExpr)))
2543 SmallPtrSet<const SCEV*, 8> Processed;
2544 return !isHighCostExpansion(IncExpr, Processed, SE);
2547 /// Return true if the number of registers needed for the chain is estimated to
2548 /// be less than the number required for the individual IV users. First prohibit
2549 /// any IV users that keep the IV live across increments (the Users set should
2550 /// be empty). Next count the number and type of increments in the chain.
2552 /// Chaining IVs can lead to considerable code bloat if ISEL doesn't
2553 /// effectively use postinc addressing modes. Only consider it profitable it the
2554 /// increments can be computed in fewer registers when chained.
2556 /// TODO: Consider IVInc free if it's already used in another chains.
2558 isProfitableChain(IVChain &Chain, SmallPtrSetImpl<Instruction*> &Users,
2559 ScalarEvolution &SE, const TargetTransformInfo &TTI) {
2563 if (!Chain.hasIncs())
2566 if (!Users.empty()) {
2567 DEBUG(dbgs() << "Chain: " << *Chain.Incs[0].UserInst << " users:\n";
2568 for (Instruction *Inst : Users) {
2569 dbgs() << " " << *Inst << "\n";
2573 assert(!Chain.Incs.empty() && "empty IV chains are not allowed");
2575 // The chain itself may require a register, so intialize cost to 1.
2578 // A complete chain likely eliminates the need for keeping the original IV in
2579 // a register. LSR does not currently know how to form a complete chain unless
2580 // the header phi already exists.
2581 if (isa<PHINode>(Chain.tailUserInst())
2582 && SE.getSCEV(Chain.tailUserInst()) == Chain.Incs[0].IncExpr) {
2585 const SCEV *LastIncExpr = nullptr;
2586 unsigned NumConstIncrements = 0;
2587 unsigned NumVarIncrements = 0;
2588 unsigned NumReusedIncrements = 0;
2589 for (IVChain::const_iterator I = Chain.begin(), E = Chain.end();
2592 if (I->IncExpr->isZero())
2595 // Incrementing by zero or some constant is neutral. We assume constants can
2596 // be folded into an addressing mode or an add's immediate operand.
2597 if (isa<SCEVConstant>(I->IncExpr)) {
2598 ++NumConstIncrements;
2602 if (I->IncExpr == LastIncExpr)
2603 ++NumReusedIncrements;
2607 LastIncExpr = I->IncExpr;
2609 // An IV chain with a single increment is handled by LSR's postinc
2610 // uses. However, a chain with multiple increments requires keeping the IV's
2611 // value live longer than it needs to be if chained.
2612 if (NumConstIncrements > 1)
2615 // Materializing increment expressions in the preheader that didn't exist in
2616 // the original code may cost a register. For example, sign-extended array
2617 // indices can produce ridiculous increments like this:
2618 // IV + ((sext i32 (2 * %s) to i64) + (-1 * (sext i32 %s to i64)))
2619 cost += NumVarIncrements;
2621 // Reusing variable increments likely saves a register to hold the multiple of
2623 cost -= NumReusedIncrements;
2625 DEBUG(dbgs() << "Chain: " << *Chain.Incs[0].UserInst << " Cost: " << cost
2631 /// ChainInstruction - Add this IV user to an existing chain or make it the head
2633 void LSRInstance::ChainInstruction(Instruction *UserInst, Instruction *IVOper,
2634 SmallVectorImpl<ChainUsers> &ChainUsersVec) {
2635 // When IVs are used as types of varying widths, they are generally converted
2636 // to a wider type with some uses remaining narrow under a (free) trunc.
2637 Value *const NextIV = getWideOperand(IVOper);
2638 const SCEV *const OperExpr = SE.getSCEV(NextIV);
2639 const SCEV *const OperExprBase = getExprBase(OperExpr);
2641 // Visit all existing chains. Check if its IVOper can be computed as a
2642 // profitable loop invariant increment from the last link in the Chain.
2643 unsigned ChainIdx = 0, NChains = IVChainVec.size();
2644 const SCEV *LastIncExpr = nullptr;
2645 for (; ChainIdx < NChains; ++ChainIdx) {
2646 IVChain &Chain = IVChainVec[ChainIdx];
2648 // Prune the solution space aggressively by checking that both IV operands
2649 // are expressions that operate on the same unscaled SCEVUnknown. This
2650 // "base" will be canceled by the subsequent getMinusSCEV call. Checking
2651 // first avoids creating extra SCEV expressions.
2652 if (!StressIVChain && Chain.ExprBase != OperExprBase)
2655 Value *PrevIV = getWideOperand(Chain.Incs.back().IVOperand);
2656 if (!isCompatibleIVType(PrevIV, NextIV))
2659 // A phi node terminates a chain.
2660 if (isa<PHINode>(UserInst) && isa<PHINode>(Chain.tailUserInst()))
2663 // The increment must be loop-invariant so it can be kept in a register.
2664 const SCEV *PrevExpr = SE.getSCEV(PrevIV);
2665 const SCEV *IncExpr = SE.getMinusSCEV(OperExpr, PrevExpr);
2666 if (!SE.isLoopInvariant(IncExpr, L))
2669 if (Chain.isProfitableIncrement(OperExpr, IncExpr, SE)) {
2670 LastIncExpr = IncExpr;
2674 // If we haven't found a chain, create a new one, unless we hit the max. Don't
2675 // bother for phi nodes, because they must be last in the chain.
2676 if (ChainIdx == NChains) {
2677 if (isa<PHINode>(UserInst))
2679 if (NChains >= MaxChains && !StressIVChain) {
2680 DEBUG(dbgs() << "IV Chain Limit\n");
2683 LastIncExpr = OperExpr;
2684 // IVUsers may have skipped over sign/zero extensions. We don't currently
2685 // attempt to form chains involving extensions unless they can be hoisted
2686 // into this loop's AddRec.
2687 if (!isa<SCEVAddRecExpr>(LastIncExpr))
2690 IVChainVec.push_back(IVChain(IVInc(UserInst, IVOper, LastIncExpr),
2692 ChainUsersVec.resize(NChains);
2693 DEBUG(dbgs() << "IV Chain#" << ChainIdx << " Head: (" << *UserInst
2694 << ") IV=" << *LastIncExpr << "\n");
2696 DEBUG(dbgs() << "IV Chain#" << ChainIdx << " Inc: (" << *UserInst
2697 << ") IV+" << *LastIncExpr << "\n");
2698 // Add this IV user to the end of the chain.
2699 IVChainVec[ChainIdx].add(IVInc(UserInst, IVOper, LastIncExpr));
2701 IVChain &Chain = IVChainVec[ChainIdx];
2703 SmallPtrSet<Instruction*,4> &NearUsers = ChainUsersVec[ChainIdx].NearUsers;
2704 // This chain's NearUsers become FarUsers.
2705 if (!LastIncExpr->isZero()) {
2706 ChainUsersVec[ChainIdx].FarUsers.insert(NearUsers.begin(),
2711 // All other uses of IVOperand become near uses of the chain.
2712 // We currently ignore intermediate values within SCEV expressions, assuming
2713 // they will eventually be used be the current chain, or can be computed
2714 // from one of the chain increments. To be more precise we could
2715 // transitively follow its user and only add leaf IV users to the set.
2716 for (User *U : IVOper->users()) {
2717 Instruction *OtherUse = dyn_cast<Instruction>(U);
2720 // Uses in the chain will no longer be uses if the chain is formed.
2721 // Include the head of the chain in this iteration (not Chain.begin()).
2722 IVChain::const_iterator IncIter = Chain.Incs.begin();
2723 IVChain::const_iterator IncEnd = Chain.Incs.end();
2724 for( ; IncIter != IncEnd; ++IncIter) {
2725 if (IncIter->UserInst == OtherUse)
2728 if (IncIter != IncEnd)
2731 if (SE.isSCEVable(OtherUse->getType())
2732 && !isa<SCEVUnknown>(SE.getSCEV(OtherUse))
2733 && IU.isIVUserOrOperand(OtherUse)) {
2736 NearUsers.insert(OtherUse);
2739 // Since this user is part of the chain, it's no longer considered a use
2741 ChainUsersVec[ChainIdx].FarUsers.erase(UserInst);
2744 /// CollectChains - Populate the vector of Chains.
2746 /// This decreases ILP at the architecture level. Targets with ample registers,
2747 /// multiple memory ports, and no register renaming probably don't want
2748 /// this. However, such targets should probably disable LSR altogether.
2750 /// The job of LSR is to make a reasonable choice of induction variables across
2751 /// the loop. Subsequent passes can easily "unchain" computation exposing more
2752 /// ILP *within the loop* if the target wants it.
2754 /// Finding the best IV chain is potentially a scheduling problem. Since LSR
2755 /// will not reorder memory operations, it will recognize this as a chain, but
2756 /// will generate redundant IV increments. Ideally this would be corrected later
2757 /// by a smart scheduler:
2763 /// TODO: Walk the entire domtree within this loop, not just the path to the
2764 /// loop latch. This will discover chains on side paths, but requires
2765 /// maintaining multiple copies of the Chains state.
2766 void LSRInstance::CollectChains() {
2767 DEBUG(dbgs() << "Collecting IV Chains.\n");
2768 SmallVector<ChainUsers, 8> ChainUsersVec;
2770 SmallVector<BasicBlock *,8> LatchPath;
2771 BasicBlock *LoopHeader = L->getHeader();
2772 for (DomTreeNode *Rung = DT.getNode(L->getLoopLatch());
2773 Rung->getBlock() != LoopHeader; Rung = Rung->getIDom()) {
2774 LatchPath.push_back(Rung->getBlock());
2776 LatchPath.push_back(LoopHeader);
2778 // Walk the instruction stream from the loop header to the loop latch.
2779 for (SmallVectorImpl<BasicBlock *>::reverse_iterator
2780 BBIter = LatchPath.rbegin(), BBEnd = LatchPath.rend();
2781 BBIter != BBEnd; ++BBIter) {
2782 for (BasicBlock::iterator I = (*BBIter)->begin(), E = (*BBIter)->end();
2784 // Skip instructions that weren't seen by IVUsers analysis.
2785 if (isa<PHINode>(I) || !IU.isIVUserOrOperand(I))
2788 // Ignore users that are part of a SCEV expression. This way we only
2789 // consider leaf IV Users. This effectively rediscovers a portion of
2790 // IVUsers analysis but in program order this time.
2791 if (SE.isSCEVable(I->getType()) && !isa<SCEVUnknown>(SE.getSCEV(I)))
2794 // Remove this instruction from any NearUsers set it may be in.
2795 for (unsigned ChainIdx = 0, NChains = IVChainVec.size();
2796 ChainIdx < NChains; ++ChainIdx) {
2797 ChainUsersVec[ChainIdx].NearUsers.erase(I);
2799 // Search for operands that can be chained.
2800 SmallPtrSet<Instruction*, 4> UniqueOperands;
2801 User::op_iterator IVOpEnd = I->op_end();
2802 User::op_iterator IVOpIter = findIVOperand(I->op_begin(), IVOpEnd, L, SE);
2803 while (IVOpIter != IVOpEnd) {
2804 Instruction *IVOpInst = cast<Instruction>(*IVOpIter);
2805 if (UniqueOperands.insert(IVOpInst))
2806 ChainInstruction(I, IVOpInst, ChainUsersVec);
2807 IVOpIter = findIVOperand(std::next(IVOpIter), IVOpEnd, L, SE);
2809 } // Continue walking down the instructions.
2810 } // Continue walking down the domtree.
2811 // Visit phi backedges to determine if the chain can generate the IV postinc.
2812 for (BasicBlock::iterator I = L->getHeader()->begin();
2813 PHINode *PN = dyn_cast<PHINode>(I); ++I) {
2814 if (!SE.isSCEVable(PN->getType()))
2818 dyn_cast<Instruction>(PN->getIncomingValueForBlock(L->getLoopLatch()));
2820 ChainInstruction(PN, IncV, ChainUsersVec);
2822 // Remove any unprofitable chains.
2823 unsigned ChainIdx = 0;
2824 for (unsigned UsersIdx = 0, NChains = IVChainVec.size();
2825 UsersIdx < NChains; ++UsersIdx) {
2826 if (!isProfitableChain(IVChainVec[UsersIdx],
2827 ChainUsersVec[UsersIdx].FarUsers, SE, TTI))
2829 // Preserve the chain at UsesIdx.
2830 if (ChainIdx != UsersIdx)
2831 IVChainVec[ChainIdx] = IVChainVec[UsersIdx];
2832 FinalizeChain(IVChainVec[ChainIdx]);
2835 IVChainVec.resize(ChainIdx);
2838 void LSRInstance::FinalizeChain(IVChain &Chain) {
2839 assert(!Chain.Incs.empty() && "empty IV chains are not allowed");
2840 DEBUG(dbgs() << "Final Chain: " << *Chain.Incs[0].UserInst << "\n");
2842 for (IVChain::const_iterator I = Chain.begin(), E = Chain.end();
2844 DEBUG(dbgs() << " Inc: " << *I->UserInst << "\n");
2845 User::op_iterator UseI =
2846 std::find(I->UserInst->op_begin(), I->UserInst->op_end(), I->IVOperand);
2847 assert(UseI != I->UserInst->op_end() && "cannot find IV operand");
2848 IVIncSet.insert(UseI);
2852 /// Return true if the IVInc can be folded into an addressing mode.
2853 static bool canFoldIVIncExpr(const SCEV *IncExpr, Instruction *UserInst,
2854 Value *Operand, const TargetTransformInfo &TTI) {
2855 const SCEVConstant *IncConst = dyn_cast<SCEVConstant>(IncExpr);
2856 if (!IncConst || !isAddressUse(UserInst, Operand))
2859 if (IncConst->getValue()->getValue().getMinSignedBits() > 64)
2862 int64_t IncOffset = IncConst->getValue()->getSExtValue();
2863 if (!isAlwaysFoldable(TTI, LSRUse::Address,
2864 getAccessType(UserInst), /*BaseGV=*/ nullptr,
2865 IncOffset, /*HaseBaseReg=*/ false))
2871 /// GenerateIVChains - Generate an add or subtract for each IVInc in a chain to
2872 /// materialize the IV user's operand from the previous IV user's operand.
2873 void LSRInstance::GenerateIVChain(const IVChain &Chain, SCEVExpander &Rewriter,
2874 SmallVectorImpl<WeakVH> &DeadInsts) {
2875 // Find the new IVOperand for the head of the chain. It may have been replaced
2877 const IVInc &Head = Chain.Incs[0];
2878 User::op_iterator IVOpEnd = Head.UserInst->op_end();
2879 // findIVOperand returns IVOpEnd if it can no longer find a valid IV user.
2880 User::op_iterator IVOpIter = findIVOperand(Head.UserInst->op_begin(),
2882 Value *IVSrc = nullptr;
2883 while (IVOpIter != IVOpEnd) {
2884 IVSrc = getWideOperand(*IVOpIter);
2886 // If this operand computes the expression that the chain needs, we may use
2887 // it. (Check this after setting IVSrc which is used below.)
2889 // Note that if Head.IncExpr is wider than IVSrc, then this phi is too
2890 // narrow for the chain, so we can no longer use it. We do allow using a
2891 // wider phi, assuming the LSR checked for free truncation. In that case we
2892 // should already have a truncate on this operand such that
2893 // getSCEV(IVSrc) == IncExpr.
2894 if (SE.getSCEV(*IVOpIter) == Head.IncExpr
2895 || SE.getSCEV(IVSrc) == Head.IncExpr) {
2898 IVOpIter = findIVOperand(std::next(IVOpIter), IVOpEnd, L, SE);
2900 if (IVOpIter == IVOpEnd) {
2901 // Gracefully give up on this chain.
2902 DEBUG(dbgs() << "Concealed chain head: " << *Head.UserInst << "\n");
2906 DEBUG(dbgs() << "Generate chain at: " << *IVSrc << "\n");
2907 Type *IVTy = IVSrc->getType();
2908 Type *IntTy = SE.getEffectiveSCEVType(IVTy);
2909 const SCEV *LeftOverExpr = nullptr;
2910 for (IVChain::const_iterator IncI = Chain.begin(),
2911 IncE = Chain.end(); IncI != IncE; ++IncI) {
2913 Instruction *InsertPt = IncI->UserInst;
2914 if (isa<PHINode>(InsertPt))
2915 InsertPt = L->getLoopLatch()->getTerminator();
2917 // IVOper will replace the current IV User's operand. IVSrc is the IV
2918 // value currently held in a register.
2919 Value *IVOper = IVSrc;
2920 if (!IncI->IncExpr->isZero()) {
2921 // IncExpr was the result of subtraction of two narrow values, so must
2923 const SCEV *IncExpr = SE.getNoopOrSignExtend(IncI->IncExpr, IntTy);
2924 LeftOverExpr = LeftOverExpr ?
2925 SE.getAddExpr(LeftOverExpr, IncExpr) : IncExpr;
2927 if (LeftOverExpr && !LeftOverExpr->isZero()) {
2928 // Expand the IV increment.
2929 Rewriter.clearPostInc();
2930 Value *IncV = Rewriter.expandCodeFor(LeftOverExpr, IntTy, InsertPt);
2931 const SCEV *IVOperExpr = SE.getAddExpr(SE.getUnknown(IVSrc),
2932 SE.getUnknown(IncV));
2933 IVOper = Rewriter.expandCodeFor(IVOperExpr, IVTy, InsertPt);
2935 // If an IV increment can't be folded, use it as the next IV value.
2936 if (!canFoldIVIncExpr(LeftOverExpr, IncI->UserInst, IncI->IVOperand,
2938 assert(IVTy == IVOper->getType() && "inconsistent IV increment type");
2940 LeftOverExpr = nullptr;
2943 Type *OperTy = IncI->IVOperand->getType();
2944 if (IVTy != OperTy) {
2945 assert(SE.getTypeSizeInBits(IVTy) >= SE.getTypeSizeInBits(OperTy) &&
2946 "cannot extend a chained IV");
2947 IRBuilder<> Builder(InsertPt);
2948 IVOper = Builder.CreateTruncOrBitCast(IVOper, OperTy, "lsr.chain");
2950 IncI->UserInst->replaceUsesOfWith(IncI->IVOperand, IVOper);
2951 DeadInsts.push_back(IncI->IVOperand);
2953 // If LSR created a new, wider phi, we may also replace its postinc. We only
2954 // do this if we also found a wide value for the head of the chain.
2955 if (isa<PHINode>(Chain.tailUserInst())) {
2956 for (BasicBlock::iterator I = L->getHeader()->begin();
2957 PHINode *Phi = dyn_cast<PHINode>(I); ++I) {
2958 if (!isCompatibleIVType(Phi, IVSrc))
2960 Instruction *PostIncV = dyn_cast<Instruction>(
2961 Phi->getIncomingValueForBlock(L->getLoopLatch()));
2962 if (!PostIncV || (SE.getSCEV(PostIncV) != SE.getSCEV(IVSrc)))
2964 Value *IVOper = IVSrc;
2965 Type *PostIncTy = PostIncV->getType();
2966 if (IVTy != PostIncTy) {
2967 assert(PostIncTy->isPointerTy() && "mixing int/ptr IV types");
2968 IRBuilder<> Builder(L->getLoopLatch()->getTerminator());
2969 Builder.SetCurrentDebugLocation(PostIncV->getDebugLoc());
2970 IVOper = Builder.CreatePointerCast(IVSrc, PostIncTy, "lsr.chain");
2972 Phi->replaceUsesOfWith(PostIncV, IVOper);
2973 DeadInsts.push_back(PostIncV);
2978 void LSRInstance::CollectFixupsAndInitialFormulae() {
2979 for (IVUsers::const_iterator UI = IU.begin(), E = IU.end(); UI != E; ++UI) {
2980 Instruction *UserInst = UI->getUser();
2981 // Skip IV users that are part of profitable IV Chains.
2982 User::op_iterator UseI = std::find(UserInst->op_begin(), UserInst->op_end(),
2983 UI->getOperandValToReplace());
2984 assert(UseI != UserInst->op_end() && "cannot find IV operand");
2985 if (IVIncSet.count(UseI))
2989 LSRFixup &LF = getNewFixup();
2990 LF.UserInst = UserInst;
2991 LF.OperandValToReplace = UI->getOperandValToReplace();
2992 LF.PostIncLoops = UI->getPostIncLoops();
2994 LSRUse::KindType Kind = LSRUse::Basic;
2995 Type *AccessTy = nullptr;
2996 if (isAddressUse(LF.UserInst, LF.OperandValToReplace)) {
2997 Kind = LSRUse::Address;
2998 AccessTy = getAccessType(LF.UserInst);
3001 const SCEV *S = IU.getExpr(*UI);
3003 // Equality (== and !=) ICmps are special. We can rewrite (i == N) as
3004 // (N - i == 0), and this allows (N - i) to be the expression that we work
3005 // with rather than just N or i, so we can consider the register
3006 // requirements for both N and i at the same time. Limiting this code to
3007 // equality icmps is not a problem because all interesting loops use
3008 // equality icmps, thanks to IndVarSimplify.
3009 if (ICmpInst *CI = dyn_cast<ICmpInst>(LF.UserInst))
3010 if (CI->isEquality()) {
3011 // Swap the operands if needed to put the OperandValToReplace on the
3012 // left, for consistency.
3013 Value *NV = CI->getOperand(1);
3014 if (NV == LF.OperandValToReplace) {
3015 CI->setOperand(1, CI->getOperand(0));
3016 CI->setOperand(0, NV);
3017 NV = CI->getOperand(1);
3021 // x == y --> x - y == 0
3022 const SCEV *N = SE.getSCEV(NV);
3023 if (SE.isLoopInvariant(N, L) && isSafeToExpand(N, SE)) {
3024 // S is normalized, so normalize N before folding it into S
3025 // to keep the result normalized.
3026 N = TransformForPostIncUse(Normalize, N, CI, nullptr,
3027 LF.PostIncLoops, SE, DT);
3028 Kind = LSRUse::ICmpZero;
3029 S = SE.getMinusSCEV(N, S);
3032 // -1 and the negations of all interesting strides (except the negation
3033 // of -1) are now also interesting.
3034 for (size_t i = 0, e = Factors.size(); i != e; ++i)
3035 if (Factors[i] != -1)
3036 Factors.insert(-(uint64_t)Factors[i]);
3040 // Set up the initial formula for this use.
3041 std::pair<size_t, int64_t> P = getUse(S, Kind, AccessTy);
3043 LF.Offset = P.second;
3044 LSRUse &LU = Uses[LF.LUIdx];
3045 LU.AllFixupsOutsideLoop &= LF.isUseFullyOutsideLoop(L);
3046 if (!LU.WidestFixupType ||
3047 SE.getTypeSizeInBits(LU.WidestFixupType) <
3048 SE.getTypeSizeInBits(LF.OperandValToReplace->getType()))
3049 LU.WidestFixupType = LF.OperandValToReplace->getType();
3051 // If this is the first use of this LSRUse, give it a formula.
3052 if (LU.Formulae.empty()) {
3053 InsertInitialFormula(S, LU, LF.LUIdx);
3054 CountRegisters(LU.Formulae.back(), LF.LUIdx);
3058 DEBUG(print_fixups(dbgs()));
3061 /// InsertInitialFormula - Insert a formula for the given expression into
3062 /// the given use, separating out loop-variant portions from loop-invariant
3063 /// and loop-computable portions.
3065 LSRInstance::InsertInitialFormula(const SCEV *S, LSRUse &LU, size_t LUIdx) {
3066 // Mark uses whose expressions cannot be expanded.
3067 if (!isSafeToExpand(S, SE))
3068 LU.RigidFormula = true;
3071 F.InitialMatch(S, L, SE);
3072 bool Inserted = InsertFormula(LU, LUIdx, F);
3073 assert(Inserted && "Initial formula already exists!"); (void)Inserted;
3076 /// InsertSupplementalFormula - Insert a simple single-register formula for
3077 /// the given expression into the given use.
3079 LSRInstance::InsertSupplementalFormula(const SCEV *S,
3080 LSRUse &LU, size_t LUIdx) {
3082 F.BaseRegs.push_back(S);
3083 F.HasBaseReg = true;
3084 bool Inserted = InsertFormula(LU, LUIdx, F);
3085 assert(Inserted && "Supplemental formula already exists!"); (void)Inserted;
3088 /// CountRegisters - Note which registers are used by the given formula,
3089 /// updating RegUses.
3090 void LSRInstance::CountRegisters(const Formula &F, size_t LUIdx) {
3092 RegUses.CountRegister(F.ScaledReg, LUIdx);
3093 for (SmallVectorImpl<const SCEV *>::const_iterator I = F.BaseRegs.begin(),
3094 E = F.BaseRegs.end(); I != E; ++I)
3095 RegUses.CountRegister(*I, LUIdx);
3098 /// InsertFormula - If the given formula has not yet been inserted, add it to
3099 /// the list, and return true. Return false otherwise.
3100 bool LSRInstance::InsertFormula(LSRUse &LU, unsigned LUIdx, const Formula &F) {
3101 // Do not insert formula that we will not be able to expand.
3102 assert(isLegalUse(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind, LU.AccessTy, F) &&
3103 "Formula is illegal");
3104 if (!LU.InsertFormula(F))
3107 CountRegisters(F, LUIdx);
3111 /// CollectLoopInvariantFixupsAndFormulae - Check for other uses of
3112 /// loop-invariant values which we're tracking. These other uses will pin these
3113 /// values in registers, making them less profitable for elimination.
3114 /// TODO: This currently misses non-constant addrec step registers.
3115 /// TODO: Should this give more weight to users inside the loop?
3117 LSRInstance::CollectLoopInvariantFixupsAndFormulae() {
3118 SmallVector<const SCEV *, 8> Worklist(RegUses.begin(), RegUses.end());
3119 SmallPtrSet<const SCEV *, 8> Inserted;
3121 while (!Worklist.empty()) {
3122 const SCEV *S = Worklist.pop_back_val();
3124 if (const SCEVNAryExpr *N = dyn_cast<SCEVNAryExpr>(S))
3125 Worklist.append(N->op_begin(), N->op_end());
3126 else if (const SCEVCastExpr *C = dyn_cast<SCEVCastExpr>(S))
3127 Worklist.push_back(C->getOperand());
3128 else if (const SCEVUDivExpr *D = dyn_cast<SCEVUDivExpr>(S)) {
3129 Worklist.push_back(D->getLHS());
3130 Worklist.push_back(D->getRHS());
3131 } else if (const SCEVUnknown *US = dyn_cast<SCEVUnknown>(S)) {
3132 if (!Inserted.insert(US)) continue;
3133 const Value *V = US->getValue();
3134 if (const Instruction *Inst = dyn_cast<Instruction>(V)) {
3135 // Look for instructions defined outside the loop.
3136 if (L->contains(Inst)) continue;
3137 } else if (isa<UndefValue>(V))
3138 // Undef doesn't have a live range, so it doesn't matter.
3140 for (const Use &U : V->uses()) {
3141 const Instruction *UserInst = dyn_cast<Instruction>(U.getUser());
3142 // Ignore non-instructions.
3145 // Ignore instructions in other functions (as can happen with
3147 if (UserInst->getParent()->getParent() != L->getHeader()->getParent())
3149 // Ignore instructions not dominated by the loop.
3150 const BasicBlock *UseBB = !isa<PHINode>(UserInst) ?
3151 UserInst->getParent() :
3152 cast<PHINode>(UserInst)->getIncomingBlock(
3153 PHINode::getIncomingValueNumForOperand(U.getOperandNo()));
3154 if (!DT.dominates(L->getHeader(), UseBB))
3156 // Ignore uses which are part of other SCEV expressions, to avoid
3157 // analyzing them multiple times.
3158 if (SE.isSCEVable(UserInst->getType())) {
3159 const SCEV *UserS = SE.getSCEV(const_cast<Instruction *>(UserInst));
3160 // If the user is a no-op, look through to its uses.
3161 if (!isa<SCEVUnknown>(UserS))
3165 SE.getUnknown(const_cast<Instruction *>(UserInst)));
3169 // Ignore icmp instructions which are already being analyzed.
3170 if (const ICmpInst *ICI = dyn_cast<ICmpInst>(UserInst)) {
3171 unsigned OtherIdx = !U.getOperandNo();
3172 Value *OtherOp = const_cast<Value *>(ICI->getOperand(OtherIdx));
3173 if (SE.hasComputableLoopEvolution(SE.getSCEV(OtherOp), L))
3177 LSRFixup &LF = getNewFixup();
3178 LF.UserInst = const_cast<Instruction *>(UserInst);
3179 LF.OperandValToReplace = U;
3180 std::pair<size_t, int64_t> P = getUse(S, LSRUse::Basic, nullptr);
3182 LF.Offset = P.second;
3183 LSRUse &LU = Uses[LF.LUIdx];
3184 LU.AllFixupsOutsideLoop &= LF.isUseFullyOutsideLoop(L);
3185 if (!LU.WidestFixupType ||
3186 SE.getTypeSizeInBits(LU.WidestFixupType) <
3187 SE.getTypeSizeInBits(LF.OperandValToReplace->getType()))
3188 LU.WidestFixupType = LF.OperandValToReplace->getType();
3189 InsertSupplementalFormula(US, LU, LF.LUIdx);
3190 CountRegisters(LU.Formulae.back(), Uses.size() - 1);
3197 /// CollectSubexprs - Split S into subexpressions which can be pulled out into
3198 /// separate registers. If C is non-null, multiply each subexpression by C.
3200 /// Return remainder expression after factoring the subexpressions captured by
3201 /// Ops. If Ops is complete, return NULL.
3202 static const SCEV *CollectSubexprs(const SCEV *S, const SCEVConstant *C,
3203 SmallVectorImpl<const SCEV *> &Ops,
3205 ScalarEvolution &SE,
3206 unsigned Depth = 0) {
3207 // Arbitrarily cap recursion to protect compile time.
3211 if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(S)) {
3212 // Break out add operands.
3213 for (SCEVAddExpr::op_iterator I = Add->op_begin(), E = Add->op_end();
3215 const SCEV *Remainder = CollectSubexprs(*I, C, Ops, L, SE, Depth+1);
3217 Ops.push_back(C ? SE.getMulExpr(C, Remainder) : Remainder);
3220 } else if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(S)) {
3221 // Split a non-zero base out of an addrec.
3222 if (AR->getStart()->isZero())
3225 const SCEV *Remainder = CollectSubexprs(AR->getStart(),
3226 C, Ops, L, SE, Depth+1);
3227 // Split the non-zero AddRec unless it is part of a nested recurrence that
3228 // does not pertain to this loop.
3229 if (Remainder && (AR->getLoop() == L || !isa<SCEVAddRecExpr>(Remainder))) {
3230 Ops.push_back(C ? SE.getMulExpr(C, Remainder) : Remainder);
3231 Remainder = nullptr;
3233 if (Remainder != AR->getStart()) {
3235 Remainder = SE.getConstant(AR->getType(), 0);
3236 return SE.getAddRecExpr(Remainder,
3237 AR->getStepRecurrence(SE),
3239 //FIXME: AR->getNoWrapFlags(SCEV::FlagNW)
3242 } else if (const SCEVMulExpr *Mul = dyn_cast<SCEVMulExpr>(S)) {
3243 // Break (C * (a + b + c)) into C*a + C*b + C*c.
3244 if (Mul->getNumOperands() != 2)
3246 if (const SCEVConstant *Op0 =
3247 dyn_cast<SCEVConstant>(Mul->getOperand(0))) {
3248 C = C ? cast<SCEVConstant>(SE.getMulExpr(C, Op0)) : Op0;
3249 const SCEV *Remainder =
3250 CollectSubexprs(Mul->getOperand(1), C, Ops, L, SE, Depth+1);
3252 Ops.push_back(SE.getMulExpr(C, Remainder));
3259 /// \brief Helper function for LSRInstance::GenerateReassociations.
3260 void LSRInstance::GenerateReassociationsImpl(LSRUse &LU, unsigned LUIdx,
3261 const Formula &Base,
3262 unsigned Depth, size_t Idx,
3264 const SCEV *BaseReg = IsScaledReg ? Base.ScaledReg : Base.BaseRegs[Idx];
3265 SmallVector<const SCEV *, 8> AddOps;
3266 const SCEV *Remainder = CollectSubexprs(BaseReg, nullptr, AddOps, L, SE);
3268 AddOps.push_back(Remainder);
3270 if (AddOps.size() == 1)
3273 for (SmallVectorImpl<const SCEV *>::const_iterator J = AddOps.begin(),
3277 // Loop-variant "unknown" values are uninteresting; we won't be able to
3278 // do anything meaningful with them.
3279 if (isa<SCEVUnknown>(*J) && !SE.isLoopInvariant(*J, L))
3282 // Don't pull a constant into a register if the constant could be folded
3283 // into an immediate field.
3284 if (isAlwaysFoldable(TTI, SE, LU.MinOffset, LU.MaxOffset, LU.Kind,
3285 LU.AccessTy, *J, Base.getNumRegs() > 1))
3288 // Collect all operands except *J.
3289 SmallVector<const SCEV *, 8> InnerAddOps(
3290 ((const SmallVector<const SCEV *, 8> &)AddOps).begin(), J);
3291 InnerAddOps.append(std::next(J),
3292 ((const SmallVector<const SCEV *, 8> &)AddOps).end());
3294 // Don't leave just a constant behind in a register if the constant could
3295 // be folded into an immediate field.
3296 if (InnerAddOps.size() == 1 &&
3297 isAlwaysFoldable(TTI, SE, LU.MinOffset, LU.MaxOffset, LU.Kind,
3298 LU.AccessTy, InnerAddOps[0], Base.getNumRegs() > 1))
3301 const SCEV *InnerSum = SE.getAddExpr(InnerAddOps);
3302 if (InnerSum->isZero())
3306 // Add the remaining pieces of the add back into the new formula.
3307 const SCEVConstant *InnerSumSC = dyn_cast<SCEVConstant>(InnerSum);
3308 if (InnerSumSC && SE.getTypeSizeInBits(InnerSumSC->getType()) <= 64 &&
3309 TTI.isLegalAddImmediate((uint64_t)F.UnfoldedOffset +
3310 InnerSumSC->getValue()->getZExtValue())) {
3312 (uint64_t)F.UnfoldedOffset + InnerSumSC->getValue()->getZExtValue();
3314 F.ScaledReg = nullptr;
3316 F.BaseRegs.erase(F.BaseRegs.begin() + Idx);
3317 } else if (IsScaledReg)
3318 F.ScaledReg = InnerSum;
3320 F.BaseRegs[Idx] = InnerSum;
3322 // Add J as its own register, or an unfolded immediate.
3323 const SCEVConstant *SC = dyn_cast<SCEVConstant>(*J);
3324 if (SC && SE.getTypeSizeInBits(SC->getType()) <= 64 &&
3325 TTI.isLegalAddImmediate((uint64_t)F.UnfoldedOffset +
3326 SC->getValue()->getZExtValue()))
3328 (uint64_t)F.UnfoldedOffset + SC->getValue()->getZExtValue();
3330 F.BaseRegs.push_back(*J);
3331 // We may have changed the number of register in base regs, adjust the
3332 // formula accordingly.
3335 if (InsertFormula(LU, LUIdx, F))
3336 // If that formula hadn't been seen before, recurse to find more like
3338 GenerateReassociations(LU, LUIdx, LU.Formulae.back(), Depth + 1);
3342 /// GenerateReassociations - Split out subexpressions from adds and the bases of
3344 void LSRInstance::GenerateReassociations(LSRUse &LU, unsigned LUIdx,
3345 Formula Base, unsigned Depth) {
3346 assert(Base.isCanonical() && "Input must be in the canonical form");
3347 // Arbitrarily cap recursion to protect compile time.
3351 for (size_t i = 0, e = Base.BaseRegs.size(); i != e; ++i)
3352 GenerateReassociationsImpl(LU, LUIdx, Base, Depth, i);
3354 if (Base.Scale == 1)
3355 GenerateReassociationsImpl(LU, LUIdx, Base, Depth,
3356 /* Idx */ -1, /* IsScaledReg */ true);
3359 /// GenerateCombinations - Generate a formula consisting of all of the
3360 /// loop-dominating registers added into a single register.
3361 void LSRInstance::GenerateCombinations(LSRUse &LU, unsigned LUIdx,
3363 // This method is only interesting on a plurality of registers.
3364 if (Base.BaseRegs.size() + (Base.Scale == 1) <= 1)
3367 // Flatten the representation, i.e., reg1 + 1*reg2 => reg1 + reg2, before
3368 // processing the formula.
3372 SmallVector<const SCEV *, 4> Ops;
3373 for (SmallVectorImpl<const SCEV *>::const_iterator
3374 I = Base.BaseRegs.begin(), E = Base.BaseRegs.end(); I != E; ++I) {
3375 const SCEV *BaseReg = *I;
3376 if (SE.properlyDominates(BaseReg, L->getHeader()) &&
3377 !SE.hasComputableLoopEvolution(BaseReg, L))
3378 Ops.push_back(BaseReg);
3380 F.BaseRegs.push_back(BaseReg);
3382 if (Ops.size() > 1) {
3383 const SCEV *Sum = SE.getAddExpr(Ops);
3384 // TODO: If Sum is zero, it probably means ScalarEvolution missed an
3385 // opportunity to fold something. For now, just ignore such cases
3386 // rather than proceed with zero in a register.
3387 if (!Sum->isZero()) {
3388 F.BaseRegs.push_back(Sum);
3390 (void)InsertFormula(LU, LUIdx, F);
3395 /// \brief Helper function for LSRInstance::GenerateSymbolicOffsets.
3396 void LSRInstance::GenerateSymbolicOffsetsImpl(LSRUse &LU, unsigned LUIdx,
3397 const Formula &Base, size_t Idx,
3399 const SCEV *G = IsScaledReg ? Base.ScaledReg : Base.BaseRegs[Idx];
3400 GlobalValue *GV = ExtractSymbol(G, SE);
3401 if (G->isZero() || !GV)
3405 if (!isLegalUse(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind, LU.AccessTy, F))
3410 F.BaseRegs[Idx] = G;
3411 (void)InsertFormula(LU, LUIdx, F);
3414 /// GenerateSymbolicOffsets - Generate reuse formulae using symbolic offsets.
3415 void LSRInstance::GenerateSymbolicOffsets(LSRUse &LU, unsigned LUIdx,
3417 // We can't add a symbolic offset if the address already contains one.
3418 if (Base.BaseGV) return;
3420 for (size_t i = 0, e = Base.BaseRegs.size(); i != e; ++i)
3421 GenerateSymbolicOffsetsImpl(LU, LUIdx, Base, i);
3422 if (Base.Scale == 1)
3423 GenerateSymbolicOffsetsImpl(LU, LUIdx, Base, /* Idx */ -1,
3424 /* IsScaledReg */ true);
3427 /// \brief Helper function for LSRInstance::GenerateConstantOffsets.
3428 void LSRInstance::GenerateConstantOffsetsImpl(
3429 LSRUse &LU, unsigned LUIdx, const Formula &Base,
3430 const SmallVectorImpl<int64_t> &Worklist, size_t Idx, bool IsScaledReg) {
3431 const SCEV *G = IsScaledReg ? Base.ScaledReg : Base.BaseRegs[Idx];
3432 for (SmallVectorImpl<int64_t>::const_iterator I = Worklist.begin(),
3436 F.BaseOffset = (uint64_t)Base.BaseOffset - *I;
3437 if (isLegalUse(TTI, LU.MinOffset - *I, LU.MaxOffset - *I, LU.Kind,
3439 // Add the offset to the base register.
3440 const SCEV *NewG = SE.getAddExpr(SE.getConstant(G->getType(), *I), G);
3441 // If it cancelled out, drop the base register, otherwise update it.
3442 if (NewG->isZero()) {
3445 F.ScaledReg = nullptr;
3447 F.DeleteBaseReg(F.BaseRegs[Idx]);
3449 } else if (IsScaledReg)
3452 F.BaseRegs[Idx] = NewG;
3454 (void)InsertFormula(LU, LUIdx, F);
3458 int64_t Imm = ExtractImmediate(G, SE);
3459 if (G->isZero() || Imm == 0)
3462 F.BaseOffset = (uint64_t)F.BaseOffset + Imm;
3463 if (!isLegalUse(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind, LU.AccessTy, F))
3468 F.BaseRegs[Idx] = G;
3469 (void)InsertFormula(LU, LUIdx, F);
3472 /// GenerateConstantOffsets - Generate reuse formulae using symbolic offsets.
3473 void LSRInstance::GenerateConstantOffsets(LSRUse &LU, unsigned LUIdx,
3475 // TODO: For now, just add the min and max offset, because it usually isn't
3476 // worthwhile looking at everything inbetween.
3477 SmallVector<int64_t, 2> Worklist;
3478 Worklist.push_back(LU.MinOffset);
3479 if (LU.MaxOffset != LU.MinOffset)
3480 Worklist.push_back(LU.MaxOffset);
3482 for (size_t i = 0, e = Base.BaseRegs.size(); i != e; ++i)
3483 GenerateConstantOffsetsImpl(LU, LUIdx, Base, Worklist, i);
3484 if (Base.Scale == 1)
3485 GenerateConstantOffsetsImpl(LU, LUIdx, Base, Worklist, /* Idx */ -1,
3486 /* IsScaledReg */ true);
3489 /// GenerateICmpZeroScales - For ICmpZero, check to see if we can scale up
3490 /// the comparison. For example, x == y -> x*c == y*c.
3491 void LSRInstance::GenerateICmpZeroScales(LSRUse &LU, unsigned LUIdx,
3493 if (LU.Kind != LSRUse::ICmpZero) return;
3495 // Determine the integer type for the base formula.
3496 Type *IntTy = Base.getType();
3498 if (SE.getTypeSizeInBits(IntTy) > 64) return;
3500 // Don't do this if there is more than one offset.
3501 if (LU.MinOffset != LU.MaxOffset) return;
3503 assert(!Base.BaseGV && "ICmpZero use is not legal!");
3505 // Check each interesting stride.
3506 for (SmallSetVector<int64_t, 8>::const_iterator
3507 I = Factors.begin(), E = Factors.end(); I != E; ++I) {
3508 int64_t Factor = *I;
3510 // Check that the multiplication doesn't overflow.
3511 if (Base.BaseOffset == INT64_MIN && Factor == -1)
3513 int64_t NewBaseOffset = (uint64_t)Base.BaseOffset * Factor;
3514 if (NewBaseOffset / Factor != Base.BaseOffset)
3516 // If the offset will be truncated at this use, check that it is in bounds.
3517 if (!IntTy->isPointerTy() &&
3518 !ConstantInt::isValueValidForType(IntTy, NewBaseOffset))
3521 // Check that multiplying with the use offset doesn't overflow.
3522 int64_t Offset = LU.MinOffset;
3523 if (Offset == INT64_MIN && Factor == -1)
3525 Offset = (uint64_t)Offset * Factor;
3526 if (Offset / Factor != LU.MinOffset)
3528 // If the offset will be truncated at this use, check that it is in bounds.
3529 if (!IntTy->isPointerTy() &&
3530 !ConstantInt::isValueValidForType(IntTy, Offset))
3534 F.BaseOffset = NewBaseOffset;
3536 // Check that this scale is legal.
3537 if (!isLegalUse(TTI, Offset, Offset, LU.Kind, LU.AccessTy, F))
3540 // Compensate for the use having MinOffset built into it.
3541 F.BaseOffset = (uint64_t)F.BaseOffset + Offset - LU.MinOffset;
3543 const SCEV *FactorS = SE.getConstant(IntTy, Factor);
3545 // Check that multiplying with each base register doesn't overflow.
3546 for (size_t i = 0, e = F.BaseRegs.size(); i != e; ++i) {
3547 F.BaseRegs[i] = SE.getMulExpr(F.BaseRegs[i], FactorS);
3548 if (getExactSDiv(F.BaseRegs[i], FactorS, SE) != Base.BaseRegs[i])
3552 // Check that multiplying with the scaled register doesn't overflow.
3554 F.ScaledReg = SE.getMulExpr(F.ScaledReg, FactorS);
3555 if (getExactSDiv(F.ScaledReg, FactorS, SE) != Base.ScaledReg)
3559 // Check that multiplying with the unfolded offset doesn't overflow.
3560 if (F.UnfoldedOffset != 0) {
3561 if (F.UnfoldedOffset == INT64_MIN && Factor == -1)
3563 F.UnfoldedOffset = (uint64_t)F.UnfoldedOffset * Factor;
3564 if (F.UnfoldedOffset / Factor != Base.UnfoldedOffset)
3566 // If the offset will be truncated, check that it is in bounds.
3567 if (!IntTy->isPointerTy() &&
3568 !ConstantInt::isValueValidForType(IntTy, F.UnfoldedOffset))
3572 // If we make it here and it's legal, add it.
3573 (void)InsertFormula(LU, LUIdx, F);
3578 /// GenerateScales - Generate stride factor reuse formulae by making use of
3579 /// scaled-offset address modes, for example.
3580 void LSRInstance::GenerateScales(LSRUse &LU, unsigned LUIdx, Formula Base) {
3581 // Determine the integer type for the base formula.
3582 Type *IntTy = Base.getType();
3585 // If this Formula already has a scaled register, we can't add another one.
3586 // Try to unscale the formula to generate a better scale.
3587 if (Base.Scale != 0 && !Base.Unscale())
3590 assert(Base.Scale == 0 && "Unscale did not did its job!");
3592 // Check each interesting stride.
3593 for (SmallSetVector<int64_t, 8>::const_iterator
3594 I = Factors.begin(), E = Factors.end(); I != E; ++I) {
3595 int64_t Factor = *I;
3597 Base.Scale = Factor;
3598 Base.HasBaseReg = Base.BaseRegs.size() > 1;
3599 // Check whether this scale is going to be legal.
3600 if (!isLegalUse(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind, LU.AccessTy,
3602 // As a special-case, handle special out-of-loop Basic users specially.
3603 // TODO: Reconsider this special case.
3604 if (LU.Kind == LSRUse::Basic &&
3605 isLegalUse(TTI, LU.MinOffset, LU.MaxOffset, LSRUse::Special,
3606 LU.AccessTy, Base) &&
3607 LU.AllFixupsOutsideLoop)
3608 LU.Kind = LSRUse::Special;
3612 // For an ICmpZero, negating a solitary base register won't lead to
3614 if (LU.Kind == LSRUse::ICmpZero &&
3615 !Base.HasBaseReg && Base.BaseOffset == 0 && !Base.BaseGV)
3617 // For each addrec base reg, apply the scale, if possible.
3618 for (size_t i = 0, e = Base.BaseRegs.size(); i != e; ++i)
3619 if (const SCEVAddRecExpr *AR =
3620 dyn_cast<SCEVAddRecExpr>(Base.BaseRegs[i])) {
3621 const SCEV *FactorS = SE.getConstant(IntTy, Factor);
3622 if (FactorS->isZero())
3624 // Divide out the factor, ignoring high bits, since we'll be
3625 // scaling the value back up in the end.
3626 if (const SCEV *Quotient = getExactSDiv(AR, FactorS, SE, true)) {
3627 // TODO: This could be optimized to avoid all the copying.
3629 F.ScaledReg = Quotient;
3630 F.DeleteBaseReg(F.BaseRegs[i]);
3631 // The canonical representation of 1*reg is reg, which is already in
3632 // Base. In that case, do not try to insert the formula, it will be
3634 if (F.Scale == 1 && F.BaseRegs.empty())
3636 (void)InsertFormula(LU, LUIdx, F);
3642 /// GenerateTruncates - Generate reuse formulae from different IV types.
3643 void LSRInstance::GenerateTruncates(LSRUse &LU, unsigned LUIdx, Formula Base) {
3644 // Don't bother truncating symbolic values.
3645 if (Base.BaseGV) return;
3647 // Determine the integer type for the base formula.
3648 Type *DstTy = Base.getType();
3650 DstTy = SE.getEffectiveSCEVType(DstTy);
3652 for (SmallSetVector<Type *, 4>::const_iterator
3653 I = Types.begin(), E = Types.end(); I != E; ++I) {
3655 if (SrcTy != DstTy && TTI.isTruncateFree(SrcTy, DstTy)) {
3658 if (F.ScaledReg) F.ScaledReg = SE.getAnyExtendExpr(F.ScaledReg, *I);
3659 for (SmallVectorImpl<const SCEV *>::iterator J = F.BaseRegs.begin(),
3660 JE = F.BaseRegs.end(); J != JE; ++J)
3661 *J = SE.getAnyExtendExpr(*J, SrcTy);
3663 // TODO: This assumes we've done basic processing on all uses and
3664 // have an idea what the register usage is.
3665 if (!F.hasRegsUsedByUsesOtherThan(LUIdx, RegUses))
3668 (void)InsertFormula(LU, LUIdx, F);
3675 /// WorkItem - Helper class for GenerateCrossUseConstantOffsets. It's used to
3676 /// defer modifications so that the search phase doesn't have to worry about
3677 /// the data structures moving underneath it.
3681 const SCEV *OrigReg;
3683 WorkItem(size_t LI, int64_t I, const SCEV *R)
3684 : LUIdx(LI), Imm(I), OrigReg(R) {}
3686 void print(raw_ostream &OS) const;
3692 void WorkItem::print(raw_ostream &OS) const {
3693 OS << "in formulae referencing " << *OrigReg << " in use " << LUIdx
3694 << " , add offset " << Imm;
3697 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
3698 void WorkItem::dump() const {
3699 print(errs()); errs() << '\n';
3703 /// GenerateCrossUseConstantOffsets - Look for registers which are a constant
3704 /// distance apart and try to form reuse opportunities between them.
3705 void LSRInstance::GenerateCrossUseConstantOffsets() {
3706 // Group the registers by their value without any added constant offset.
3707 typedef std::map<int64_t, const SCEV *> ImmMapTy;
3708 typedef DenseMap<const SCEV *, ImmMapTy> RegMapTy;
3710 DenseMap<const SCEV *, SmallBitVector> UsedByIndicesMap;
3711 SmallVector<const SCEV *, 8> Sequence;
3712 for (RegUseTracker::const_iterator I = RegUses.begin(), E = RegUses.end();
3714 const SCEV *Reg = *I;
3715 int64_t Imm = ExtractImmediate(Reg, SE);
3716 std::pair<RegMapTy::iterator, bool> Pair =
3717 Map.insert(std::make_pair(Reg, ImmMapTy()));
3719 Sequence.push_back(Reg);
3720 Pair.first->second.insert(std::make_pair(Imm, *I));
3721 UsedByIndicesMap[Reg] |= RegUses.getUsedByIndices(*I);
3724 // Now examine each set of registers with the same base value. Build up
3725 // a list of work to do and do the work in a separate step so that we're
3726 // not adding formulae and register counts while we're searching.
3727 SmallVector<WorkItem, 32> WorkItems;
3728 SmallSet<std::pair<size_t, int64_t>, 32> UniqueItems;
3729 for (SmallVectorImpl<const SCEV *>::const_iterator I = Sequence.begin(),
3730 E = Sequence.end(); I != E; ++I) {
3731 const SCEV *Reg = *I;
3732 const ImmMapTy &Imms = Map.find(Reg)->second;
3734 // It's not worthwhile looking for reuse if there's only one offset.
3735 if (Imms.size() == 1)
3738 DEBUG(dbgs() << "Generating cross-use offsets for " << *Reg << ':';
3739 for (ImmMapTy::const_iterator J = Imms.begin(), JE = Imms.end();
3741 dbgs() << ' ' << J->first;
3744 // Examine each offset.
3745 for (ImmMapTy::const_iterator J = Imms.begin(), JE = Imms.end();
3747 const SCEV *OrigReg = J->second;
3749 int64_t JImm = J->first;
3750 const SmallBitVector &UsedByIndices = RegUses.getUsedByIndices(OrigReg);
3752 if (!isa<SCEVConstant>(OrigReg) &&
3753 UsedByIndicesMap[Reg].count() == 1) {
3754 DEBUG(dbgs() << "Skipping cross-use reuse for " << *OrigReg << '\n');
3758 // Conservatively examine offsets between this orig reg a few selected
3760 ImmMapTy::const_iterator OtherImms[] = {
3761 Imms.begin(), std::prev(Imms.end()),
3762 Imms.lower_bound((Imms.begin()->first + std::prev(Imms.end())->first) /
3765 for (size_t i = 0, e = array_lengthof(OtherImms); i != e; ++i) {
3766 ImmMapTy::const_iterator M = OtherImms[i];
3767 if (M == J || M == JE) continue;
3769 // Compute the difference between the two.
3770 int64_t Imm = (uint64_t)JImm - M->first;
3771 for (int LUIdx = UsedByIndices.find_first(); LUIdx != -1;
3772 LUIdx = UsedByIndices.find_next(LUIdx))
3773 // Make a memo of this use, offset, and register tuple.
3774 if (UniqueItems.insert(std::make_pair(LUIdx, Imm)))
3775 WorkItems.push_back(WorkItem(LUIdx, Imm, OrigReg));
3782 UsedByIndicesMap.clear();
3783 UniqueItems.clear();
3785 // Now iterate through the worklist and add new formulae.
3786 for (SmallVectorImpl<WorkItem>::const_iterator I = WorkItems.begin(),
3787 E = WorkItems.end(); I != E; ++I) {
3788 const WorkItem &WI = *I;
3789 size_t LUIdx = WI.LUIdx;
3790 LSRUse &LU = Uses[LUIdx];
3791 int64_t Imm = WI.Imm;
3792 const SCEV *OrigReg = WI.OrigReg;
3794 Type *IntTy = SE.getEffectiveSCEVType(OrigReg->getType());
3795 const SCEV *NegImmS = SE.getSCEV(ConstantInt::get(IntTy, -(uint64_t)Imm));
3796 unsigned BitWidth = SE.getTypeSizeInBits(IntTy);
3798 // TODO: Use a more targeted data structure.
3799 for (size_t L = 0, LE = LU.Formulae.size(); L != LE; ++L) {
3800 Formula F = LU.Formulae[L];
3801 // FIXME: The code for the scaled and unscaled registers looks
3802 // very similar but slightly different. Investigate if they
3803 // could be merged. That way, we would not have to unscale the
3806 // Use the immediate in the scaled register.
3807 if (F.ScaledReg == OrigReg) {
3808 int64_t Offset = (uint64_t)F.BaseOffset + Imm * (uint64_t)F.Scale;
3809 // Don't create 50 + reg(-50).
3810 if (F.referencesReg(SE.getSCEV(
3811 ConstantInt::get(IntTy, -(uint64_t)Offset))))
3814 NewF.BaseOffset = Offset;
3815 if (!isLegalUse(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind, LU.AccessTy,
3818 NewF.ScaledReg = SE.getAddExpr(NegImmS, NewF.ScaledReg);
3820 // If the new scale is a constant in a register, and adding the constant
3821 // value to the immediate would produce a value closer to zero than the
3822 // immediate itself, then the formula isn't worthwhile.
3823 if (const SCEVConstant *C = dyn_cast<SCEVConstant>(NewF.ScaledReg))
3824 if (C->getValue()->isNegative() !=
3825 (NewF.BaseOffset < 0) &&
3826 (C->getValue()->getValue().abs() * APInt(BitWidth, F.Scale))
3827 .ule(abs64(NewF.BaseOffset)))
3831 NewF.Canonicalize();