lib/Target/X86/X86InstrFMA.td

   1 //====- X86InstrFMA.td - Describe the X86 Instruction Set --*- tablegen -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file describes FMA (Fused Multiply-Add) instructions.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 //===----------------------------------------------------------------------===//
  15 // FMA3 - Intel 3 operand Fused Multiply-Add instructions
  16 //===----------------------------------------------------------------------===//
  17
  18 multiclass fma3p_rm<bits<8> opc, string OpcodeStr> {
  19   def r : FMA3<opc, MRMSrcReg, (outs VR128:$dst),
  20            (ins VR128:$src1, VR128:$src2),
  21            !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
  22            []>;
  23   def m : FMA3<opc, MRMSrcMem, (outs VR128:$dst),
  24            (ins VR128:$src1, f128mem:$src2),
  25            !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
  26            []>;
  27   def rY : FMA3<opc, MRMSrcReg, (outs VR256:$dst),
  28            (ins VR256:$src1, VR256:$src2),
  29            !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
  30            []>;
  31   def mY : FMA3<opc, MRMSrcMem, (outs VR256:$dst),
  32            (ins VR256:$src1, f256mem:$src2),
  33            !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
  34            []>;
  35 }
  36
  37 multiclass fma3p_forms<bits<8> opc132, bits<8> opc213, bits<8> opc231,
  38                        string OpcodeStr, string PackTy> {
  39   defm r132 : fma3p_rm<opc132, !strconcat(OpcodeStr, !strconcat("132", PackTy))>;
  40   defm r213 : fma3p_rm<opc213, !strconcat(OpcodeStr, !strconcat("213", PackTy))>;
  41   defm r231 : fma3p_rm<opc231, !strconcat(OpcodeStr, !strconcat("231", PackTy))>;
  42 }
  43
  44 // Fused Multiply-Add
  45 let ExeDomain = SSEPackedSingle in {
  46   defm VFMADDPS    : fma3p_forms<0x98, 0xA8, 0xB8, "vfmadd", "ps">;
  47   defm VFMSUBPS    : fma3p_forms<0x9A, 0xAA, 0xBA, "vfmsub", "ps">;
  48   defm VFMADDSUBPS : fma3p_forms<0x96, 0xA6, 0xB6, "vfmaddsub", "ps">;
  49   defm VFMSUBADDPS : fma3p_forms<0x97, 0xA7, 0xB7, "vfmsubadd", "ps">;
  50 }
  51
  52 let ExeDomain = SSEPackedDouble in {
  53   defm VFMADDPD    : fma3p_forms<0x98, 0xA8, 0xB8, "vfmadd", "pd">, VEX_W;
  54   defm VFMSUBPD    : fma3p_forms<0x9A, 0xAA, 0xBA, "vfmsub", "pd">, VEX_W;
  55   defm VFMADDSUBPD : fma3p_forms<0x96, 0xA6, 0xB6, "vfmaddsub", "pd">, VEX_W;
  56   defm VFMSUBADDPD : fma3p_forms<0x97, 0xA7, 0xB7, "vfmsubadd", "pd">, VEX_W;
  57 }
  58
  59 // Fused Negative Multiply-Add
  60 let ExeDomain = SSEPackedSingle in {
  61   defm VFNMADDPS : fma3p_forms<0x9C, 0xAC, 0xBC, "vfnmadd", "ps">;
  62   defm VFNMSUBPS : fma3p_forms<0x9E, 0xAE, 0xBE, "vfnmsub", "ps">;
  63 }
  64 let ExeDomain = SSEPackedDouble in {
  65   defm VFNMADDPD : fma3p_forms<0x9C, 0xAC, 0xBC, "vfnmadd", "pd">, VEX_W;
  66   defm VFNMSUBPD : fma3p_forms<0x9E, 0xAE, 0xBE, "vfnmsub", "pd">, VEX_W;
  67 }
  68
  69 multiclass fma3s_rm<bits<8> opc, string OpcodeStr, X86MemOperand x86memop> {
  70   def r : FMA3<opc, MRMSrcReg, (outs VR128:$dst),
  71            (ins VR128:$src1, VR128:$src2),
  72            !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
  73            []>;
  74   def m : FMA3<opc, MRMSrcMem, (outs VR128:$dst),
  75            (ins VR128:$src1, x86memop:$src2),
  76            !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
  77            []>;
  78 }
  79
  80 multiclass fma3s_forms<bits<8> opc132, bits<8> opc213, bits<8> opc231,
  81                        string OpcodeStr> {
  82   defm SSr132 : fma3s_rm<opc132, !strconcat(OpcodeStr, "132ss"), f32mem>;
  83   defm SSr213 : fma3s_rm<opc213, !strconcat(OpcodeStr, "213ss"), f32mem>;
  84   defm SSr231 : fma3s_rm<opc231, !strconcat(OpcodeStr, "231ss"), f32mem>;
  85   defm SDr132 : fma3s_rm<opc132, !strconcat(OpcodeStr, "132sd"), f64mem>, VEX_W;
  86   defm SDr213 : fma3s_rm<opc213, !strconcat(OpcodeStr, "213sd"), f64mem>, VEX_W;
  87   defm SDr231 : fma3s_rm<opc231, !strconcat(OpcodeStr, "231sd"), f64mem>, VEX_W;
  88 }
  89
  90 defm VFMADD : fma3s_forms<0x99, 0xA9, 0xB9, "vfmadd">;
  91 defm VFMSUB : fma3s_forms<0x9B, 0xAB, 0xBB, "vfmsub">;
  92
  93 defm VFNMADD : fma3s_forms<0x9D, 0xAD, 0xBD, "vfnmadd">;
  94 defm VFNMSUB : fma3s_forms<0x9F, 0xAF, 0xBF, "vfnmsub">;
  95
  96 //===----------------------------------------------------------------------===//
  97 // FMA4 - AMD 4 operand Fused Multiply-Add instructions
  98 //===----------------------------------------------------------------------===//
  99
 100
 101 multiclass fma4s<bits<8> opc, string OpcodeStr, Operand memop> {
 102   def rr : FMA4<opc, MRMSrcReg, (outs VR128:$dst),
 103            (ins VR128:$src1, VR128:$src2, VR128:$src3),
 104            !strconcat(OpcodeStr,
 105            "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
 106            []>, XOP_W;
 107   def rm : FMA4<opc, MRMSrcMem, (outs VR128:$dst),
 108            (ins VR128:$src1, VR128:$src2, memop:$src3),
 109            !strconcat(OpcodeStr,
 110            "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
 111            []>, XOP_W;
 112   def mr : FMA4<opc, MRMSrcMem, (outs VR128:$dst),
 113            (ins VR128:$src1, memop:$src2, VR128:$src3),
 114            !strconcat(OpcodeStr,
 115            "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
 116            []>;
 117 }
 118
 119 multiclass fma4p<bits<8> opc, string OpcodeStr> {
 120   def rr : FMA4<opc, MRMSrcReg, (outs VR128:$dst),
 121            (ins VR128:$src1, VR128:$src2, VR128:$src3),
 122            !strconcat(OpcodeStr,
 123            "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
 124            []>, XOP_W;
 125   def rm : FMA4<opc, MRMSrcMem, (outs VR128:$dst),
 126            (ins VR128:$src1, VR128:$src2, f128mem:$src3),
 127            !strconcat(OpcodeStr,
 128            "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
 129            []>, XOP_W;
 130   def mr : FMA4<opc, MRMSrcMem, (outs VR128:$dst),
 131            (ins VR128:$src1, f128mem:$src2, VR128:$src3),
 132            !strconcat(OpcodeStr,
 133            "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
 134            []>;
 135   def rrY : FMA4<opc, MRMSrcReg, (outs VR256:$dst),
 136            (ins VR256:$src1, VR256:$src2, VR256:$src3),
 137            !strconcat(OpcodeStr,
 138            "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
 139            []>, XOP_W;
 140   def rmY : FMA4<opc, MRMSrcMem, (outs VR256:$dst),
 141            (ins VR256:$src1, VR256:$src2, f256mem:$src3),
 142            !strconcat(OpcodeStr,
 143            "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
 144            []>, XOP_W;
 145   def mrY : FMA4<opc, MRMSrcMem, (outs VR256:$dst),
 146            (ins VR256:$src1, f256mem:$src2, VR256:$src3),
 147            !strconcat(OpcodeStr,
 148            "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
 149            []>;
 150 }
 151
 152 let isAsmParserOnly = 1 in {
 153   defm VFMADDSS4    : fma4s<0x6A, "vfmaddss", ssmem>;
 154   defm VFMADDSD4    : fma4s<0x6B, "vfmaddsd", sdmem>;
 155   defm VFMADDPS4    : fma4p<0x68, "vfmaddps">;
 156   defm VFMADDPD4    : fma4p<0x69, "vfmaddpd">;
 157   defm VFMSUBSS4    : fma4s<0x6E, "vfmsubss", ssmem>;
 158   defm VFMSUBSD4    : fma4s<0x6F, "vfmsubsd", sdmem>;
 159   defm VFMSUBPS4    : fma4p<0x6C, "vfmsubps">;
 160   defm VFMSUBPD4    : fma4p<0x6D, "vfmsubpd">;
 161   defm VFNMADDSS4   : fma4s<0x7A, "vfnmaddss", ssmem>;
 162   defm VFNMADDSD4   : fma4s<0x7B, "vfnmaddsd", sdmem>;
 163   defm VFNMADDPS4   : fma4p<0x78, "vfnmaddps">;
 164   defm VFNMADDPD4   : fma4p<0x79, "vfnmaddpd">;
 165   defm VFNMSUBSS4   : fma4s<0x7E, "vfnmsubss", ssmem>;
 166   defm VFNMSUBSD4   : fma4s<0x7F, "vfnmsubsd", sdmem>;
 167   defm VFNMSUBPS4   : fma4p<0x7C, "vfnmsubps">;
 168   defm VFNMSUBPD4   : fma4p<0x7D, "vfnmsubpd">;
 169   defm VFMADDSUBPS4 : fma4p<0x5C, "vfmaddsubps">;
 170   defm VFMADDSUBPD4 : fma4p<0x5D, "vfmaddsubpd">;
 171   defm VFMSUBADDPS4 : fma4p<0x5E, "vfmsubaddps">;
 172   defm VFMSUBADDPD4 : fma4p<0x5F, "vfmsubaddpd">;
 173 }
 174
 175 // FMA4 Intrinsics patterns
 176
 177 // VFMADD
 178 def : Pat<(int_x86_fma4_vfmadd_ss VR128:$src1, VR128:$src2, VR128:$src3),
 179           (VFMADDSS4rr VR128:$src1, VR128:$src2, VR128:$src3)>;
 180 def : Pat<(int_x86_fma4_vfmadd_ss VR128:$src1, VR128:$src2, sse_load_f32:$src3),
 181           (VFMADDSS4rm VR128:$src1, VR128:$src2, sse_load_f32:$src3)>;
 182 def : Pat<(int_x86_fma4_vfmadd_ss VR128:$src1, sse_load_f32:$src2, VR128:$src3),
 183           (VFMADDSS4mr VR128:$src1, sse_load_f32:$src2, VR128:$src3)>;
 184
 185 def : Pat<(int_x86_fma4_vfmadd_sd VR128:$src1, VR128:$src2, VR128:$src3),
 186           (VFMADDSD4rr VR128:$src1, VR128:$src2, VR128:$src3)>;
 187 def : Pat<(int_x86_fma4_vfmadd_sd VR128:$src1, VR128:$src2, sse_load_f64:$src3),
 188           (VFMADDSD4rm VR128:$src1, VR128:$src2, sse_load_f64:$src3)>;
 189 def : Pat<(int_x86_fma4_vfmadd_sd VR128:$src1, sse_load_f64:$src2, VR128:$src3),
 190           (VFMADDSD4mr VR128:$src1, sse_load_f64:$src2, VR128:$src3)>;
 191
 192 def : Pat<(int_x86_fma4_vfmadd_ps VR128:$src1, VR128:$src2, VR128:$src3),
 193           (VFMADDPS4rr VR128:$src1, VR128:$src2, VR128:$src3)>;
 194 def : Pat<(int_x86_fma4_vfmadd_ps VR128:$src1, VR128:$src2,
 195                                   (memopv4f32 addr:$src3)),
 196           (VFMADDPS4rm VR128:$src1, VR128:$src2, addr:$src3)>;
 197 def : Pat<(int_x86_fma4_vfmadd_ps VR128:$src1, (memopv4f32 addr:$src2),
 198                                   VR128:$src3),
 199           (VFMADDPS4mr VR128:$src1, addr:$src2, VR128:$src3)>;
 200
 201 def : Pat<(int_x86_fma4_vfmadd_pd VR128:$src1, VR128:$src2, VR128:$src3),
 202           (VFMADDPD4rr VR128:$src1, VR128:$src2, VR128:$src3)>;
 203 def : Pat<(int_x86_fma4_vfmadd_pd VR128:$src1, VR128:$src2,
 204                                   (memopv2f64 addr:$src3)),
 205           (VFMADDPD4rm VR128:$src1, VR128:$src2, addr:$src3)>;
 206 def : Pat<(int_x86_fma4_vfmadd_pd VR128:$src1, (memopv2f64 addr:$src2),
 207                                   VR128:$src3),
 208           (VFMADDPD4mr VR128:$src1, addr:$src2, VR128:$src3)>;
 209
 210 def : Pat<(int_x86_fma4_vfmadd_ps_256 VR256:$src1, VR256:$src2, VR256:$src3),
 211           (VFMADDPS4rrY VR256:$src1, VR256:$src2, VR256:$src3)>;
 212 def : Pat<(int_x86_fma4_vfmadd_ps_256 VR256:$src1, VR256:$src2,
 213                                   (memopv8f32 addr:$src3)),
 214           (VFMADDPS4rmY VR256:$src1, VR256:$src2, addr:$src3)>;
 215 def : Pat<(int_x86_fma4_vfmadd_ps_256 VR256:$src1, (memopv8f32 addr:$src2),
 216                                       VR256:$src3),
 217           (VFMADDPS4mrY VR256:$src1, addr:$src2, VR256:$src3)>;
 218
 219 def : Pat<(int_x86_fma4_vfmadd_pd_256 VR256:$src1, VR256:$src2, VR256:$src3),
 220           (VFMADDPD4rrY VR256:$src1, VR256:$src2, VR256:$src3)>;
 221 def : Pat<(int_x86_fma4_vfmadd_pd_256 VR256:$src1, VR256:$src2,
 222                                   (memopv4f64 addr:$src3)),
 223           (VFMADDPD4rmY VR256:$src1, VR256:$src2, addr:$src3)>;
 224 def : Pat<(int_x86_fma4_vfmadd_pd_256 VR256:$src1, (memopv4f64 addr:$src2),
 225                                       VR256:$src3),
 226           (VFMADDPD4mrY VR256:$src1, addr:$src2, VR256:$src3)>;
 227
 228 // VFMSUB
 229 def : Pat<(int_x86_fma4_vfmsub_ss VR128:$src1, VR128:$src2, VR128:$src3),
 230           (VFMSUBSS4rr VR128:$src1, VR128:$src2, VR128:$src3)>;
 231 def : Pat<(int_x86_fma4_vfmsub_ss VR128:$src1, VR128:$src2, sse_load_f32:$src3),
 232           (VFMSUBSS4rm VR128:$src1, VR128:$src2, sse_load_f32:$src3)>;
 233 def : Pat<(int_x86_fma4_vfmsub_ss VR128:$src1, sse_load_f32:$src2, VR128:$src3),
 234           (VFMSUBSS4mr VR128:$src1, sse_load_f32:$src2, VR128:$src3)>;
 235
 236 def : Pat<(int_x86_fma4_vfmsub_sd VR128:$src1, VR128:$src2, VR128:$src3),
 237           (VFMSUBSD4rr VR128:$src1, VR128:$src2, VR128:$src3)>;
 238 def : Pat<(int_x86_fma4_vfmsub_sd VR128:$src1, VR128:$src2, sse_load_f64:$src3),
 239           (VFMSUBSD4rm VR128:$src1, VR128:$src2, sse_load_f64:$src3)>;
 240 def : Pat<(int_x86_fma4_vfmsub_sd VR128:$src1, sse_load_f64:$src2, VR128:$src3),
 241           (VFMSUBSD4mr VR128:$src1, sse_load_f64:$src2, VR128:$src3)>;
 242
 243 def : Pat<(int_x86_fma4_vfmsub_ps VR128:$src1, VR128:$src2, VR128:$src3),
 244           (VFMSUBPS4rr VR128:$src1, VR128:$src2, VR128:$src3)>;
 245 def : Pat<(int_x86_fma4_vfmsub_ps VR128:$src1, VR128:$src2,
 246                                   (memopv4f32 addr:$src3)),
 247           (VFMSUBPS4rm VR128:$src1, VR128:$src2, addr:$src3)>;
 248 def : Pat<(int_x86_fma4_vfmsub_ps VR128:$src1, (memopv4f32 addr:$src2),
 249                                   VR128:$src3),
 250           (VFMSUBPS4mr VR128:$src1, addr:$src2, VR128:$src3)>;
 251
 252 def : Pat<(int_x86_fma4_vfmsub_pd VR128:$src1, VR128:$src2, VR128:$src3),
 253           (VFMSUBPD4rr VR128:$src1, VR128:$src2, VR128:$src3)>;
 254 def : Pat<(int_x86_fma4_vfmsub_pd VR128:$src1, VR128:$src2,
 255                                   (memopv2f64 addr:$src3)),
 256           (VFMSUBPD4rm VR128:$src1, VR128:$src2, addr:$src3)>;
 257 def : Pat<(int_x86_fma4_vfmsub_pd VR128:$src1, (memopv2f64 addr:$src2),
 258                                   VR128:$src3),
 259           (VFMSUBPD4mr VR128:$src1, addr:$src2, VR128:$src3)>;
 260
 261 def : Pat<(int_x86_fma4_vfmsub_ps_256 VR256:$src1, VR256:$src2, VR256:$src3),
 262           (VFMSUBPS4rrY VR256:$src1, VR256:$src2, VR256:$src3)>;
 263 def : Pat<(int_x86_fma4_vfmsub_ps_256 VR256:$src1, VR256:$src2,
 264                                   (memopv8f32 addr:$src3)),
 265           (VFMSUBPS4rmY VR256:$src1, VR256:$src2, addr:$src3)>;
 266 def : Pat<(int_x86_fma4_vfmsub_ps_256 VR256:$src1, (memopv8f32 addr:$src2),
 267                                       VR256:$src3),
 268           (VFMSUBPS4mrY VR256:$src1, addr:$src2, VR256:$src3)>;
 269
 270 def : Pat<(int_x86_fma4_vfmsub_pd_256 VR256:$src1, VR256:$src2, VR256:$src3),
 271           (VFMSUBPD4rrY VR256:$src1, VR256:$src2, VR256:$src3)>;
 272 def : Pat<(int_x86_fma4_vfmsub_pd_256 VR256:$src1, VR256:$src2,
 273                                   (memopv4f64 addr:$src3)),
 274           (VFMSUBPD4rmY VR256:$src1, VR256:$src2, addr:$src3)>;
 275 def : Pat<(int_x86_fma4_vfmsub_pd_256 VR256:$src1, (memopv4f64 addr:$src2),
 276                                       VR256:$src3),
 277           (VFMSUBPD4mrY VR256:$src1, addr:$src2, VR256:$src3)>;
 278
 279 // VFNMADD
 280 def : Pat<(int_x86_fma4_vfnmadd_ss VR128:$src1, VR128:$src2, VR128:$src3),
 281           (VFNMADDSS4rr VR128:$src1, VR128:$src2, VR128:$src3)>;
 282 def : Pat<(int_x86_fma4_vfnmadd_ss VR128:$src1, VR128:$src2, sse_load_f32:$src3),
 283           (VFNMADDSS4rm VR128:$src1, VR128:$src2, sse_load_f32:$src3)>;
 284 def : Pat<(int_x86_fma4_vfnmadd_ss VR128:$src1, sse_load_f32:$src2, VR128:$src3),
 285           (VFNMADDSS4mr VR128:$src1, sse_load_f32:$src2, VR128:$src3)>;
 286
 287 def : Pat<(int_x86_fma4_vfnmadd_sd VR128:$src1, VR128:$src2, VR128:$src3),
 288           (VFNMADDSD4rr VR128:$src1, VR128:$src2, VR128:$src3)>;
 289 def : Pat<(int_x86_fma4_vfnmadd_sd VR128:$src1, VR128:$src2, sse_load_f64:$src3),
 290           (VFNMADDSD4rm VR128:$src1, VR128:$src2, sse_load_f64:$src3)>;
 291 def : Pat<(int_x86_fma4_vfnmadd_sd VR128:$src1, sse_load_f64:$src2, VR128:$src3),
 292           (VFNMADDSD4mr VR128:$src1, sse_load_f64:$src2, VR128:$src3)>;
 293
 294 def : Pat<(int_x86_fma4_vfnmadd_ps VR128:$src1, VR128:$src2, VR128:$src3),
 295           (VFNMADDPS4rr VR128:$src1, VR128:$src2, VR128:$src3)>;
 296 def : Pat<(int_x86_fma4_vfnmadd_ps VR128:$src1, VR128:$src2,
 297                                   (memopv4f32 addr:$src3)),
 298           (VFNMADDPS4rm VR128:$src1, VR128:$src2, addr:$src3)>;
 299 def : Pat<(int_x86_fma4_vfnmadd_ps VR128:$src1, (memopv4f32 addr:$src2),
 300                                   VR128:$src3),
 301           (VFNMADDPS4mr VR128:$src1, addr:$src2, VR128:$src3)>;
 302
 303 def : Pat<(int_x86_fma4_vfnmadd_pd VR128:$src1, VR128:$src2, VR128:$src3),
 304           (VFNMADDPD4rr VR128:$src1, VR128:$src2, VR128:$src3)>;
 305 def : Pat<(int_x86_fma4_vfnmadd_pd VR128:$src1, VR128:$src2,
 306                                   (memopv2f64 addr:$src3)),
 307           (VFNMADDPD4rm VR128:$src1, VR128:$src2, addr:$src3)>;
 308 def : Pat<(int_x86_fma4_vfnmadd_pd VR128:$src1, (memopv2f64 addr:$src2),
 309                                   VR128:$src3),
 310           (VFNMADDPD4mr VR128:$src1, addr:$src2, VR128:$src3)>;
 311
 312 def : Pat<(int_x86_fma4_vfnmadd_ps_256 VR256:$src1, VR256:$src2, VR256:$src3),
 313           (VFNMADDPS4rrY VR256:$src1, VR256:$src2, VR256:$src3)>;
 314 def : Pat<(int_x86_fma4_vfnmadd_ps_256 VR256:$src1, VR256:$src2,
 315                                   (memopv8f32 addr:$src3)),
 316           (VFNMADDPS4rmY VR256:$src1, VR256:$src2, addr:$src3)>;
 317 def : Pat<(int_x86_fma4_vfnmadd_ps_256 VR256:$src1, (memopv8f32 addr:$src2),
 318                                       VR256:$src3),
 319           (VFNMADDPS4mrY VR256:$src1, addr:$src2, VR256:$src3)>;
 320
 321 def : Pat<(int_x86_fma4_vfnmadd_pd_256 VR256:$src1, VR256:$src2, VR256:$src3),
 322           (VFNMADDPD4rrY VR256:$src1, VR256:$src2, VR256:$src3)>;
 323 def : Pat<(int_x86_fma4_vfnmadd_pd_256 VR256:$src1, VR256:$src2,
 324                                   (memopv4f64 addr:$src3)),
 325           (VFNMADDPD4rmY VR256:$src1, VR256:$src2, addr:$src3)>;
 326 def : Pat<(int_x86_fma4_vfnmadd_pd_256 VR256:$src1, (memopv4f64 addr:$src2),
 327                                       VR256:$src3),
 328           (VFNMADDPD4mrY VR256:$src1, addr:$src2, VR256:$src3)>;
 329
 330 // VFNMSUB
 331 def : Pat<(int_x86_fma4_vfnmsub_ss VR128:$src1, VR128:$src2, VR128:$src3),
 332           (VFNMSUBSS4rr VR128:$src1, VR128:$src2, VR128:$src3)>;
 333 def : Pat<(int_x86_fma4_vfnmsub_ss VR128:$src1, VR128:$src2, sse_load_f32:$src3),
 334           (VFNMSUBSS4rm VR128:$src1, VR128:$src2, sse_load_f32:$src3)>;
 335 def : Pat<(int_x86_fma4_vfnmsub_ss VR128:$src1, sse_load_f32:$src2, VR128:$src3),
 336           (VFNMSUBSS4mr VR128:$src1, sse_load_f32:$src2, VR128:$src3)>;
 337
 338 def : Pat<(int_x86_fma4_vfnmsub_sd VR128:$src1, VR128:$src2, VR128:$src3),
 339           (VFNMSUBSD4rr VR128:$src1, VR128:$src2, VR128:$src3)>;
 340 def : Pat<(int_x86_fma4_vfnmsub_sd VR128:$src1, VR128:$src2, sse_load_f64:$src3),
 341           (VFNMSUBSD4rm VR128:$src1, VR128:$src2, sse_load_f64:$src3)>;
 342 def : Pat<(int_x86_fma4_vfnmsub_sd VR128:$src1, sse_load_f64:$src2, VR128:$src3),
 343           (VFNMSUBSD4mr VR128:$src1, sse_load_f64:$src2, VR128:$src3)>;
 344
 345 def : Pat<(int_x86_fma4_vfnmsub_ps VR128:$src1, VR128:$src2, VR128:$src3),
 346           (VFNMSUBPS4rr VR128:$src1, VR128:$src2, VR128:$src3)>;
 347 def : Pat<(int_x86_fma4_vfnmsub_ps VR128:$src1, VR128:$src2,
 348                                   (memopv4f32 addr:$src3)),
 349           (VFNMSUBPS4rm VR128:$src1, VR128:$src2, addr:$src3)>;
 350 def : Pat<(int_x86_fma4_vfnmsub_ps VR128:$src1, (memopv4f32 addr:$src2),
 351                                   VR128:$src3),
 352           (VFNMSUBPS4mr VR128:$src1, addr:$src2, VR128:$src3)>;
 353
 354 def : Pat<(int_x86_fma4_vfnmsub_pd VR128:$src1, VR128:$src2, VR128:$src3),
 355           (VFNMSUBPD4rr VR128:$src1, VR128:$src2, VR128:$src3)>;
 356 def : Pat<(int_x86_fma4_vfnmsub_pd VR128:$src1, VR128:$src2,
 357                                   (memopv2f64 addr:$src3)),
 358           (VFNMSUBPD4rm VR128:$src1, VR128:$src2, addr:$src3)>;
 359 def : Pat<(int_x86_fma4_vfnmsub_pd VR128:$src1, (memopv2f64 addr:$src2),
 360                                   VR128:$src3),
 361           (VFNMSUBPD4mr VR128:$src1, addr:$src2, VR128:$src3)>;
 362
 363 def : Pat<(int_x86_fma4_vfnmsub_ps_256 VR256:$src1, VR256:$src2, VR256:$src3),
 364           (VFNMSUBPS4rrY VR256:$src1, VR256:$src2, VR256:$src3)>;
 365 def : Pat<(int_x86_fma4_vfnmsub_ps_256 VR256:$src1, VR256:$src2,
 366                                   (memopv8f32 addr:$src3)),
 367           (VFNMSUBPS4rmY VR256:$src1, VR256:$src2, addr:$src3)>;
 368 def : Pat<(int_x86_fma4_vfnmsub_ps_256 VR256:$src1,
 369                                       (memopv8f32 addr:$src2),
 370                                       VR256:$src3),
 371           (VFNMSUBPS4mrY VR256:$src1, addr:$src2, VR256:$src3)>;
 372
 373 def : Pat<(int_x86_fma4_vfnmsub_pd_256 VR256:$src1, VR256:$src2, VR256:$src3),
 374           (VFNMSUBPD4rrY VR256:$src1, VR256:$src2, VR256:$src3)>;
 375 def : Pat<(int_x86_fma4_vfnmsub_pd_256 VR256:$src1, VR256:$src2,
 376                                   (memopv4f64 addr:$src3)),
 377           (VFNMSUBPD4rmY VR256:$src1, VR256:$src2, addr:$src3)>;
 378 def : Pat<(int_x86_fma4_vfnmsub_pd_256 VR256:$src1,
 379                                       (memopv4f64 addr:$src2),
 380                                       VR256:$src3),
 381           (VFNMSUBPD4mrY VR256:$src1, addr:$src2, VR256:$src3)>;
 382
 383 // VFMADDSUB
 384 def : Pat<(int_x86_fma4_vfmaddsub_ps VR128:$src1, VR128:$src2, VR128:$src3),
 385           (VFMADDSUBPS4rr VR128:$src1, VR128:$src2, VR128:$src3)>;
 386 def : Pat<(int_x86_fma4_vfmaddsub_ps VR128:$src1, VR128:$src2,
 387                                   (memopv4f32 addr:$src3)),
 388           (VFMADDSUBPS4rm VR128:$src1, VR128:$src2, addr:$src3)>;
 389 def : Pat<(int_x86_fma4_vfmaddsub_ps VR128:$src1, (memopv4f32 addr:$src2),
 390                                   VR128:$src3),
 391           (VFMADDSUBPS4mr VR128:$src1, addr:$src2, VR128:$src3)>;
 392
 393 def : Pat<(int_x86_fma4_vfmaddsub_pd VR128:$src1, VR128:$src2, VR128:$src3),
 394           (VFMADDSUBPD4rr VR128:$src1, VR128:$src2, VR128:$src3)>;
 395 def : Pat<(int_x86_fma4_vfmaddsub_pd VR128:$src1, VR128:$src2,
 396                                   (memopv2f64 addr:$src3)),
 397           (VFMADDSUBPD4rm VR128:$src1, VR128:$src2, addr:$src3)>;
 398 def : Pat<(int_x86_fma4_vfmaddsub_pd VR128:$src1, (memopv2f64 addr:$src2),
 399                                   VR128:$src3),
 400           (VFMADDSUBPD4mr VR128:$src1, addr:$src2, VR128:$src3)>;
 401
 402 def : Pat<(int_x86_fma4_vfmaddsub_ps_256 VR256:$src1, VR256:$src2, VR256:$src3),
 403           (VFMADDSUBPS4rrY VR256:$src1, VR256:$src2, VR256:$src3)>;
 404 def : Pat<(int_x86_fma4_vfmaddsub_ps_256 VR256:$src1, VR256:$src2,
 405                                   (memopv8f32 addr:$src3)),
 406           (VFMADDSUBPS4rmY VR256:$src1, VR256:$src2, addr:$src3)>;
 407 def : Pat<(int_x86_fma4_vfmaddsub_ps_256 VR256:$src1, (memopv8f32 addr:$src2),
 408                                       VR256:$src3),
 409           (VFMADDSUBPS4mrY VR256:$src1, addr:$src2, VR256:$src3)>;
 410
 411 def : Pat<(int_x86_fma4_vfmaddsub_pd_256 VR256:$src1, VR256:$src2, VR256:$src3),
 412           (VFMADDSUBPD4rrY VR256:$src1, VR256:$src2, VR256:$src3)>;
 413 def : Pat<(int_x86_fma4_vfmaddsub_pd_256 VR256:$src1, VR256:$src2,
 414                                   (memopv4f64 addr:$src3)),
 415           (VFMADDSUBPD4rmY VR256:$src1, VR256:$src2, addr:$src3)>;
 416 def : Pat<(int_x86_fma4_vfmaddsub_pd_256 VR256:$src1, (memopv4f64 addr:$src2),
 417                                       VR256:$src3),
 418           (VFMADDSUBPD4mrY VR256:$src1, addr:$src2, VR256:$src3)>;
 419
 420 // VFMSUBADD
 421 def : Pat<(int_x86_fma4_vfmsubadd_ps VR128:$src1, VR128:$src2, VR128:$src3),
 422           (VFMSUBADDPS4rr VR128:$src1, VR128:$src2, VR128:$src3)>;
 423 def : Pat<(int_x86_fma4_vfmsubadd_ps VR128:$src1, VR128:$src2,
 424                                   (memopv4f32 addr:$src3)),
 425           (VFMSUBADDPS4rm VR128:$src1, VR128:$src2, addr:$src3)>;
 426 def : Pat<(int_x86_fma4_vfmsubadd_ps VR128:$src1, (memopv4f32 addr:$src2),
 427                                   VR128:$src3),
 428           (VFMSUBADDPS4mr VR128:$src1, addr:$src2, VR128:$src3)>;
 429
 430 def : Pat<(int_x86_fma4_vfmsubadd_pd VR128:$src1, VR128:$src2, VR128:$src3),
 431           (VFMSUBADDPD4rr VR128:$src1, VR128:$src2, VR128:$src3)>;
 432 def : Pat<(int_x86_fma4_vfmsubadd_pd VR128:$src1, VR128:$src2,
 433                                   (memopv2f64 addr:$src3)),
 434           (VFMSUBADDPD4rm VR128:$src1, VR128:$src2, addr:$src3)>;
 435 def : Pat<(int_x86_fma4_vfmsubadd_pd VR128:$src1, (memopv2f64 addr:$src2),
 436                                   VR128:$src3),
 437           (VFMSUBADDPD4mr VR128:$src1, addr:$src2, VR128:$src3)>;
 438
 439 def : Pat<(int_x86_fma4_vfmsubadd_ps_256 VR256:$src1, VR256:$src2, VR256:$src3),
 440           (VFMSUBADDPS4rrY VR256:$src1, VR256:$src2, VR256:$src3)>;
 441 def : Pat<(int_x86_fma4_vfmsubadd_ps_256 VR256:$src1, VR256:$src2,
 442                                   (memopv8f32 addr:$src3)),
 443           (VFMSUBADDPS4rmY VR256:$src1, VR256:$src2, addr:$src3)>;
 444 def : Pat<(int_x86_fma4_vfmsubadd_ps_256 VR256:$src1, (memopv8f32 addr:$src2),
 445                                       VR256:$src3),
 446           (VFMSUBADDPS4mrY VR256:$src1, addr:$src2, VR256:$src3)>;
 447
 448 def : Pat<(int_x86_fma4_vfmsubadd_pd_256 VR256:$src1, VR256:$src2, VR256:$src3),
 449           (VFMSUBADDPD4rrY VR256:$src1, VR256:$src2, VR256:$src3)>;
 450 def : Pat<(int_x86_fma4_vfmsubadd_pd_256 VR256:$src1, VR256:$src2,
 451                                   (memopv4f64 addr:$src3)),
 452           (VFMSUBADDPD4rmY VR256:$src1, VR256:$src2, addr:$src3)>;
 453 def : Pat<(int_x86_fma4_vfmsubadd_pd_256 VR256:$src1, (memopv4f64 addr:$src2),
 454                                       VR256:$src3),
 455           (VFMSUBADDPD4mrY VR256:$src1, addr:$src2, VR256:$src3)>;