1 //===-- X86MCInstLower.cpp - Convert X86 MachineInstr to an MCInst --------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains code to lower X86 MachineInstrs to their corresponding
13 //===----------------------------------------------------------------------===//
15 #include "X86MCInstLower.h"
16 #include "X86AsmPrinter.h"
17 #include "X86COFFMachineModuleInfo.h"
18 #include "X86MCAsmInfo.h"
19 #include "X86MCTargetExpr.h"
20 #include "llvm/Analysis/DebugInfo.h"
21 #include "llvm/CodeGen/MachineModuleInfoImpls.h"
22 #include "llvm/MC/MCContext.h"
23 #include "llvm/MC/MCExpr.h"
24 #include "llvm/MC/MCInst.h"
25 #include "llvm/MC/MCStreamer.h"
26 #include "llvm/Target/Mangler.h"
27 #include "llvm/Support/FormattedStream.h"
28 #include "llvm/ADT/SmallString.h"
29 #include "llvm/Type.h"
33 const X86Subtarget &X86MCInstLower::getSubtarget() const {
34 return AsmPrinter.getSubtarget();
37 MachineModuleInfoMachO &X86MCInstLower::getMachOMMI() const {
38 assert(getSubtarget().isTargetDarwin() &&"Can only get MachO info on darwin");
39 return AsmPrinter.MMI->getObjFileInfo<MachineModuleInfoMachO>();
43 MCSymbol *X86MCInstLower::GetPICBaseSymbol() const {
44 const TargetLowering *TLI = AsmPrinter.TM.getTargetLowering();
45 return static_cast<const X86TargetLowering*>(TLI)->
46 getPICBaseSymbol(AsmPrinter.MF, Ctx);
49 /// GetSymbolFromOperand - Lower an MO_GlobalAddress or MO_ExternalSymbol
50 /// operand to an MCSymbol.
51 MCSymbol *X86MCInstLower::
52 GetSymbolFromOperand(const MachineOperand &MO) const {
53 assert((MO.isGlobal() || MO.isSymbol()) && "Isn't a symbol reference");
55 SmallString<128> Name;
58 bool isImplicitlyPrivate = false;
59 if (MO.getTargetFlags() == X86II::MO_DARWIN_STUB ||
60 MO.getTargetFlags() == X86II::MO_DARWIN_NONLAZY ||
61 MO.getTargetFlags() == X86II::MO_DARWIN_NONLAZY_PIC_BASE ||
62 MO.getTargetFlags() == X86II::MO_DARWIN_HIDDEN_NONLAZY_PIC_BASE)
63 isImplicitlyPrivate = true;
65 const GlobalValue *GV = MO.getGlobal();
66 Mang->getNameWithPrefix(Name, GV, isImplicitlyPrivate);
68 if (getSubtarget().isTargetCygMing()) {
69 X86COFFMachineModuleInfo &COFFMMI =
70 AsmPrinter.MMI->getObjFileInfo<X86COFFMachineModuleInfo>();
71 COFFMMI.DecorateCygMingName(Name, GV, *AsmPrinter.TM.getTargetData());
74 assert(MO.isSymbol());
75 Name += AsmPrinter.MAI->getGlobalPrefix();
76 Name += MO.getSymbolName();
79 // If the target flags on the operand changes the name of the symbol, do that
80 // before we return the symbol.
81 switch (MO.getTargetFlags()) {
83 case X86II::MO_DLLIMPORT: {
84 // Handle dllimport linkage.
85 const char *Prefix = "__imp_";
86 Name.insert(Name.begin(), Prefix, Prefix+strlen(Prefix));
89 case X86II::MO_DARWIN_NONLAZY:
90 case X86II::MO_DARWIN_NONLAZY_PIC_BASE: {
91 Name += "$non_lazy_ptr";
92 MCSymbol *Sym = Ctx.GetOrCreateSymbol(Name.str());
94 MCSymbol *&StubSym = getMachOMMI().getGVStubEntry(Sym);
96 assert(MO.isGlobal() && "Extern symbol not handled yet");
97 StubSym = AsmPrinter.GetGlobalValueSymbol(MO.getGlobal());
101 case X86II::MO_DARWIN_HIDDEN_NONLAZY_PIC_BASE: {
102 Name += "$non_lazy_ptr";
103 MCSymbol *Sym = Ctx.GetOrCreateSymbol(Name.str());
104 MCSymbol *&StubSym = getMachOMMI().getHiddenGVStubEntry(Sym);
106 assert(MO.isGlobal() && "Extern symbol not handled yet");
107 StubSym = AsmPrinter.GetGlobalValueSymbol(MO.getGlobal());
111 case X86II::MO_DARWIN_STUB: {
113 MCSymbol *Sym = Ctx.GetOrCreateSymbol(Name.str());
114 MCSymbol *&StubSym = getMachOMMI().getFnStubEntry(Sym);
119 StubSym = AsmPrinter.GetGlobalValueSymbol(MO.getGlobal());
121 Name.erase(Name.end()-5, Name.end());
122 StubSym = Ctx.GetOrCreateSymbol(Name.str());
128 return Ctx.GetOrCreateSymbol(Name.str());
131 MCOperand X86MCInstLower::LowerSymbolOperand(const MachineOperand &MO,
132 MCSymbol *Sym) const {
133 // FIXME: We would like an efficient form for this, so we don't have to do a
134 // lot of extra uniquing.
135 const MCExpr *Expr = 0;
136 X86MCTargetExpr::VariantKind RefKind = X86MCTargetExpr::Invalid;
138 switch (MO.getTargetFlags()) {
139 default: llvm_unreachable("Unknown target flag on GV operand");
140 case X86II::MO_NO_FLAG: // No flag.
141 // These affect the name of the symbol, not any suffix.
142 case X86II::MO_DARWIN_NONLAZY:
143 case X86II::MO_DLLIMPORT:
144 case X86II::MO_DARWIN_STUB:
147 case X86II::MO_TLSGD: RefKind = X86MCTargetExpr::TLSGD; break;
148 case X86II::MO_GOTTPOFF: RefKind = X86MCTargetExpr::GOTTPOFF; break;
149 case X86II::MO_INDNTPOFF: RefKind = X86MCTargetExpr::INDNTPOFF; break;
150 case X86II::MO_TPOFF: RefKind = X86MCTargetExpr::TPOFF; break;
151 case X86II::MO_NTPOFF: RefKind = X86MCTargetExpr::NTPOFF; break;
152 case X86II::MO_GOTPCREL: RefKind = X86MCTargetExpr::GOTPCREL; break;
153 case X86II::MO_GOT: RefKind = X86MCTargetExpr::GOT; break;
154 case X86II::MO_GOTOFF: RefKind = X86MCTargetExpr::GOTOFF; break;
155 case X86II::MO_PLT: RefKind = X86MCTargetExpr::PLT; break;
156 case X86II::MO_PIC_BASE_OFFSET:
157 case X86II::MO_DARWIN_NONLAZY_PIC_BASE:
158 case X86II::MO_DARWIN_HIDDEN_NONLAZY_PIC_BASE:
159 Expr = MCSymbolRefExpr::Create(Sym, Ctx);
160 // Subtract the pic base.
161 Expr = MCBinaryExpr::CreateSub(Expr,
162 MCSymbolRefExpr::Create(GetPICBaseSymbol(), Ctx),
168 if (RefKind == X86MCTargetExpr::Invalid)
169 Expr = MCSymbolRefExpr::Create(Sym, Ctx);
171 Expr = X86MCTargetExpr::Create(Sym, RefKind, Ctx);
174 if (!MO.isJTI() && MO.getOffset())
175 Expr = MCBinaryExpr::CreateAdd(Expr,
176 MCConstantExpr::Create(MO.getOffset(), Ctx),
178 return MCOperand::CreateExpr(Expr);
183 static void lower_subreg32(MCInst *MI, unsigned OpNo) {
184 // Convert registers in the addr mode according to subreg32.
185 unsigned Reg = MI->getOperand(OpNo).getReg();
187 MI->getOperand(OpNo).setReg(getX86SubSuperRegister(Reg, MVT::i32));
190 static void lower_lea64_32mem(MCInst *MI, unsigned OpNo) {
191 // Convert registers in the addr mode according to subreg64.
192 for (unsigned i = 0; i != 4; ++i) {
193 if (!MI->getOperand(OpNo+i).isReg()) continue;
195 unsigned Reg = MI->getOperand(OpNo+i).getReg();
196 if (Reg == 0) continue;
198 MI->getOperand(OpNo+i).setReg(getX86SubSuperRegister(Reg, MVT::i64));
202 /// LowerSubReg32_Op0 - Things like MOVZX16rr8 -> MOVZX32rr8.
203 static void LowerSubReg32_Op0(MCInst &OutMI, unsigned NewOpc) {
204 OutMI.setOpcode(NewOpc);
205 lower_subreg32(&OutMI, 0);
207 /// LowerUnaryToTwoAddr - R = setb -> R = sbb R, R
208 static void LowerUnaryToTwoAddr(MCInst &OutMI, unsigned NewOpc) {
209 OutMI.setOpcode(NewOpc);
210 OutMI.addOperand(OutMI.getOperand(0));
211 OutMI.addOperand(OutMI.getOperand(0));
215 void X86MCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const {
216 OutMI.setOpcode(MI->getOpcode());
218 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
219 const MachineOperand &MO = MI->getOperand(i);
222 switch (MO.getType()) {
225 llvm_unreachable("unknown operand type");
226 case MachineOperand::MO_Register:
227 // Ignore all implicit register operands.
228 if (MO.isImplicit()) continue;
229 MCOp = MCOperand::CreateReg(MO.getReg());
231 case MachineOperand::MO_Immediate:
232 MCOp = MCOperand::CreateImm(MO.getImm());
234 case MachineOperand::MO_MachineBasicBlock:
235 MCOp = MCOperand::CreateExpr(MCSymbolRefExpr::Create(
236 MO.getMBB()->getSymbol(Ctx), Ctx));
238 case MachineOperand::MO_GlobalAddress:
239 MCOp = LowerSymbolOperand(MO, GetSymbolFromOperand(MO));
241 case MachineOperand::MO_ExternalSymbol:
242 MCOp = LowerSymbolOperand(MO, GetSymbolFromOperand(MO));
244 case MachineOperand::MO_JumpTableIndex:
245 MCOp = LowerSymbolOperand(MO, AsmPrinter.GetJTISymbol(MO.getIndex()));
247 case MachineOperand::MO_ConstantPoolIndex:
248 MCOp = LowerSymbolOperand(MO, AsmPrinter.GetCPISymbol(MO.getIndex()));
250 case MachineOperand::MO_BlockAddress:
251 MCOp = LowerSymbolOperand(MO,
252 AsmPrinter.GetBlockAddressSymbol(MO.getBlockAddress()));
256 OutMI.addOperand(MCOp);
259 // Handle a few special cases to eliminate operand modifiers.
260 switch (OutMI.getOpcode()) {
261 case X86::LEA64_32r: // Handle 'subreg rewriting' for the lea64_32mem operand.
262 lower_lea64_32mem(&OutMI, 1);
264 case X86::MOVZX16rr8: LowerSubReg32_Op0(OutMI, X86::MOVZX32rr8); break;
265 case X86::MOVZX16rm8: LowerSubReg32_Op0(OutMI, X86::MOVZX32rm8); break;
266 case X86::MOVSX16rr8: LowerSubReg32_Op0(OutMI, X86::MOVSX32rr8); break;
267 case X86::MOVSX16rm8: LowerSubReg32_Op0(OutMI, X86::MOVSX32rm8); break;
268 case X86::MOVZX64rr32: LowerSubReg32_Op0(OutMI, X86::MOV32rr); break;
269 case X86::MOVZX64rm32: LowerSubReg32_Op0(OutMI, X86::MOV32rm); break;
270 case X86::MOV64ri64i32: LowerSubReg32_Op0(OutMI, X86::MOV32ri); break;
271 case X86::MOVZX64rr8: LowerSubReg32_Op0(OutMI, X86::MOVZX32rr8); break;
272 case X86::MOVZX64rm8: LowerSubReg32_Op0(OutMI, X86::MOVZX32rm8); break;
273 case X86::MOVZX64rr16: LowerSubReg32_Op0(OutMI, X86::MOVZX32rr16); break;
274 case X86::MOVZX64rm16: LowerSubReg32_Op0(OutMI, X86::MOVZX32rm16); break;
275 case X86::SETB_C8r: LowerUnaryToTwoAddr(OutMI, X86::SBB8rr); break;
276 case X86::SETB_C16r: LowerUnaryToTwoAddr(OutMI, X86::SBB16rr); break;
277 case X86::SETB_C32r: LowerUnaryToTwoAddr(OutMI, X86::SBB32rr); break;
278 case X86::SETB_C64r: LowerUnaryToTwoAddr(OutMI, X86::SBB64rr); break;
279 case X86::MOV8r0: LowerUnaryToTwoAddr(OutMI, X86::XOR8rr); break;
280 case X86::MOV32r0: LowerUnaryToTwoAddr(OutMI, X86::XOR32rr); break;
281 case X86::MMX_V_SET0: LowerUnaryToTwoAddr(OutMI, X86::MMX_PXORrr); break;
282 case X86::MMX_V_SETALLONES:
283 LowerUnaryToTwoAddr(OutMI, X86::MMX_PCMPEQDrr); break;
284 case X86::FsFLD0SS: LowerUnaryToTwoAddr(OutMI, X86::PXORrr); break;
285 case X86::FsFLD0SD: LowerUnaryToTwoAddr(OutMI, X86::PXORrr); break;
286 case X86::V_SET0: LowerUnaryToTwoAddr(OutMI, X86::XORPSrr); break;
287 case X86::V_SETALLONES: LowerUnaryToTwoAddr(OutMI, X86::PCMPEQDrr); break;
290 LowerSubReg32_Op0(OutMI, X86::MOV32r0); // MOV16r0 -> MOV32r0
291 LowerUnaryToTwoAddr(OutMI, X86::XOR32rr); // MOV32r0 -> XOR32rr
294 LowerSubReg32_Op0(OutMI, X86::MOV32r0); // MOV64r0 -> MOV32r0
295 LowerUnaryToTwoAddr(OutMI, X86::XOR32rr); // MOV32r0 -> XOR32rr
302 void X86AsmPrinter::EmitInstruction(const MachineInstr *MI) {
303 X86MCInstLower MCInstLowering(OutContext, Mang, *this);
304 switch (MI->getOpcode()) {
305 case TargetOpcode::DBG_VALUE: {
306 // FIXME: if this is implemented for another target before it goes
307 // away completely, the common part should be moved into AsmPrinter.
310 O << '\t' << MAI->getCommentString() << "DEBUG_VALUE: ";
311 unsigned NOps = MI->getNumOperands();
312 // cast away const; DIetc do not take const operands for some reason.
313 DIVariable V((MDNode*)(MI->getOperand(NOps-1).getMetadata()));
317 // Register or immediate value. Register 0 means undef.
318 assert(MI->getOperand(0).getType()==MachineOperand::MO_Register ||
319 MI->getOperand(0).getType()==MachineOperand::MO_Immediate ||
320 MI->getOperand(0).getType()==MachineOperand::MO_FPImmediate);
321 if (MI->getOperand(0).getType()==MachineOperand::MO_Register &&
322 MI->getOperand(0).getReg()==0) {
323 // Suppress offset in this case, it is not meaningful.
326 } else if (MI->getOperand(0).getType()==MachineOperand::MO_FPImmediate) {
327 // This is more naturally done in printOperand, but since the only use
328 // of such an operand is in this comment and that is temporary (and it's
329 // ugly), we prefer to keep this localized.
330 // The include of Type.h may be removable when this code is.
331 if (MI->getOperand(0).getFPImm()->getType()->isFloatTy() ||
332 MI->getOperand(0).getFPImm()->getType()->isDoubleTy())
333 MI->getOperand(0).print(O, &TM);
335 // There is no good way to print long double. Convert a copy to
336 // double. Ah well, it's only a comment.
338 APFloat APF = APFloat(MI->getOperand(0).getFPImm()->getValueAPF());
339 APF.convert(APFloat::IEEEdouble, APFloat::rmNearestTiesToEven,
341 O << "(long double) " << APF.convertToDouble();
346 // Frame address. Currently handles register +- offset only.
347 assert(MI->getOperand(0).getType()==MachineOperand::MO_Register);
348 assert(MI->getOperand(3).getType()==MachineOperand::MO_Immediate);
349 O << '['; printOperand(MI, 0); O << '+'; printOperand(MI, 3); O << ']';
352 printOperand(MI, NOps-2);
356 case X86::MOVPC32r: {
358 // This is a pseudo op for a two instruction sequence with a label, which
365 MCSymbol *PICBase = MCInstLowering.GetPICBaseSymbol();
366 TmpInst.setOpcode(X86::CALLpcrel32);
367 // FIXME: We would like an efficient form for this, so we don't have to do a
368 // lot of extra uniquing.
369 TmpInst.addOperand(MCOperand::CreateExpr(MCSymbolRefExpr::Create(PICBase,
371 OutStreamer.EmitInstruction(TmpInst);
374 OutStreamer.EmitLabel(PICBase);
377 TmpInst.setOpcode(X86::POP32r);
378 TmpInst.getOperand(0) = MCOperand::CreateReg(MI->getOperand(0).getReg());
379 OutStreamer.EmitInstruction(TmpInst);
384 // Lower the MO_GOT_ABSOLUTE_ADDRESS form of ADD32ri.
385 if (MI->getOperand(2).getTargetFlags() != X86II::MO_GOT_ABSOLUTE_ADDRESS)
388 // Okay, we have something like:
389 // EAX = ADD32ri EAX, MO_GOT_ABSOLUTE_ADDRESS(@MYGLOBAL)
391 // For this, we want to print something like:
392 // MYGLOBAL + (. - PICBASE)
393 // However, we can't generate a ".", so just emit a new label here and refer
394 // to it. We know that this operand flag occurs at most once per function.
395 const char *Prefix = MAI->getPrivateGlobalPrefix();
396 MCSymbol *DotSym = OutContext.GetOrCreateSymbol(Twine(Prefix)+"picbaseref"+
397 Twine(getFunctionNumber()));
398 OutStreamer.EmitLabel(DotSym);
400 // Now that we have emitted the label, lower the complex operand expression.
401 MCSymbol *OpSym = MCInstLowering.GetSymbolFromOperand(MI->getOperand(2));
403 const MCExpr *DotExpr = MCSymbolRefExpr::Create(DotSym, OutContext);
404 const MCExpr *PICBase =
405 MCSymbolRefExpr::Create(MCInstLowering.GetPICBaseSymbol(), OutContext);
406 DotExpr = MCBinaryExpr::CreateSub(DotExpr, PICBase, OutContext);
408 DotExpr = MCBinaryExpr::CreateAdd(MCSymbolRefExpr::Create(OpSym,OutContext),
409 DotExpr, OutContext);
412 TmpInst.setOpcode(X86::ADD32ri);
413 TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg()));
414 TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(1).getReg()));
415 TmpInst.addOperand(MCOperand::CreateExpr(DotExpr));
416 OutStreamer.EmitInstruction(TmpInst);
422 MCInstLowering.Lower(MI, TmpInst);
425 OutStreamer.EmitInstruction(TmpInst);