1 //===-- InstrSelectionSupport.cpp -----------------------------------------===//
3 // Target-independent instruction selection code. See SparcInstrSelection.cpp
6 //===----------------------------------------------------------------------===//
8 #include "llvm/CodeGen/InstrSelectionSupport.h"
9 #include "llvm/CodeGen/InstrSelection.h"
10 #include "llvm/CodeGen/MachineInstrAnnot.h"
11 #include "llvm/CodeGen/MachineCodeForInstruction.h"
12 #include "llvm/CodeGen/InstrForest.h"
13 #include "llvm/Target/TargetMachine.h"
14 #include "llvm/Target/TargetRegInfo.h"
15 #include "llvm/Target/TargetInstrInfo.h"
16 #include "llvm/Constants.h"
17 #include "llvm/BasicBlock.h"
18 #include "llvm/DerivedTypes.h"
19 #include "../../Target/Sparc/SparcInstrSelectionSupport.h" // FIXME!
22 // Generate code to load the constant into a TmpInstruction (virtual reg) and
23 // returns the virtual register.
25 static TmpInstruction*
26 InsertCodeToLoadConstant(Function *F,
29 std::vector<MachineInstr*>& loadConstVec,
30 TargetMachine& target)
32 // Create a tmp virtual register to hold the constant.
33 MachineCodeForInstruction &mcfi = MachineCodeForInstruction::get(vmInstr);
34 TmpInstruction* tmpReg = new TmpInstruction(mcfi, opValue);
36 target.getInstrInfo().CreateCodeToLoadConst(target, F, opValue, tmpReg,
39 // Record the mapping from the tmp VM instruction to machine instruction.
40 // Do this for all machine instructions that were not mapped to any
41 // other temp values created by
42 // tmpReg->addMachineInstruction(loadConstVec.back());
48 MachineOperand::MachineOperandType
49 ChooseRegOrImmed(int64_t intValue,
52 const TargetMachine& target,
54 unsigned int& getMachineRegNum,
55 int64_t& getImmedValue)
57 MachineOperand::MachineOperandType opType=MachineOperand::MO_VirtualRegister;
62 target.getInstrInfo().constantFitsInImmedField(opCode, intValue))
64 opType = isSigned? MachineOperand::MO_SignExtendedImmed
65 : MachineOperand::MO_UnextendedImmed;
66 getImmedValue = intValue;
68 else if (intValue == 0 && target.getRegInfo().getZeroRegNum() >= 0)
70 opType = MachineOperand::MO_MachineRegister;
71 getMachineRegNum = target.getRegInfo().getZeroRegNum();
78 MachineOperand::MachineOperandType
79 ChooseRegOrImmed(Value* val,
81 const TargetMachine& target,
83 unsigned int& getMachineRegNum,
84 int64_t& getImmedValue)
89 // To use reg or immed, constant needs to be integer, bool, or a NULL pointer
90 // TargetInstrInfo::ConvertConstantToIntType() does the right conversions:
93 target.getInstrInfo().ConvertConstantToIntType(target, val, val->getType(),
95 if (! isValidConstant)
96 return MachineOperand::MO_VirtualRegister;
98 // Now check if the constant value fits in the IMMED field.
100 return ChooseRegOrImmed((int64_t) valueToUse, val->getType()->isSigned(),
101 opCode, target, canUseImmed,
102 getMachineRegNum, getImmedValue);
105 //---------------------------------------------------------------------------
106 // Function: FixConstantOperandsForInstr
109 // Special handling for constant operands of a machine instruction
110 // -- if the constant is 0, use the hardwired 0 register, if any;
111 // -- if the constant fits in the IMMEDIATE field, use that field;
112 // -- else create instructions to put the constant into a register, either
113 // directly or by loading explicitly from the constant pool.
115 // In the first 2 cases, the operand of `minstr' is modified in place.
116 // Returns a vector of machine instructions generated for operands that
117 // fall under case 3; these must be inserted before `minstr'.
118 //---------------------------------------------------------------------------
120 std::vector<MachineInstr*>
121 FixConstantOperandsForInstr(Instruction* vmInstr,
122 MachineInstr* minstr,
123 TargetMachine& target)
125 std::vector<MachineInstr*> MVec;
127 MachineOpCode opCode = minstr->getOpCode();
128 const TargetInstrInfo& instrInfo = target.getInstrInfo();
129 int resultPos = instrInfo.getResultPos(opCode);
130 int immedPos = instrInfo.getImmedConstantPos(opCode);
132 Function *F = vmInstr->getParent()->getParent();
134 for (unsigned op=0; op < minstr->getNumOperands(); op++)
136 const MachineOperand& mop = minstr->getOperand(op);
138 // Skip the result position, preallocated machine registers, or operands
139 // that cannot be constants (CC regs or PC-relative displacements)
140 if (resultPos == (int)op ||
141 mop.getType() == MachineOperand::MO_MachineRegister ||
142 mop.getType() == MachineOperand::MO_CCRegister ||
143 mop.getType() == MachineOperand::MO_PCRelativeDisp)
146 bool constantThatMustBeLoaded = false;
147 unsigned int machineRegNum = 0;
148 int64_t immedValue = 0;
149 Value* opValue = NULL;
150 MachineOperand::MachineOperandType opType =
151 MachineOperand::MO_VirtualRegister;
153 // Operand may be a virtual register or a compile-time constant
154 if (mop.getType() == MachineOperand::MO_VirtualRegister)
156 assert(mop.getVRegValue() != NULL);
157 opValue = mop.getVRegValue();
158 if (Constant *opConst = dyn_cast<Constant>(opValue)) {
159 opType = ChooseRegOrImmed(opConst, opCode, target,
160 (immedPos == (int)op), machineRegNum,
162 if (opType == MachineOperand::MO_VirtualRegister)
163 constantThatMustBeLoaded = true;
168 assert(mop.isImmediate());
169 bool isSigned = mop.getType() == MachineOperand::MO_SignExtendedImmed;
171 // Bit-selection flags indicate an instruction that is extracting
172 // bits from its operand so ignore this even if it is a big constant.
173 if (mop.opHiBits32() || mop.opLoBits32() ||
174 mop.opHiBits64() || mop.opLoBits64())
177 opType = ChooseRegOrImmed(mop.getImmedValue(), isSigned,
178 opCode, target, (immedPos == (int)op),
179 machineRegNum, immedValue);
181 if (opType == MachineOperand::MO_SignExtendedImmed ||
182 opType == MachineOperand::MO_UnextendedImmed) {
183 // The optype is an immediate value
184 // This means we need to change the opcode, e.g. ADDr -> ADDi
185 unsigned newOpcode = convertOpcodeFromRegToImm(opCode);
186 minstr->setOpcode(newOpcode);
189 if (opType == mop.getType())
190 continue; // no change: this is the most common case
192 if (opType == MachineOperand::MO_VirtualRegister)
194 constantThatMustBeLoaded = true;
196 ? (Value*)ConstantSInt::get(Type::LongTy, immedValue)
197 : (Value*)ConstantUInt::get(Type::ULongTy,(uint64_t)immedValue);
201 if (opType == MachineOperand::MO_MachineRegister)
202 minstr->SetMachineOperandReg(op, machineRegNum);
203 else if (opType == MachineOperand::MO_SignExtendedImmed ||
204 opType == MachineOperand::MO_UnextendedImmed) {
205 minstr->SetMachineOperandConst(op, opType, immedValue);
206 // The optype is or has become an immediate
207 // This means we need to change the opcode, e.g. ADDr -> ADDi
208 unsigned newOpcode = convertOpcodeFromRegToImm(opCode);
209 minstr->setOpcode(newOpcode);
210 } else if (constantThatMustBeLoaded ||
211 (opValue && isa<GlobalValue>(opValue)))
212 { // opValue is a constant that must be explicitly loaded into a reg
214 TmpInstruction* tmpReg = InsertCodeToLoadConstant(F, opValue, vmInstr,
216 minstr->SetMachineOperandVal(op, MachineOperand::MO_VirtualRegister,
221 // Also, check for implicit operands used by the machine instruction
222 // (no need to check those defined since they cannot be constants).
224 // -- arguments to a Call
225 // -- return value of a Return
226 // Any such operand that is a constant value needs to be fixed also.
227 // The current instructions with implicit refs (viz., Call and Return)
228 // have no immediate fields, so the constant always needs to be loaded
231 bool isCall = instrInfo.isCall(opCode);
232 unsigned lastCallArgNum = 0; // unused if not a call
233 CallArgsDescriptor* argDesc = NULL; // unused if not a call
235 argDesc = CallArgsDescriptor::get(minstr);
237 for (unsigned i=0, N=minstr->getNumImplicitRefs(); i < N; ++i)
238 if (isa<Constant>(minstr->getImplicitRef(i)) ||
239 isa<GlobalValue>(minstr->getImplicitRef(i)))
241 Value* oldVal = minstr->getImplicitRef(i);
242 TmpInstruction* tmpReg =
243 InsertCodeToLoadConstant(F, oldVal, vmInstr, MVec, target);
244 minstr->setImplicitRef(i, tmpReg);
247 { // find and replace the argument in the CallArgsDescriptor
248 unsigned i=lastCallArgNum;
249 while (argDesc->getArgInfo(i).getArgVal() != oldVal)
251 assert(i < argDesc->getNumArgs() &&
252 "Constant operands to a call *must* be in the arg list");
254 argDesc->getArgInfo(i).replaceArgVal(tmpReg);