1 //===-- AMDILCFGStructurizer.cpp - CFG Structurizer -----------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
9 //==-----------------------------------------------------------------------===//
11 #define DEBUG_TYPE "structcfg"
14 #include "AMDGPUInstrInfo.h"
15 #include "R600InstrInfo.h"
16 #include "llvm/Support/Debug.h"
17 #include "llvm/Support/raw_ostream.h"
18 #include "llvm/ADT/SCCIterator.h"
19 #include "llvm/ADT/SmallVector.h"
20 #include "llvm/ADT/Statistic.h"
21 #include "llvm/ADT/DepthFirstIterator.h"
22 #include "llvm/Analysis/DominatorInternals.h"
23 #include "llvm/Analysis/Dominators.h"
24 #include "llvm/CodeGen/MachineDominators.h"
25 #include "llvm/CodeGen/MachineFunction.h"
26 #include "llvm/CodeGen/MachineFunctionAnalysis.h"
27 #include "llvm/CodeGen/MachineFunctionPass.h"
28 #include "llvm/CodeGen/MachineInstrBuilder.h"
29 #include "llvm/CodeGen/MachineJumpTableInfo.h"
30 #include "llvm/CodeGen/MachineLoopInfo.h"
31 #include "llvm/CodeGen/MachinePostDominators.h"
32 #include "llvm/CodeGen/MachineRegisterInfo.h"
33 #include "llvm/Target/TargetInstrInfo.h"
34 #include "llvm/Target/TargetMachine.h"
38 #define DEFAULT_VEC_SLOTS 8
42 //===----------------------------------------------------------------------===//
44 // Statistics for CFGStructurizer.
46 //===----------------------------------------------------------------------===//
48 STATISTIC(numSerialPatternMatch, "CFGStructurizer number of serial pattern "
50 STATISTIC(numIfPatternMatch, "CFGStructurizer number of if pattern "
52 STATISTIC(numLoopcontPatternMatch, "CFGStructurizer number of loop-continue "
54 STATISTIC(numClonedBlock, "CFGStructurizer cloned blocks");
55 STATISTIC(numClonedInstr, "CFGStructurizer cloned instructions");
58 void initializeAMDGPUCFGStructurizerPass(PassRegistry&);
61 //===----------------------------------------------------------------------===//
63 // Miscellaneous utility for CFGStructurizer.
65 //===----------------------------------------------------------------------===//
67 #define SHOWNEWINSTR(i) \
68 DEBUG(dbgs() << "New instr: " << *i << "\n");
70 #define SHOWNEWBLK(b, msg) \
72 dbgs() << msg << "BB" << b->getNumber() << "size " << b->size(); \
76 #define SHOWBLK_DETAIL(b, msg) \
79 dbgs() << msg << "BB" << b->getNumber() << "size " << b->size(); \
85 #define INVALIDSCCNUM -1
88 void ReverseVector(SmallVectorImpl<NodeT *> &Src) {
89 size_t sz = Src.size();
90 for (size_t i = 0; i < sz/2; ++i) {
92 Src[i] = Src[sz - i - 1];
97 } // end anonymous namespace
99 //===----------------------------------------------------------------------===//
101 // supporting data structure for CFGStructurizer
103 //===----------------------------------------------------------------------===//
108 class BlockInformation {
112 BlockInformation() : IsRetired(false), SccNum(INVALIDSCCNUM) {}
115 } // end anonymous namespace
117 //===----------------------------------------------------------------------===//
121 //===----------------------------------------------------------------------===//
124 class AMDGPUCFGStructurizer : public MachineFunctionPass {
126 typedef SmallVector<MachineBasicBlock *, 32> MBBVector;
127 typedef std::map<MachineBasicBlock *, BlockInformation *> MBBInfoMap;
128 typedef std::map<MachineLoop *, MachineBasicBlock *> LoopLandInfoMap;
132 SinglePath_InPath = 1,
133 SinglePath_NotInPath = 2
138 AMDGPUCFGStructurizer() :
139 MachineFunctionPass(ID), TII(NULL), TRI(NULL) {
140 initializeAMDGPUCFGStructurizerPass(*PassRegistry::getPassRegistry());
143 const char *getPassName() const {
144 return "AMDGPU Control Flow Graph structurizer Pass";
147 void getAnalysisUsage(AnalysisUsage &AU) const {
148 AU.addPreserved<MachineFunctionAnalysis>();
149 AU.addRequired<MachineFunctionAnalysis>();
150 AU.addRequired<MachineDominatorTree>();
151 AU.addRequired<MachinePostDominatorTree>();
152 AU.addRequired<MachineLoopInfo>();
155 /// Perform the CFG structurization
158 /// Perform the CFG preparation
159 /// This step will remove every unconditionnal/dead jump instructions and make
160 /// sure all loops have an exit block
163 bool runOnMachineFunction(MachineFunction &MF) {
164 TII = static_cast<const R600InstrInfo *>(MF.getTarget().getInstrInfo());
165 TRI = &TII->getRegisterInfo();
169 MLI = &getAnalysis<MachineLoopInfo>();
170 DEBUG(dbgs() << "LoopInfo:\n"; PrintLoopinfo(*MLI););
171 MDT = &getAnalysis<MachineDominatorTree>();
172 DEBUG(MDT->print(dbgs(), (const llvm::Module*)0););
173 PDT = &getAnalysis<MachinePostDominatorTree>();
174 DEBUG(PDT->print(dbgs()););
182 MachineDominatorTree *MDT;
183 MachinePostDominatorTree *PDT;
184 MachineLoopInfo *MLI;
185 const R600InstrInfo *TII;
186 const AMDGPURegisterInfo *TRI;
189 /// Print the ordered Blocks.
190 void printOrderedBlocks() const {
192 for (MBBVector::const_iterator iterBlk = OrderedBlks.begin(),
193 iterBlkEnd = OrderedBlks.end(); iterBlk != iterBlkEnd; ++iterBlk, ++i) {
194 dbgs() << "BB" << (*iterBlk)->getNumber();
195 dbgs() << "(" << getSCCNum(*iterBlk) << "," << (*iterBlk)->size() << ")";
196 if (i != 0 && i % 10 == 0) {
203 static void PrintLoopinfo(const MachineLoopInfo &LoopInfo) {
204 for (MachineLoop::iterator iter = LoopInfo.begin(),
205 iterEnd = LoopInfo.end(); iter != iterEnd; ++iter) {
206 (*iter)->print(dbgs(), 0);
211 int getSCCNum(MachineBasicBlock *MBB) const;
212 MachineBasicBlock *getLoopLandInfo(MachineLoop *LoopRep) const;
213 bool hasBackEdge(MachineBasicBlock *MBB) const;
214 static unsigned getLoopDepth(MachineLoop *LoopRep);
215 bool isRetiredBlock(MachineBasicBlock *MBB) const;
216 bool isActiveLoophead(MachineBasicBlock *MBB) const;
217 PathToKind singlePathTo(MachineBasicBlock *SrcMBB, MachineBasicBlock *DstMBB,
218 bool AllowSideEntry = true) const;
219 int countActiveBlock(MBBVector::const_iterator It,
220 MBBVector::const_iterator E) const;
221 bool needMigrateBlock(MachineBasicBlock *MBB) const;
224 void reversePredicateSetter(MachineBasicBlock::iterator I);
225 /// Compute the reversed DFS post order of Blocks
226 void orderBlocks(MachineFunction *MF);
228 // Function originaly from CFGStructTraits
229 void insertInstrEnd(MachineBasicBlock *MBB, int NewOpcode,
230 DebugLoc DL = DebugLoc());
231 MachineInstr *insertInstrBefore(MachineBasicBlock *MBB, int NewOpcode,
232 DebugLoc DL = DebugLoc());
233 MachineInstr *insertInstrBefore(MachineBasicBlock::iterator I, int NewOpcode);
234 void insertCondBranchBefore(MachineBasicBlock::iterator I, int NewOpcode,
236 void insertCondBranchBefore(MachineBasicBlock *MBB,
237 MachineBasicBlock::iterator I, int NewOpcode, int RegNum,
239 void insertCondBranchEnd(MachineBasicBlock *MBB, int NewOpcode, int RegNum);
240 static int getBranchNzeroOpcode(int OldOpcode);
241 static int getBranchZeroOpcode(int OldOpcode);
242 static int getContinueNzeroOpcode(int OldOpcode);
243 static int getContinueZeroOpcode(int OldOpcode);
244 static MachineBasicBlock *getTrueBranch(MachineInstr *MI);
245 static void setTrueBranch(MachineInstr *MI, MachineBasicBlock *MBB);
246 static MachineBasicBlock *getFalseBranch(MachineBasicBlock *MBB,
248 static bool isCondBranch(MachineInstr *MI);
249 static bool isUncondBranch(MachineInstr *MI);
250 static DebugLoc getLastDebugLocInBB(MachineBasicBlock *MBB);
251 static MachineInstr *getNormalBlockBranchInstr(MachineBasicBlock *MBB);
252 /// The correct naming for this is getPossibleLoopendBlockBranchInstr.
254 /// BB with backward-edge could have move instructions after the branch
255 /// instruction. Such move instruction "belong to" the loop backward-edge.
256 MachineInstr *getLoopendBlockBranchInstr(MachineBasicBlock *MBB);
257 static MachineInstr *getReturnInstr(MachineBasicBlock *MBB);
258 static MachineInstr *getContinueInstr(MachineBasicBlock *MBB);
259 static bool isReturnBlock(MachineBasicBlock *MBB);
260 static void cloneSuccessorList(MachineBasicBlock *DstMBB,
261 MachineBasicBlock *SrcMBB) ;
262 static MachineBasicBlock *clone(MachineBasicBlock *MBB);
263 /// MachineBasicBlock::ReplaceUsesOfBlockWith doesn't serve the purpose
264 /// because the AMDGPU instruction is not recognized as terminator fix this
265 /// and retire this routine
266 void replaceInstrUseOfBlockWith(MachineBasicBlock *SrcMBB,
267 MachineBasicBlock *OldMBB, MachineBasicBlock *NewBlk);
268 static void wrapup(MachineBasicBlock *MBB);
271 int patternMatch(MachineBasicBlock *MBB);
272 int patternMatchGroup(MachineBasicBlock *MBB);
273 int serialPatternMatch(MachineBasicBlock *MBB);
274 int ifPatternMatch(MachineBasicBlock *MBB);
275 int loopendPatternMatch();
276 int mergeLoop(MachineLoop *LoopRep);
277 int loopcontPatternMatch(MachineLoop *LoopRep, MachineBasicBlock *LoopHeader);
279 void handleLoopcontBlock(MachineBasicBlock *ContingMBB,
280 MachineLoop *ContingLoop, MachineBasicBlock *ContMBB,
281 MachineLoop *ContLoop);
282 /// return true iff src1Blk->succ_size() == 0 && src1Blk and src2Blk are in
283 /// the same loop with LoopLandInfo without explicitly keeping track of
284 /// loopContBlks and loopBreakBlks, this is a method to get the information.
285 bool isSameloopDetachedContbreak(MachineBasicBlock *Src1MBB,
286 MachineBasicBlock *Src2MBB);
287 int handleJumpintoIf(MachineBasicBlock *HeadMBB,
288 MachineBasicBlock *TrueMBB, MachineBasicBlock *FalseMBB);
289 int handleJumpintoIfImp(MachineBasicBlock *HeadMBB,
290 MachineBasicBlock *TrueMBB, MachineBasicBlock *FalseMBB);
291 int improveSimpleJumpintoIf(MachineBasicBlock *HeadMBB,
292 MachineBasicBlock *TrueMBB, MachineBasicBlock *FalseMBB,
293 MachineBasicBlock **LandMBBPtr);
294 void showImproveSimpleJumpintoIf(MachineBasicBlock *HeadMBB,
295 MachineBasicBlock *TrueMBB, MachineBasicBlock *FalseMBB,
296 MachineBasicBlock *LandMBB, bool Detail = false);
297 int cloneOnSideEntryTo(MachineBasicBlock *PreMBB,
298 MachineBasicBlock *SrcMBB, MachineBasicBlock *DstMBB);
299 void mergeSerialBlock(MachineBasicBlock *DstMBB,
300 MachineBasicBlock *SrcMBB);
302 void mergeIfthenelseBlock(MachineInstr *BranchMI,
303 MachineBasicBlock *MBB, MachineBasicBlock *TrueMBB,
304 MachineBasicBlock *FalseMBB, MachineBasicBlock *LandMBB);
305 void mergeLooplandBlock(MachineBasicBlock *DstMBB,
306 MachineBasicBlock *LandMBB);
307 void mergeLoopbreakBlock(MachineBasicBlock *ExitingMBB,
308 MachineBasicBlock *LandMBB);
309 void settleLoopcontBlock(MachineBasicBlock *ContingMBB,
310 MachineBasicBlock *ContMBB);
311 /// normalizeInfiniteLoopExit change
313 /// uncond_br LoopHeader
317 /// cond_br 1 LoopHeader dummyExit
318 /// and return the newly added dummy exit block
319 MachineBasicBlock *normalizeInfiniteLoopExit(MachineLoop *LoopRep);
320 void removeUnconditionalBranch(MachineBasicBlock *MBB);
321 /// Remove duplicate branches instructions in a block.
326 /// is transformed to
329 void removeRedundantConditionalBranch(MachineBasicBlock *MBB);
330 void addDummyExitBlock(SmallVectorImpl<MachineBasicBlock *> &RetMBB);
331 void removeSuccessor(MachineBasicBlock *MBB);
332 MachineBasicBlock *cloneBlockForPredecessor(MachineBasicBlock *MBB,
333 MachineBasicBlock *PredMBB);
334 void migrateInstruction(MachineBasicBlock *SrcMBB,
335 MachineBasicBlock *DstMBB, MachineBasicBlock::iterator I);
336 void recordSccnum(MachineBasicBlock *MBB, int SCCNum);
337 void retireBlock(MachineBasicBlock *MBB);
338 void setLoopLandBlock(MachineLoop *LoopRep, MachineBasicBlock *MBB = NULL);
340 MachineBasicBlock *findNearestCommonPostDom(std::set<MachineBasicBlock *>&);
341 /// This is work around solution for findNearestCommonDominator not avaiable
342 /// to post dom a proper fix should go to Dominators.h.
343 MachineBasicBlock *findNearestCommonPostDom(MachineBasicBlock *MBB1,
344 MachineBasicBlock *MBB2);
347 MBBInfoMap BlockInfoMap;
348 LoopLandInfoMap LLInfoMap;
349 std::map<MachineLoop *, bool> Visited;
350 MachineFunction *FuncRep;
351 SmallVector<MachineBasicBlock *, DEFAULT_VEC_SLOTS> OrderedBlks;
354 int AMDGPUCFGStructurizer::getSCCNum(MachineBasicBlock *MBB) const {
355 MBBInfoMap::const_iterator It = BlockInfoMap.find(MBB);
356 if (It == BlockInfoMap.end())
357 return INVALIDSCCNUM;
358 return (*It).second->SccNum;
361 MachineBasicBlock *AMDGPUCFGStructurizer::getLoopLandInfo(MachineLoop *LoopRep)
363 LoopLandInfoMap::const_iterator It = LLInfoMap.find(LoopRep);
364 if (It == LLInfoMap.end())
369 bool AMDGPUCFGStructurizer::hasBackEdge(MachineBasicBlock *MBB) const {
370 MachineLoop *LoopRep = MLI->getLoopFor(MBB);
373 MachineBasicBlock *LoopHeader = LoopRep->getHeader();
374 return MBB->isSuccessor(LoopHeader);
377 unsigned AMDGPUCFGStructurizer::getLoopDepth(MachineLoop *LoopRep) {
378 return LoopRep ? LoopRep->getLoopDepth() : 0;
381 bool AMDGPUCFGStructurizer::isRetiredBlock(MachineBasicBlock *MBB) const {
382 MBBInfoMap::const_iterator It = BlockInfoMap.find(MBB);
383 if (It == BlockInfoMap.end())
385 return (*It).second->IsRetired;
388 bool AMDGPUCFGStructurizer::isActiveLoophead(MachineBasicBlock *MBB) const {
389 MachineLoop *LoopRep = MLI->getLoopFor(MBB);
390 while (LoopRep && LoopRep->getHeader() == MBB) {
391 MachineBasicBlock *LoopLand = getLoopLandInfo(LoopRep);
394 if (!isRetiredBlock(LoopLand))
396 LoopRep = LoopRep->getParentLoop();
400 AMDGPUCFGStructurizer::PathToKind AMDGPUCFGStructurizer::singlePathTo(
401 MachineBasicBlock *SrcMBB, MachineBasicBlock *DstMBB,
402 bool AllowSideEntry) const {
404 if (SrcMBB == DstMBB)
405 return SinglePath_InPath;
406 while (SrcMBB && SrcMBB->succ_size() == 1) {
407 SrcMBB = *SrcMBB->succ_begin();
408 if (SrcMBB == DstMBB)
409 return SinglePath_InPath;
410 if (!AllowSideEntry && SrcMBB->pred_size() > 1)
411 return Not_SinglePath;
413 if (SrcMBB && SrcMBB->succ_size()==0)
414 return SinglePath_NotInPath;
415 return Not_SinglePath;
418 int AMDGPUCFGStructurizer::countActiveBlock(MBBVector::const_iterator It,
419 MBBVector::const_iterator E) const {
422 if (!isRetiredBlock(*It))
429 bool AMDGPUCFGStructurizer::needMigrateBlock(MachineBasicBlock *MBB) const {
430 unsigned BlockSizeThreshold = 30;
431 unsigned CloneInstrThreshold = 100;
432 bool MultiplePreds = MBB && (MBB->pred_size() > 1);
436 unsigned BlkSize = MBB->size();
437 return ((BlkSize > BlockSizeThreshold) &&
438 (BlkSize * (MBB->pred_size() - 1) > CloneInstrThreshold));
441 void AMDGPUCFGStructurizer::reversePredicateSetter(
442 MachineBasicBlock::iterator I) {
444 if (I->getOpcode() == AMDGPU::PRED_X) {
445 switch (static_cast<MachineInstr *>(I)->getOperand(2).getImm()) {
446 case OPCODE_IS_ZERO_INT:
447 static_cast<MachineInstr *>(I)->getOperand(2)
448 .setImm(OPCODE_IS_NOT_ZERO_INT);
450 case OPCODE_IS_NOT_ZERO_INT:
451 static_cast<MachineInstr *>(I)->getOperand(2)
452 .setImm(OPCODE_IS_ZERO_INT);
455 static_cast<MachineInstr *>(I)->getOperand(2)
456 .setImm(OPCODE_IS_NOT_ZERO);
458 case OPCODE_IS_NOT_ZERO:
459 static_cast<MachineInstr *>(I)->getOperand(2)
460 .setImm(OPCODE_IS_ZERO);
463 llvm_unreachable("PRED_X Opcode invalid!");
469 void AMDGPUCFGStructurizer::insertInstrEnd(MachineBasicBlock *MBB,
470 int NewOpcode, DebugLoc DL) {
471 MachineInstr *MI = MBB->getParent()
472 ->CreateMachineInstr(TII->get(NewOpcode), DL);
474 //assume the instruction doesn't take any reg operand ...
478 MachineInstr *AMDGPUCFGStructurizer::insertInstrBefore(MachineBasicBlock *MBB,
479 int NewOpcode, DebugLoc DL) {
481 MBB->getParent()->CreateMachineInstr(TII->get(NewOpcode), DL);
482 if (MBB->begin() != MBB->end())
483 MBB->insert(MBB->begin(), MI);
490 MachineInstr *AMDGPUCFGStructurizer::insertInstrBefore(
491 MachineBasicBlock::iterator I, int NewOpcode) {
492 MachineInstr *OldMI = &(*I);
493 MachineBasicBlock *MBB = OldMI->getParent();
494 MachineInstr *NewMBB =
495 MBB->getParent()->CreateMachineInstr(TII->get(NewOpcode), DebugLoc());
496 MBB->insert(I, NewMBB);
497 //assume the instruction doesn't take any reg operand ...
498 SHOWNEWINSTR(NewMBB);
502 void AMDGPUCFGStructurizer::insertCondBranchBefore(
503 MachineBasicBlock::iterator I, int NewOpcode, DebugLoc DL) {
504 MachineInstr *OldMI = &(*I);
505 MachineBasicBlock *MBB = OldMI->getParent();
506 MachineFunction *MF = MBB->getParent();
507 MachineInstr *NewMI = MF->CreateMachineInstr(TII->get(NewOpcode), DL);
508 MBB->insert(I, NewMI);
509 MachineInstrBuilder MIB(*MF, NewMI);
510 MIB.addReg(OldMI->getOperand(1).getReg(), false);
512 //erase later oldInstr->eraseFromParent();
515 void AMDGPUCFGStructurizer::insertCondBranchBefore(MachineBasicBlock *blk,
516 MachineBasicBlock::iterator I, int NewOpcode, int RegNum,
518 MachineFunction *MF = blk->getParent();
519 MachineInstr *NewInstr = MF->CreateMachineInstr(TII->get(NewOpcode), DL);
521 blk->insert(I, NewInstr);
522 MachineInstrBuilder(*MF, NewInstr).addReg(RegNum, false);
523 SHOWNEWINSTR(NewInstr);
526 void AMDGPUCFGStructurizer::insertCondBranchEnd(MachineBasicBlock *MBB,
527 int NewOpcode, int RegNum) {
528 MachineFunction *MF = MBB->getParent();
529 MachineInstr *NewInstr =
530 MF->CreateMachineInstr(TII->get(NewOpcode), DebugLoc());
531 MBB->push_back(NewInstr);
532 MachineInstrBuilder(*MF, NewInstr).addReg(RegNum, false);
533 SHOWNEWINSTR(NewInstr);
536 int AMDGPUCFGStructurizer::getBranchNzeroOpcode(int OldOpcode) {
538 case AMDGPU::JUMP_COND:
539 case AMDGPU::JUMP: return AMDGPU::IF_PREDICATE_SET;
540 case AMDGPU::BRANCH_COND_i32:
541 case AMDGPU::BRANCH_COND_f32: return AMDGPU::IF_LOGICALNZ_f32;
542 default: llvm_unreachable("internal error");
547 int AMDGPUCFGStructurizer::getBranchZeroOpcode(int OldOpcode) {
549 case AMDGPU::JUMP_COND:
550 case AMDGPU::JUMP: return AMDGPU::IF_PREDICATE_SET;
551 case AMDGPU::BRANCH_COND_i32:
552 case AMDGPU::BRANCH_COND_f32: return AMDGPU::IF_LOGICALZ_f32;
553 default: llvm_unreachable("internal error");
558 int AMDGPUCFGStructurizer::getContinueNzeroOpcode(int OldOpcode) {
560 case AMDGPU::JUMP_COND:
561 case AMDGPU::JUMP: return AMDGPU::CONTINUE_LOGICALNZ_i32;
562 default: llvm_unreachable("internal error");
567 int AMDGPUCFGStructurizer::getContinueZeroOpcode(int OldOpcode) {
569 case AMDGPU::JUMP_COND:
570 case AMDGPU::JUMP: return AMDGPU::CONTINUE_LOGICALZ_i32;
571 default: llvm_unreachable("internal error");
576 MachineBasicBlock *AMDGPUCFGStructurizer::getTrueBranch(MachineInstr *MI) {
577 return MI->getOperand(0).getMBB();
580 void AMDGPUCFGStructurizer::setTrueBranch(MachineInstr *MI,
581 MachineBasicBlock *MBB) {
582 MI->getOperand(0).setMBB(MBB);
586 AMDGPUCFGStructurizer::getFalseBranch(MachineBasicBlock *MBB,
588 assert(MBB->succ_size() == 2);
589 MachineBasicBlock *TrueBranch = getTrueBranch(MI);
590 MachineBasicBlock::succ_iterator It = MBB->succ_begin();
591 MachineBasicBlock::succ_iterator Next = It;
593 return (*It == TrueBranch) ? *Next : *It;
596 bool AMDGPUCFGStructurizer::isCondBranch(MachineInstr *MI) {
597 switch (MI->getOpcode()) {
598 case AMDGPU::JUMP_COND:
599 case AMDGPU::BRANCH_COND_i32:
600 case AMDGPU::BRANCH_COND_f32: return true;
607 bool AMDGPUCFGStructurizer::isUncondBranch(MachineInstr *MI) {
608 switch (MI->getOpcode()) {
618 DebugLoc AMDGPUCFGStructurizer::getLastDebugLocInBB(MachineBasicBlock *MBB) {
619 //get DebugLoc from the first MachineBasicBlock instruction with debug info
621 for (MachineBasicBlock::iterator It = MBB->begin(); It != MBB->end();
623 MachineInstr *instr = &(*It);
624 if (instr->getDebugLoc().isUnknown() == false)
625 DL = instr->getDebugLoc();
630 MachineInstr *AMDGPUCFGStructurizer::getNormalBlockBranchInstr(
631 MachineBasicBlock *MBB) {
632 MachineBasicBlock::reverse_iterator It = MBB->rbegin();
633 MachineInstr *MI = &*It;
634 if (MI && (isCondBranch(MI) || isUncondBranch(MI)))
639 MachineInstr *AMDGPUCFGStructurizer::getLoopendBlockBranchInstr(
640 MachineBasicBlock *MBB) {
641 for (MachineBasicBlock::reverse_iterator It = MBB->rbegin(), E = MBB->rend();
644 MachineInstr *MI = &*It;
646 if (isCondBranch(MI) || isUncondBranch(MI))
648 else if (!TII->isMov(MI->getOpcode()))
655 MachineInstr *AMDGPUCFGStructurizer::getReturnInstr(MachineBasicBlock *MBB) {
656 MachineBasicBlock::reverse_iterator It = MBB->rbegin();
657 if (It != MBB->rend()) {
658 MachineInstr *instr = &(*It);
659 if (instr->getOpcode() == AMDGPU::RETURN)
665 MachineInstr *AMDGPUCFGStructurizer::getContinueInstr(MachineBasicBlock *MBB) {
666 MachineBasicBlock::reverse_iterator It = MBB->rbegin();
667 if (It != MBB->rend()) {
668 MachineInstr *MI = &(*It);
669 if (MI->getOpcode() == AMDGPU::CONTINUE)
675 bool AMDGPUCFGStructurizer::isReturnBlock(MachineBasicBlock *MBB) {
676 MachineInstr *MI = getReturnInstr(MBB);
677 bool IsReturn = (MBB->succ_size() == 0);
682 dbgs() << "BB" << MBB->getNumber()
683 <<" is return block without RETURN instr\n";);
687 void AMDGPUCFGStructurizer::cloneSuccessorList(MachineBasicBlock *DstMBB,
688 MachineBasicBlock *SrcMBB) {
689 for (MachineBasicBlock::succ_iterator It = SrcMBB->succ_begin(),
690 iterEnd = SrcMBB->succ_end(); It != iterEnd; ++It)
691 DstMBB->addSuccessor(*It); // *iter's predecessor is also taken care of
694 MachineBasicBlock *AMDGPUCFGStructurizer::clone(MachineBasicBlock *MBB) {
695 MachineFunction *Func = MBB->getParent();
696 MachineBasicBlock *NewMBB = Func->CreateMachineBasicBlock();
697 Func->push_back(NewMBB); //insert to function
698 for (MachineBasicBlock::iterator It = MBB->begin(), E = MBB->end();
700 MachineInstr *MI = Func->CloneMachineInstr(It);
701 NewMBB->push_back(MI);
706 void AMDGPUCFGStructurizer::replaceInstrUseOfBlockWith(
707 MachineBasicBlock *SrcMBB, MachineBasicBlock *OldMBB,
708 MachineBasicBlock *NewBlk) {
709 MachineInstr *BranchMI = getLoopendBlockBranchInstr(SrcMBB);
710 if (BranchMI && isCondBranch(BranchMI) &&
711 getTrueBranch(BranchMI) == OldMBB)
712 setTrueBranch(BranchMI, NewBlk);
715 void AMDGPUCFGStructurizer::wrapup(MachineBasicBlock *MBB) {
716 assert((!MBB->getParent()->getJumpTableInfo()
717 || MBB->getParent()->getJumpTableInfo()->isEmpty())
718 && "found a jump table");
720 //collect continue right before endloop
721 SmallVector<MachineInstr *, DEFAULT_VEC_SLOTS> ContInstr;
722 MachineBasicBlock::iterator Pre = MBB->begin();
723 MachineBasicBlock::iterator E = MBB->end();
724 MachineBasicBlock::iterator It = Pre;
726 if (Pre->getOpcode() == AMDGPU::CONTINUE
727 && It->getOpcode() == AMDGPU::ENDLOOP)
728 ContInstr.push_back(Pre);
733 //delete continue right before endloop
734 for (unsigned i = 0; i < ContInstr.size(); ++i)
735 ContInstr[i]->eraseFromParent();
737 // TODO to fix up jump table so later phase won't be confused. if
738 // (jumpTableInfo->isEmpty() == false) { need to clean the jump table, but
739 // there isn't such an interface yet. alternatively, replace all the other
740 // blocks in the jump table with the entryBlk //}
745 bool AMDGPUCFGStructurizer::prepare() {
746 bool Changed = false;
748 //FIXME: if not reducible flow graph, make it so ???
750 DEBUG(dbgs() << "AMDGPUCFGStructurizer::prepare\n";);
752 orderBlocks(FuncRep);
754 SmallVector<MachineBasicBlock *, DEFAULT_VEC_SLOTS> RetBlks;
756 // Add an ExitBlk to loop that don't have one
757 for (MachineLoopInfo::iterator It = MLI->begin(),
758 E = MLI->end(); It != E; ++It) {
759 MachineLoop *LoopRep = (*It);
760 MBBVector ExitingMBBs;
761 LoopRep->getExitingBlocks(ExitingMBBs);
763 if (ExitingMBBs.size() == 0) {
764 MachineBasicBlock* DummyExitBlk = normalizeInfiniteLoopExit(LoopRep);
766 RetBlks.push_back(DummyExitBlk);
770 // Remove unconditional branch instr.
771 // Add dummy exit block iff there are multiple returns.
772 for (SmallVectorImpl<MachineBasicBlock *>::const_iterator
773 It = OrderedBlks.begin(), E = OrderedBlks.end(); It != E; ++It) {
774 MachineBasicBlock *MBB = *It;
775 removeUnconditionalBranch(MBB);
776 removeRedundantConditionalBranch(MBB);
777 if (isReturnBlock(MBB)) {
778 RetBlks.push_back(MBB);
780 assert(MBB->succ_size() <= 2);
783 if (RetBlks.size() >= 2) {
784 addDummyExitBlock(RetBlks);
791 bool AMDGPUCFGStructurizer::run() {
793 //Assume reducible CFG...
794 DEBUG(dbgs() << "AMDGPUCFGStructurizer::run\n";FuncRep->viewCFG(););
797 //Use the worse block ordering to test the algorithm.
798 ReverseVector(orderedBlks);
801 DEBUG(dbgs() << "Ordered blocks:\n"; printOrderedBlocks(););
804 MachineBasicBlock *MBB;
805 bool MakeProgress = false;
806 int NumRemainedBlk = countActiveBlock(OrderedBlks.begin(),
812 dbgs() << "numIter = " << NumIter
813 << ", numRemaintedBlk = " << NumRemainedBlk << "\n";
816 SmallVectorImpl<MachineBasicBlock *>::const_iterator It =
818 SmallVectorImpl<MachineBasicBlock *>::const_iterator E =
821 SmallVectorImpl<MachineBasicBlock *>::const_iterator SccBeginIter =
823 MachineBasicBlock *SccBeginMBB = NULL;
824 int SccNumBlk = 0; // The number of active blocks, init to a
825 // maximum possible number.
826 int SccNumIter; // Number of iteration in this SCC.
835 SccNumBlk = NumRemainedBlk; // Init to maximum possible number.
837 dbgs() << "start processing SCC" << getSCCNum(SccBeginMBB);
842 if (!isRetiredBlock(MBB))
847 bool ContNextScc = true;
849 || getSCCNum(SccBeginMBB) != getSCCNum(*It)) {
850 // Just finish one scc.
852 int sccRemainedNumBlk = countActiveBlock(SccBeginIter, It);
853 if (sccRemainedNumBlk != 1 && sccRemainedNumBlk >= SccNumBlk) {
855 dbgs() << "Can't reduce SCC " << getSCCNum(MBB)
856 << ", sccNumIter = " << SccNumIter;
857 dbgs() << "doesn't make any progress\n";
860 } else if (sccRemainedNumBlk != 1 && sccRemainedNumBlk < SccNumBlk) {
861 SccNumBlk = sccRemainedNumBlk;
865 dbgs() << "repeat processing SCC" << getSCCNum(MBB)
866 << "sccNumIter = " << SccNumIter << "\n";
870 // Finish the current scc.
874 // Continue on next component in the current scc.
880 } //while, "one iteration" over the function.
882 MachineBasicBlock *EntryMBB =
883 GraphTraits<MachineFunction *>::nodes_begin(FuncRep);
884 if (EntryMBB->succ_size() == 0) {
887 dbgs() << "Reduce to one block\n";
890 int NewnumRemainedBlk
891 = countActiveBlock(OrderedBlks.begin(), OrderedBlks.end());
892 // consider cloned blocks ??
893 if (NewnumRemainedBlk == 1 || NewnumRemainedBlk < NumRemainedBlk) {
895 NumRemainedBlk = NewnumRemainedBlk;
897 MakeProgress = false;
899 dbgs() << "No progress\n";
903 } while (!Finish && MakeProgress);
905 // Misc wrap up to maintain the consistency of the Function representation.
906 wrapup(GraphTraits<MachineFunction *>::nodes_begin(FuncRep));
908 // Detach retired Block, release memory.
909 for (MBBInfoMap::iterator It = BlockInfoMap.begin(), E = BlockInfoMap.end();
911 if ((*It).second && (*It).second->IsRetired) {
912 assert(((*It).first)->getNumber() != -1);
914 dbgs() << "Erase BB" << ((*It).first)->getNumber() << "\n";
916 (*It).first->eraseFromParent(); //Remove from the parent Function.
920 BlockInfoMap.clear();
928 llvm_unreachable("IRREDUCIBL_CF");
935 void AMDGPUCFGStructurizer::orderBlocks(MachineFunction *MF) {
937 MachineBasicBlock *MBB;
938 for (scc_iterator<MachineFunction *> It = scc_begin(MF), E = scc_end(MF);
939 It != E; ++It, ++SccNum) {
940 std::vector<MachineBasicBlock *> &SccNext = *It;
941 for (std::vector<MachineBasicBlock *>::const_iterator
942 blockIter = SccNext.begin(), blockEnd = SccNext.end();
943 blockIter != blockEnd; ++blockIter) {
945 OrderedBlks.push_back(MBB);
946 recordSccnum(MBB, SccNum);
950 //walk through all the block in func to check for unreachable
951 typedef GraphTraits<MachineFunction *> GTM;
952 MachineFunction::iterator It = GTM::nodes_begin(MF), E = GTM::nodes_end(MF);
953 for (; It != E; ++It) {
954 MachineBasicBlock *MBB = &(*It);
955 SccNum = getSCCNum(MBB);
956 if (SccNum == INVALIDSCCNUM)
957 dbgs() << "unreachable block BB" << MBB->getNumber() << "\n";
961 int AMDGPUCFGStructurizer::patternMatch(MachineBasicBlock *MBB) {
966 dbgs() << "Begin patternMatch BB" << MBB->getNumber() << "\n";
969 while ((CurMatch = patternMatchGroup(MBB)) > 0)
970 NumMatch += CurMatch;
973 dbgs() << "End patternMatch BB" << MBB->getNumber()
974 << ", numMatch = " << NumMatch << "\n";
980 int AMDGPUCFGStructurizer::patternMatchGroup(MachineBasicBlock *MBB) {
982 NumMatch += loopendPatternMatch();
983 NumMatch += serialPatternMatch(MBB);
984 NumMatch += ifPatternMatch(MBB);
989 int AMDGPUCFGStructurizer::serialPatternMatch(MachineBasicBlock *MBB) {
990 if (MBB->succ_size() != 1)
993 MachineBasicBlock *childBlk = *MBB->succ_begin();
994 if (childBlk->pred_size() != 1 || isActiveLoophead(childBlk))
997 mergeSerialBlock(MBB, childBlk);
998 ++numSerialPatternMatch;
1002 int AMDGPUCFGStructurizer::ifPatternMatch(MachineBasicBlock *MBB) {
1004 if (MBB->succ_size() != 2)
1006 if (hasBackEdge(MBB))
1008 MachineInstr *BranchMI = getNormalBlockBranchInstr(MBB);
1012 assert(isCondBranch(BranchMI));
1015 MachineBasicBlock *TrueMBB = getTrueBranch(BranchMI);
1016 NumMatch += serialPatternMatch(TrueMBB);
1017 NumMatch += ifPatternMatch(TrueMBB);
1018 MachineBasicBlock *FalseMBB = getFalseBranch(MBB, BranchMI);
1019 NumMatch += serialPatternMatch(FalseMBB);
1020 NumMatch += ifPatternMatch(FalseMBB);
1021 MachineBasicBlock *LandBlk;
1024 assert (!TrueMBB->succ_empty() || !FalseMBB->succ_empty());
1026 if (TrueMBB->succ_size() == 1 && FalseMBB->succ_size() == 1
1027 && *TrueMBB->succ_begin() == *FalseMBB->succ_begin()) {
1029 LandBlk = *TrueMBB->succ_begin();
1030 } else if (TrueMBB->succ_size() == 1 && *TrueMBB->succ_begin() == FalseMBB) {
1031 // Triangle pattern, false is empty
1034 } else if (FalseMBB->succ_size() == 1
1035 && *FalseMBB->succ_begin() == TrueMBB) {
1036 // Triangle pattern, true is empty
1037 // We reverse the predicate to make a triangle, empty false pattern;
1038 std::swap(TrueMBB, FalseMBB);
1039 reversePredicateSetter(MBB->end());
1042 } else if (FalseMBB->succ_size() == 1
1043 && isSameloopDetachedContbreak(TrueMBB, FalseMBB)) {
1044 LandBlk = *FalseMBB->succ_begin();
1045 } else if (TrueMBB->succ_size() == 1
1046 && isSameloopDetachedContbreak(FalseMBB, TrueMBB)) {
1047 LandBlk = *TrueMBB->succ_begin();
1049 return NumMatch + handleJumpintoIf(MBB, TrueMBB, FalseMBB);
1052 // improveSimpleJumpinfoIf can handle the case where landBlk == NULL but the
1053 // new BB created for landBlk==NULL may introduce new challenge to the
1054 // reduction process.
1056 ((TrueMBB && TrueMBB->pred_size() > 1)
1057 || (FalseMBB && FalseMBB->pred_size() > 1))) {
1058 Cloned += improveSimpleJumpintoIf(MBB, TrueMBB, FalseMBB, &LandBlk);
1061 if (TrueMBB && TrueMBB->pred_size() > 1) {
1062 TrueMBB = cloneBlockForPredecessor(TrueMBB, MBB);
1066 if (FalseMBB && FalseMBB->pred_size() > 1) {
1067 FalseMBB = cloneBlockForPredecessor(FalseMBB, MBB);
1071 mergeIfthenelseBlock(BranchMI, MBB, TrueMBB, FalseMBB, LandBlk);
1073 ++numIfPatternMatch;
1075 numClonedBlock += Cloned;
1077 return 1 + Cloned + NumMatch;
1080 int AMDGPUCFGStructurizer::loopendPatternMatch() {
1081 std::vector<MachineLoop *> NestedLoops;
1082 for (MachineLoopInfo::iterator It = MLI->begin(), E = MLI->end();
1084 df_iterator<MachineLoop *> LpIt = df_begin(*It),
1086 for (; LpIt != LpE; ++LpIt)
1087 NestedLoops.push_back(*LpIt);
1089 if (NestedLoops.size() == 0)
1092 // Process nested loop outside->inside, so "continue" to a outside loop won't
1093 // be mistaken as "break" of the current loop.
1095 for (std::vector<MachineLoop *>::reverse_iterator It = NestedLoops.rbegin(),
1096 E = NestedLoops.rend(); It != E; ++It) {
1097 MachineLoop *ExaminedLoop = *It;
1098 if (ExaminedLoop->getNumBlocks() == 0 || Visited[ExaminedLoop])
1100 DEBUG(dbgs() << "Processing:\n"; ExaminedLoop->dump(););
1101 int NumBreak = mergeLoop(ExaminedLoop);
1109 int AMDGPUCFGStructurizer::mergeLoop(MachineLoop *LoopRep) {
1110 MachineBasicBlock *LoopHeader = LoopRep->getHeader();
1111 MBBVector ExitingMBBs;
1112 LoopRep->getExitingBlocks(ExitingMBBs);
1113 assert(!ExitingMBBs.empty() && "Infinite Loop not supported");
1114 DEBUG(dbgs() << "Loop has " << ExitingMBBs.size() << " exiting blocks\n";);
1115 // We assume a single ExitBlk
1117 LoopRep->getExitBlocks(ExitBlks);
1118 SmallPtrSet<MachineBasicBlock *, 2> ExitBlkSet;
1119 for (unsigned i = 0, e = ExitBlks.size(); i < e; ++i)
1120 ExitBlkSet.insert(ExitBlks[i]);
1121 assert(ExitBlkSet.size() == 1);
1122 MachineBasicBlock *ExitBlk = *ExitBlks.begin();
1123 assert(ExitBlk && "Loop has several exit block");
1124 MBBVector LatchBlks;
1125 typedef GraphTraits<Inverse<MachineBasicBlock*> > InvMBBTraits;
1126 InvMBBTraits::ChildIteratorType PI = InvMBBTraits::child_begin(LoopHeader),
1127 PE = InvMBBTraits::child_end(LoopHeader);
1128 for (; PI != PE; PI++) {
1129 if (LoopRep->contains(*PI))
1130 LatchBlks.push_back(*PI);
1133 for (unsigned i = 0, e = ExitingMBBs.size(); i < e; ++i)
1134 mergeLoopbreakBlock(ExitingMBBs[i], ExitBlk);
1135 for (unsigned i = 0, e = LatchBlks.size(); i < e; ++i)
1136 settleLoopcontBlock(LatchBlks[i], LoopHeader);
1140 Match += serialPatternMatch(LoopHeader);
1141 Match += ifPatternMatch(LoopHeader);
1142 } while (Match > 0);
1143 mergeLooplandBlock(LoopHeader, ExitBlk);
1144 MachineLoop *ParentLoop = LoopRep->getParentLoop();
1146 MLI->changeLoopFor(LoopHeader, ParentLoop);
1148 MLI->removeBlock(LoopHeader);
1149 Visited[LoopRep] = true;
1153 int AMDGPUCFGStructurizer::loopcontPatternMatch(MachineLoop *LoopRep,
1154 MachineBasicBlock *LoopHeader) {
1156 SmallVector<MachineBasicBlock *, DEFAULT_VEC_SLOTS> ContMBB;
1157 typedef GraphTraits<Inverse<MachineBasicBlock *> > GTIM;
1158 GTIM::ChildIteratorType It = GTIM::child_begin(LoopHeader),
1159 E = GTIM::child_end(LoopHeader);
1160 for (; It != E; ++It) {
1161 MachineBasicBlock *MBB = *It;
1162 if (LoopRep->contains(MBB)) {
1163 handleLoopcontBlock(MBB, MLI->getLoopFor(MBB),
1164 LoopHeader, LoopRep);
1165 ContMBB.push_back(MBB);
1170 for (SmallVectorImpl<MachineBasicBlock *>::iterator It = ContMBB.begin(),
1171 E = ContMBB.end(); It != E; ++It) {
1172 (*It)->removeSuccessor(LoopHeader);
1175 numLoopcontPatternMatch += NumCont;
1181 bool AMDGPUCFGStructurizer::isSameloopDetachedContbreak(
1182 MachineBasicBlock *Src1MBB, MachineBasicBlock *Src2MBB) {
1183 if (Src1MBB->succ_size() == 0) {
1184 MachineLoop *LoopRep = MLI->getLoopFor(Src1MBB);
1185 if (LoopRep&& LoopRep == MLI->getLoopFor(Src2MBB)) {
1186 MachineBasicBlock *&TheEntry = LLInfoMap[LoopRep];
1189 dbgs() << "isLoopContBreakBlock yes src1 = BB"
1190 << Src1MBB->getNumber()
1191 << " src2 = BB" << Src2MBB->getNumber() << "\n";
1200 int AMDGPUCFGStructurizer::handleJumpintoIf(MachineBasicBlock *HeadMBB,
1201 MachineBasicBlock *TrueMBB, MachineBasicBlock *FalseMBB) {
1202 int Num = handleJumpintoIfImp(HeadMBB, TrueMBB, FalseMBB);
1205 dbgs() << "handleJumpintoIf swap trueBlk and FalseBlk" << "\n";
1207 Num = handleJumpintoIfImp(HeadMBB, FalseMBB, TrueMBB);
1212 int AMDGPUCFGStructurizer::handleJumpintoIfImp(MachineBasicBlock *HeadMBB,
1213 MachineBasicBlock *TrueMBB, MachineBasicBlock *FalseMBB) {
1215 MachineBasicBlock *DownBlk;
1217 //trueBlk could be the common post dominator
1221 dbgs() << "handleJumpintoIfImp head = BB" << HeadMBB->getNumber()
1222 << " true = BB" << TrueMBB->getNumber()
1223 << ", numSucc=" << TrueMBB->succ_size()
1224 << " false = BB" << FalseMBB->getNumber() << "\n";
1229 dbgs() << "check down = BB" << DownBlk->getNumber();
1232 if (singlePathTo(FalseMBB, DownBlk) == SinglePath_InPath) {
1234 dbgs() << " working\n";
1237 Num += cloneOnSideEntryTo(HeadMBB, TrueMBB, DownBlk);
1238 Num += cloneOnSideEntryTo(HeadMBB, FalseMBB, DownBlk);
1240 numClonedBlock += Num;
1241 Num += serialPatternMatch(*HeadMBB->succ_begin());
1242 Num += serialPatternMatch(*llvm::next(HeadMBB->succ_begin()));
1243 Num += ifPatternMatch(HeadMBB);
1249 dbgs() << " not working\n";
1251 DownBlk = (DownBlk->succ_size() == 1) ? (*DownBlk->succ_begin()) : NULL;
1252 } // walk down the postDomTree
1257 void AMDGPUCFGStructurizer::showImproveSimpleJumpintoIf(
1258 MachineBasicBlock *HeadMBB, MachineBasicBlock *TrueMBB,
1259 MachineBasicBlock *FalseMBB, MachineBasicBlock *LandMBB, bool Detail) {
1260 dbgs() << "head = BB" << HeadMBB->getNumber()
1261 << " size = " << HeadMBB->size();
1264 HeadMBB->print(dbgs());
1269 dbgs() << ", true = BB" << TrueMBB->getNumber() << " size = "
1270 << TrueMBB->size() << " numPred = " << TrueMBB->pred_size();
1273 TrueMBB->print(dbgs());
1278 dbgs() << ", false = BB" << FalseMBB->getNumber() << " size = "
1279 << FalseMBB->size() << " numPred = " << FalseMBB->pred_size();
1282 FalseMBB->print(dbgs());
1287 dbgs() << ", land = BB" << LandMBB->getNumber() << " size = "
1288 << LandMBB->size() << " numPred = " << LandMBB->pred_size();
1291 LandMBB->print(dbgs());
1299 int AMDGPUCFGStructurizer::improveSimpleJumpintoIf(MachineBasicBlock *HeadMBB,
1300 MachineBasicBlock *TrueMBB, MachineBasicBlock *FalseMBB,
1301 MachineBasicBlock **LandMBBPtr) {
1302 bool MigrateTrue = false;
1303 bool MigrateFalse = false;
1305 MachineBasicBlock *LandBlk = *LandMBBPtr;
1307 assert((!TrueMBB || TrueMBB->succ_size() <= 1)
1308 && (!FalseMBB || FalseMBB->succ_size() <= 1));
1310 if (TrueMBB == FalseMBB)
1313 MigrateTrue = needMigrateBlock(TrueMBB);
1314 MigrateFalse = needMigrateBlock(FalseMBB);
1316 if (!MigrateTrue && !MigrateFalse)
1319 // If we need to migrate either trueBlk and falseBlk, migrate the rest that
1320 // have more than one predecessors. without doing this, its predecessor
1321 // rather than headBlk will have undefined value in initReg.
1322 if (!MigrateTrue && TrueMBB && TrueMBB->pred_size() > 1)
1324 if (!MigrateFalse && FalseMBB && FalseMBB->pred_size() > 1)
1325 MigrateFalse = true;
1328 dbgs() << "before improveSimpleJumpintoIf: ";
1329 showImproveSimpleJumpintoIf(HeadMBB, TrueMBB, FalseMBB, LandBlk, 0);
1332 // org: headBlk => if () {trueBlk} else {falseBlk} => landBlk
1334 // new: headBlk => if () {initReg = 1; org trueBlk branch} else
1335 // {initReg = 0; org falseBlk branch }
1336 // => landBlk => if (initReg) {org trueBlk} else {org falseBlk}
1338 // if landBlk->pred_size() > 2, put the about if-else inside
1339 // if (initReg !=2) {...}
1341 // add initReg = initVal to headBlk
1343 const TargetRegisterClass * I32RC = TRI->getCFGStructurizerRegClass(MVT::i32);
1344 if (!MigrateTrue || !MigrateFalse) {
1345 // XXX: We have an opportunity here to optimize the "branch into if" case
1346 // here. Branch into if looks like this:
1349 // diamond_head branch_from
1351 // diamond_false diamond_true
1355 // The diamond_head block begins the "if" and the diamond_true block
1356 // is the block being "branched into".
1358 // If MigrateTrue is true, then TrueBB is the block being "branched into"
1359 // and if MigrateFalse is true, then FalseBB is the block being
1362 // Here is the pseudo code for how I think the optimization should work:
1363 // 1. Insert MOV GPR0, 0 before the branch instruction in diamond_head.
1364 // 2. Insert MOV GPR0, 1 before the branch instruction in branch_from.
1365 // 3. Move the branch instruction from diamond_head into its own basic
1366 // block (new_block).
1367 // 4. Add an unconditional branch from diamond_head to new_block
1368 // 5. Replace the branch instruction in branch_from with an unconditional
1369 // branch to new_block. If branch_from has multiple predecessors, then
1370 // we need to replace the True/False block in the branch
1371 // instruction instead of replacing it.
1372 // 6. Change the condition of the branch instruction in new_block from
1373 // COND to (COND || GPR0)
1375 // In order insert these MOV instruction, we will need to use the
1376 // RegisterScavenger. Usually liveness stops being tracked during
1377 // the late machine optimization passes, however if we implement
1378 // bool TargetRegisterInfo::requiresRegisterScavenging(
1379 // const MachineFunction &MF)
1380 // and have it return true, liveness will be tracked correctly
1381 // by generic optimization passes. We will also need to make sure that
1382 // all of our target-specific passes that run after regalloc and before
1383 // the CFGStructurizer track liveness and we will need to modify this pass
1384 // to correctly track liveness.
1386 // After the above changes, the new CFG should look like this:
1389 // diamond_head branch_from
1393 // diamond_false diamond_true
1397 // Without this optimization, we are forced to duplicate the diamond_true
1398 // block and we will end up with a CFG like this:
1402 // diamond_head branch_from
1404 // diamond_false diamond_true diamond_true (duplicate)
1406 // done --------------------|
1408 // Duplicating diamond_true can be very costly especially if it has a
1409 // lot of instructions.
1415 bool LandBlkHasOtherPred = (LandBlk->pred_size() > 2);
1417 //insert AMDGPU::ENDIF to avoid special case "input landBlk == NULL"
1418 MachineBasicBlock::iterator I = insertInstrBefore(LandBlk, AMDGPU::ENDIF);
1420 if (LandBlkHasOtherPred) {
1421 llvm_unreachable("Extra register needed to handle CFG");
1422 unsigned CmpResReg =
1423 HeadMBB->getParent()->getRegInfo().createVirtualRegister(I32RC);
1424 llvm_unreachable("Extra compare instruction needed to handle CFG");
1425 insertCondBranchBefore(LandBlk, I, AMDGPU::IF_PREDICATE_SET,
1426 CmpResReg, DebugLoc());
1429 // XXX: We are running this after RA, so creating virtual registers will
1430 // cause an assertion failure in the PostRA scheduling pass.
1432 HeadMBB->getParent()->getRegInfo().createVirtualRegister(I32RC);
1433 insertCondBranchBefore(LandBlk, I, AMDGPU::IF_PREDICATE_SET, InitReg,
1437 migrateInstruction(TrueMBB, LandBlk, I);
1438 // need to uncondionally insert the assignment to ensure a path from its
1439 // predecessor rather than headBlk has valid value in initReg if
1441 llvm_unreachable("Extra register needed to handle CFG");
1443 insertInstrBefore(I, AMDGPU::ELSE);
1446 migrateInstruction(FalseMBB, LandBlk, I);
1447 // need to uncondionally insert the assignment to ensure a path from its
1448 // predecessor rather than headBlk has valid value in initReg if
1450 llvm_unreachable("Extra register needed to handle CFG");
1453 if (LandBlkHasOtherPred) {
1455 insertInstrBefore(I, AMDGPU::ENDIF);
1457 // put initReg = 2 to other predecessors of landBlk
1458 for (MachineBasicBlock::pred_iterator PI = LandBlk->pred_begin(),
1459 PE = LandBlk->pred_end(); PI != PE; ++PI) {
1460 MachineBasicBlock *MBB = *PI;
1461 if (MBB != TrueMBB && MBB != FalseMBB)
1462 llvm_unreachable("Extra register needed to handle CFG");
1466 dbgs() << "result from improveSimpleJumpintoIf: ";
1467 showImproveSimpleJumpintoIf(HeadMBB, TrueMBB, FalseMBB, LandBlk, 0);
1471 *LandMBBPtr = LandBlk;
1476 void AMDGPUCFGStructurizer::handleLoopcontBlock(MachineBasicBlock *ContingMBB,
1477 MachineLoop *ContingLoop, MachineBasicBlock *ContMBB,
1478 MachineLoop *ContLoop) {
1479 DEBUG(dbgs() << "loopcontPattern cont = BB" << ContingMBB->getNumber()
1480 << " header = BB" << ContMBB->getNumber() << "\n";
1481 dbgs() << "Trying to continue loop-depth = "
1482 << getLoopDepth(ContLoop)
1483 << " from loop-depth = " << getLoopDepth(ContingLoop) << "\n";);
1484 settleLoopcontBlock(ContingMBB, ContMBB);
1487 void AMDGPUCFGStructurizer::mergeSerialBlock(MachineBasicBlock *DstMBB,
1488 MachineBasicBlock *SrcMBB) {
1490 dbgs() << "serialPattern BB" << DstMBB->getNumber()
1491 << " <= BB" << SrcMBB->getNumber() << "\n";
1493 DstMBB->splice(DstMBB->end(), SrcMBB, SrcMBB->begin(), SrcMBB->end());
1495 DstMBB->removeSuccessor(SrcMBB);
1496 cloneSuccessorList(DstMBB, SrcMBB);
1498 removeSuccessor(SrcMBB);
1499 MLI->removeBlock(SrcMBB);
1500 retireBlock(SrcMBB);
1503 void AMDGPUCFGStructurizer::mergeIfthenelseBlock(MachineInstr *BranchMI,
1504 MachineBasicBlock *MBB, MachineBasicBlock *TrueMBB,
1505 MachineBasicBlock *FalseMBB, MachineBasicBlock *LandMBB) {
1508 dbgs() << "ifPattern BB" << MBB->getNumber();
1511 dbgs() << "BB" << TrueMBB->getNumber();
1513 dbgs() << " } else ";
1516 dbgs() << "BB" << FalseMBB->getNumber();
1519 dbgs() << "landBlock: ";
1523 dbgs() << "BB" << LandMBB->getNumber();
1528 int OldOpcode = BranchMI->getOpcode();
1529 DebugLoc BranchDL = BranchMI->getDebugLoc();
1539 MachineBasicBlock::iterator I = BranchMI;
1540 insertCondBranchBefore(I, getBranchNzeroOpcode(OldOpcode),
1544 MBB->splice(I, TrueMBB, TrueMBB->begin(), TrueMBB->end());
1545 MBB->removeSuccessor(TrueMBB);
1546 if (LandMBB && TrueMBB->succ_size()!=0)
1547 TrueMBB->removeSuccessor(LandMBB);
1548 retireBlock(TrueMBB);
1549 MLI->removeBlock(TrueMBB);
1553 insertInstrBefore(I, AMDGPU::ELSE);
1554 MBB->splice(I, FalseMBB, FalseMBB->begin(),
1556 MBB->removeSuccessor(FalseMBB);
1557 if (LandMBB && FalseMBB->succ_size() != 0)
1558 FalseMBB->removeSuccessor(LandMBB);
1559 retireBlock(FalseMBB);
1560 MLI->removeBlock(FalseMBB);
1562 insertInstrBefore(I, AMDGPU::ENDIF);
1564 BranchMI->eraseFromParent();
1566 if (LandMBB && TrueMBB && FalseMBB)
1567 MBB->addSuccessor(LandMBB);
1571 void AMDGPUCFGStructurizer::mergeLooplandBlock(MachineBasicBlock *DstBlk,
1572 MachineBasicBlock *LandMBB) {
1573 DEBUG(dbgs() << "loopPattern header = BB" << DstBlk->getNumber()
1574 << " land = BB" << LandMBB->getNumber() << "\n";);
1576 insertInstrBefore(DstBlk, AMDGPU::WHILELOOP, DebugLoc());
1577 insertInstrEnd(DstBlk, AMDGPU::ENDLOOP, DebugLoc());
1578 DstBlk->addSuccessor(LandMBB);
1579 DstBlk->removeSuccessor(DstBlk);
1583 void AMDGPUCFGStructurizer::mergeLoopbreakBlock(MachineBasicBlock *ExitingMBB,
1584 MachineBasicBlock *LandMBB) {
1585 DEBUG(dbgs() << "loopbreakPattern exiting = BB" << ExitingMBB->getNumber()
1586 << " land = BB" << LandMBB->getNumber() << "\n";);
1587 MachineInstr *BranchMI = getLoopendBlockBranchInstr(ExitingMBB);
1588 assert(BranchMI && isCondBranch(BranchMI));
1589 DebugLoc DL = BranchMI->getDebugLoc();
1590 MachineBasicBlock *TrueBranch = getTrueBranch(BranchMI);
1591 MachineBasicBlock::iterator I = BranchMI;
1592 if (TrueBranch != LandMBB)
1593 reversePredicateSetter(I);
1594 insertCondBranchBefore(ExitingMBB, I, AMDGPU::IF_PREDICATE_SET, AMDGPU::PREDICATE_BIT, DL);
1595 insertInstrBefore(I, AMDGPU::BREAK);
1596 insertInstrBefore(I, AMDGPU::ENDIF);
1597 //now branchInst can be erase safely
1598 BranchMI->eraseFromParent();
1599 //now take care of successors, retire blocks
1600 ExitingMBB->removeSuccessor(LandMBB);
1603 void AMDGPUCFGStructurizer::settleLoopcontBlock(MachineBasicBlock *ContingMBB,
1604 MachineBasicBlock *ContMBB) {
1605 DEBUG(dbgs() << "settleLoopcontBlock conting = BB"
1606 << ContingMBB->getNumber()
1607 << ", cont = BB" << ContMBB->getNumber() << "\n";);
1609 MachineInstr *MI = getLoopendBlockBranchInstr(ContingMBB);
1611 assert(isCondBranch(MI));
1612 MachineBasicBlock::iterator I = MI;
1613 MachineBasicBlock *TrueBranch = getTrueBranch(MI);
1614 int OldOpcode = MI->getOpcode();
1615 DebugLoc DL = MI->getDebugLoc();
1617 bool UseContinueLogical = ((&*ContingMBB->rbegin()) == MI);
1619 if (UseContinueLogical == false) {
1621 TrueBranch == ContMBB ? getBranchNzeroOpcode(OldOpcode) :
1622 getBranchZeroOpcode(OldOpcode);
1623 insertCondBranchBefore(I, BranchOpcode, DL);
1624 // insertEnd to ensure phi-moves, if exist, go before the continue-instr.
1625 insertInstrEnd(ContingMBB, AMDGPU::CONTINUE, DL);
1626 insertInstrEnd(ContingMBB, AMDGPU::ENDIF, DL);
1629 TrueBranch == ContMBB ? getContinueNzeroOpcode(OldOpcode) :
1630 getContinueZeroOpcode(OldOpcode);
1631 insertCondBranchBefore(I, BranchOpcode, DL);
1634 MI->eraseFromParent();
1636 // if we've arrived here then we've already erased the branch instruction
1637 // travel back up the basic block to see the last reference of our debug
1638 // location we've just inserted that reference here so it should be
1639 // representative insertEnd to ensure phi-moves, if exist, go before the
1641 insertInstrEnd(ContingMBB, AMDGPU::CONTINUE,
1642 getLastDebugLocInBB(ContingMBB));
1646 int AMDGPUCFGStructurizer::cloneOnSideEntryTo(MachineBasicBlock *PreMBB,
1647 MachineBasicBlock *SrcMBB, MachineBasicBlock *DstMBB) {
1649 assert(PreMBB->isSuccessor(SrcMBB));
1650 while (SrcMBB && SrcMBB != DstMBB) {
1651 assert(SrcMBB->succ_size() == 1);
1652 if (SrcMBB->pred_size() > 1) {
1653 SrcMBB = cloneBlockForPredecessor(SrcMBB, PreMBB);
1658 SrcMBB = *SrcMBB->succ_begin();
1665 AMDGPUCFGStructurizer::cloneBlockForPredecessor(MachineBasicBlock *MBB,
1666 MachineBasicBlock *PredMBB) {
1667 assert(PredMBB->isSuccessor(MBB) &&
1668 "succBlk is not a prececessor of curBlk");
1670 MachineBasicBlock *CloneMBB = clone(MBB); //clone instructions
1671 replaceInstrUseOfBlockWith(PredMBB, MBB, CloneMBB);
1672 //srcBlk, oldBlk, newBlk
1674 PredMBB->removeSuccessor(MBB);
1675 PredMBB->addSuccessor(CloneMBB);
1677 // add all successor to cloneBlk
1678 cloneSuccessorList(CloneMBB, MBB);
1680 numClonedInstr += MBB->size();
1683 dbgs() << "Cloned block: " << "BB"
1684 << MBB->getNumber() << "size " << MBB->size() << "\n";
1687 SHOWNEWBLK(CloneMBB, "result of Cloned block: ");
1692 void AMDGPUCFGStructurizer::migrateInstruction(MachineBasicBlock *SrcMBB,
1693 MachineBasicBlock *DstMBB, MachineBasicBlock::iterator I) {
1694 MachineBasicBlock::iterator SpliceEnd;
1695 //look for the input branchinstr, not the AMDGPU branchinstr
1696 MachineInstr *BranchMI = getNormalBlockBranchInstr(SrcMBB);
1699 dbgs() << "migrateInstruction don't see branch instr\n" ;
1701 SpliceEnd = SrcMBB->end();
1704 dbgs() << "migrateInstruction see branch instr\n" ;
1707 SpliceEnd = BranchMI;
1710 dbgs() << "migrateInstruction before splice dstSize = " << DstMBB->size()
1711 << "srcSize = " << SrcMBB->size() << "\n";
1714 //splice insert before insertPos
1715 DstMBB->splice(I, SrcMBB, SrcMBB->begin(), SpliceEnd);
1718 dbgs() << "migrateInstruction after splice dstSize = " << DstMBB->size()
1719 << "srcSize = " << SrcMBB->size() << "\n";
1724 AMDGPUCFGStructurizer::normalizeInfiniteLoopExit(MachineLoop* LoopRep) {
1725 MachineBasicBlock *LoopHeader = LoopRep->getHeader();
1726 MachineBasicBlock *LoopLatch = LoopRep->getLoopLatch();
1727 const TargetRegisterClass * I32RC = TRI->getCFGStructurizerRegClass(MVT::i32);
1729 if (!LoopHeader || !LoopLatch)
1731 MachineInstr *BranchMI = getLoopendBlockBranchInstr(LoopLatch);
1732 // Is LoopRep an infinite loop ?
1733 if (!BranchMI || !isUncondBranch(BranchMI))
1736 MachineBasicBlock *DummyExitBlk = FuncRep->CreateMachineBasicBlock();
1737 FuncRep->push_back(DummyExitBlk); //insert to function
1738 SHOWNEWBLK(DummyExitBlk, "DummyExitBlock to normalize infiniteLoop: ");
1739 DEBUG(dbgs() << "Old branch instr: " << *BranchMI << "\n";);
1740 MachineBasicBlock::iterator I = BranchMI;
1741 unsigned ImmReg = FuncRep->getRegInfo().createVirtualRegister(I32RC);
1742 llvm_unreachable("Extra register needed to handle CFG");
1743 MachineInstr *NewMI = insertInstrBefore(I, AMDGPU::BRANCH_COND_i32);
1744 MachineInstrBuilder MIB(*FuncRep, NewMI);
1745 MIB.addMBB(LoopHeader);
1746 MIB.addReg(ImmReg, false);
1747 SHOWNEWINSTR(NewMI);
1748 BranchMI->eraseFromParent();
1749 LoopLatch->addSuccessor(DummyExitBlk);
1751 return DummyExitBlk;
1754 void AMDGPUCFGStructurizer::removeUnconditionalBranch(MachineBasicBlock *MBB) {
1755 MachineInstr *BranchMI;
1757 // I saw two unconditional branch in one basic block in example
1758 // test_fc_do_while_or.c need to fix the upstream on this to remove the loop.
1759 while ((BranchMI = getLoopendBlockBranchInstr(MBB))
1760 && isUncondBranch(BranchMI)) {
1761 DEBUG(dbgs() << "Removing uncond branch instr"; BranchMI->dump(););
1762 BranchMI->eraseFromParent();
1766 void AMDGPUCFGStructurizer::removeRedundantConditionalBranch(
1767 MachineBasicBlock *MBB) {
1768 if (MBB->succ_size() != 2)
1770 MachineBasicBlock *MBB1 = *MBB->succ_begin();
1771 MachineBasicBlock *MBB2 = *llvm::next(MBB->succ_begin());
1775 MachineInstr *BranchMI = getNormalBlockBranchInstr(MBB);
1776 assert(BranchMI && isCondBranch(BranchMI));
1777 DEBUG(dbgs() << "Removing unneeded cond branch instr"; BranchMI->dump(););
1778 BranchMI->eraseFromParent();
1779 SHOWNEWBLK(MBB1, "Removing redundant successor");
1780 MBB->removeSuccessor(MBB1);
1783 void AMDGPUCFGStructurizer::addDummyExitBlock(
1784 SmallVectorImpl<MachineBasicBlock*> &RetMBB) {
1785 MachineBasicBlock *DummyExitBlk = FuncRep->CreateMachineBasicBlock();
1786 FuncRep->push_back(DummyExitBlk); //insert to function
1787 insertInstrEnd(DummyExitBlk, AMDGPU::RETURN);
1789 for (SmallVectorImpl<MachineBasicBlock *>::iterator It = RetMBB.begin(),
1790 E = RetMBB.end(); It != E; ++It) {
1791 MachineBasicBlock *MBB = *It;
1792 MachineInstr *MI = getReturnInstr(MBB);
1794 MI->eraseFromParent();
1795 MBB->addSuccessor(DummyExitBlk);
1797 dbgs() << "Add dummyExitBlock to BB" << MBB->getNumber()
1801 SHOWNEWBLK(DummyExitBlk, "DummyExitBlock: ");
1804 void AMDGPUCFGStructurizer::removeSuccessor(MachineBasicBlock *MBB) {
1805 while (MBB->succ_size())
1806 MBB->removeSuccessor(*MBB->succ_begin());
1809 void AMDGPUCFGStructurizer::recordSccnum(MachineBasicBlock *MBB,
1811 BlockInformation *&srcBlkInfo = BlockInfoMap[MBB];
1813 srcBlkInfo = new BlockInformation();
1814 srcBlkInfo->SccNum = SccNum;
1817 void AMDGPUCFGStructurizer::retireBlock(MachineBasicBlock *MBB) {
1819 dbgs() << "Retiring BB" << MBB->getNumber() << "\n";
1822 BlockInformation *&SrcBlkInfo = BlockInfoMap[MBB];
1825 SrcBlkInfo = new BlockInformation();
1827 SrcBlkInfo->IsRetired = true;
1828 assert(MBB->succ_size() == 0 && MBB->pred_size() == 0
1829 && "can't retire block yet");
1832 void AMDGPUCFGStructurizer::setLoopLandBlock(MachineLoop *loopRep,
1833 MachineBasicBlock *MBB) {
1834 MachineBasicBlock *&TheEntry = LLInfoMap[loopRep];
1836 MBB = FuncRep->CreateMachineBasicBlock();
1837 FuncRep->push_back(MBB); //insert to function
1838 SHOWNEWBLK(MBB, "DummyLandingBlock for loop without break: ");
1842 dbgs() << "setLoopLandBlock loop-header = BB"
1843 << loopRep->getHeader()->getNumber()
1844 << " landing-block = BB" << MBB->getNumber() << "\n";
1849 AMDGPUCFGStructurizer::findNearestCommonPostDom(MachineBasicBlock *MBB1,
1850 MachineBasicBlock *MBB2) {
1852 if (PDT->dominates(MBB1, MBB2))
1854 if (PDT->dominates(MBB2, MBB1))
1857 MachineDomTreeNode *Node1 = PDT->getNode(MBB1);
1858 MachineDomTreeNode *Node2 = PDT->getNode(MBB2);
1860 // Handle newly cloned node.
1861 if (!Node1 && MBB1->succ_size() == 1)
1862 return findNearestCommonPostDom(*MBB1->succ_begin(), MBB2);
1863 if (!Node2 && MBB2->succ_size() == 1)
1864 return findNearestCommonPostDom(MBB1, *MBB2->succ_begin());
1866 if (!Node1 || !Node2)
1869 Node1 = Node1->getIDom();
1871 if (PDT->dominates(Node1, Node2))
1872 return Node1->getBlock();
1873 Node1 = Node1->getIDom();
1880 AMDGPUCFGStructurizer::findNearestCommonPostDom(
1881 std::set<MachineBasicBlock *> &MBBs) {
1882 MachineBasicBlock *CommonDom;
1883 std::set<MachineBasicBlock *>::const_iterator It = MBBs.begin();
1884 std::set<MachineBasicBlock *>::const_iterator E = MBBs.end();
1885 for (CommonDom = *It; It != E && CommonDom; ++It) {
1886 MachineBasicBlock *MBB = *It;
1887 if (MBB != CommonDom)
1888 CommonDom = findNearestCommonPostDom(MBB, CommonDom);
1892 dbgs() << "Common post dominator for exit blocks is ";
1894 dbgs() << "BB" << CommonDom->getNumber() << "\n";
1902 char AMDGPUCFGStructurizer::ID = 0;
1904 } // end anonymous namespace
1907 INITIALIZE_PASS_BEGIN(AMDGPUCFGStructurizer, "amdgpustructurizer",
1908 "AMDGPU CFG Structurizer", false, false)
1909 INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
1910 INITIALIZE_PASS_DEPENDENCY(MachinePostDominatorTree)
1911 INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
1912 INITIALIZE_PASS_END(AMDGPUCFGStructurizer, "amdgpustructurizer",
1913 "AMDGPU CFG Structurizer", false, false)
1915 FunctionPass *llvm::createAMDGPUCFGStructurizerPass() {
1916 return new AMDGPUCFGStructurizer();