lib/Target/PTX/PTXTargetMachine.cpp

   1 //===-- PTXTargetMachine.cpp - Define TargetMachine for PTX ---------------===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // Top-level implementation for the PTX target.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #include "PTX.h"
  15 #include "PTXTargetMachine.h"
  16 #include "llvm/PassManager.h"
  17 #include "llvm/Target/TargetRegistry.h"
  18 #include "llvm/Support/raw_ostream.h"
  19
  20 using namespace llvm;
  21
  22 namespace llvm {
  23   MCStreamer *createPTXAsmStreamer(MCContext &Ctx, formatted_raw_ostream &OS,
  24                                    bool isVerboseAsm, bool useLoc,
  25                                    bool useCFI,
  26                                    MCInstPrinter *InstPrint,
  27                                    MCCodeEmitter *CE,
  28                                    MCAsmBackend *MAB,
  29                                    bool ShowInst);
  30 }
  31
  32 extern "C" void LLVMInitializePTXTarget() {
  33
  34   RegisterTargetMachine<PTX32TargetMachine> X(ThePTX32Target);
  35   RegisterTargetMachine<PTX64TargetMachine> Y(ThePTX64Target);
  36
  37   TargetRegistry::RegisterAsmStreamer(ThePTX32Target, createPTXAsmStreamer);
  38   TargetRegistry::RegisterAsmStreamer(ThePTX64Target, createPTXAsmStreamer);
  39 }
  40
  41 namespace {
  42   const char* DataLayout32 =
  43     "e-p:32:32-i64:32:32-f64:32:32-v128:32:128-v64:32:64-n32:64";
  44   const char* DataLayout64 =
  45     "e-p:64:64-i64:32:32-f64:32:32-v128:32:128-v64:32:64-n32:64";
  46 }
  47
  48 // DataLayout and FrameLowering are filled with dummy data
  49 PTXTargetMachine::PTXTargetMachine(const Target &T,
  50                                    StringRef TT, StringRef CPU, StringRef FS,
  51                                    Reloc::Model RM, CodeModel::Model CM,
  52                                    bool is64Bit)
  53   : LLVMTargetMachine(T, TT, CPU, FS, RM, CM),
  54     DataLayout(is64Bit ? DataLayout64 : DataLayout32),
  55     Subtarget(TT, CPU, FS, is64Bit),
  56     FrameLowering(Subtarget),
  57     InstrInfo(*this),
  58     TLInfo(*this) {
  59 }
  60
  61 PTX32TargetMachine::PTX32TargetMachine(const Target &T, StringRef TT,
  62                                        StringRef CPU, StringRef FS,
  63                                        Reloc::Model RM, CodeModel::Model CM)
  64   : PTXTargetMachine(T, TT, CPU, FS, RM, CM, false) {
  65 }
  66
  67 PTX64TargetMachine::PTX64TargetMachine(const Target &T, StringRef TT,
  68                                        StringRef CPU, StringRef FS,
  69                                        Reloc::Model RM, CodeModel::Model CM)
  70   : PTXTargetMachine(T, TT, CPU, FS, RM, CM, true) {
  71 }
  72
  73 bool PTXTargetMachine::addInstSelector(PassManagerBase &PM,
  74                                        CodeGenOpt::Level OptLevel) {
  75   PM.add(createPTXISelDag(*this, OptLevel));
  76   return false;
  77 }
  78
  79 bool PTXTargetMachine::addPostRegAlloc(PassManagerBase &PM,
  80                                        CodeGenOpt::Level OptLevel) {
  81   // PTXMFInfoExtract must after register allocation!
  82   PM.add(createPTXMFInfoExtract(*this, OptLevel));
  83   return false;
  84 }