lib/Target/ARM64/MCTargetDesc/ARM64MCTargetDesc.cpp

   1 //===-- ARM64MCTargetDesc.cpp - ARM64 Target Descriptions -------*- C++ -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file provides ARM64 specific target descriptions.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #include "ARM64MCTargetDesc.h"
  15 #include "ARM64ELFStreamer.h"
  16 #include "ARM64MCAsmInfo.h"
  17 #include "InstPrinter/ARM64InstPrinter.h"
  18 #include "llvm/MC/MCCodeGenInfo.h"
  19 #include "llvm/MC/MCInstrInfo.h"
  20 #include "llvm/MC/MCRegisterInfo.h"
  21 #include "llvm/MC/MCStreamer.h"
  22 #include "llvm/MC/MCSubtargetInfo.h"
  23 #include "llvm/Support/ErrorHandling.h"
  24 #include "llvm/Support/TargetRegistry.h"
  25
  26 #define GET_INSTRINFO_MC_DESC
  27 #include "ARM64GenInstrInfo.inc"
  28
  29 #define GET_SUBTARGETINFO_MC_DESC
  30 #include "ARM64GenSubtargetInfo.inc"
  31
  32 #define GET_REGINFO_MC_DESC
  33 #include "ARM64GenRegisterInfo.inc"
  34
  35 using namespace llvm;
  36
  37 static MCInstrInfo *createARM64MCInstrInfo() {
  38   MCInstrInfo *X = new MCInstrInfo();
  39   InitARM64MCInstrInfo(X);
  40   return X;
  41 }
  42
  43 static MCSubtargetInfo *createARM64MCSubtargetInfo(StringRef TT, StringRef CPU,
  44                                                    StringRef FS) {
  45   MCSubtargetInfo *X = new MCSubtargetInfo();
  46
  47   if (CPU.empty())
  48     CPU = "generic";
  49
  50   InitARM64MCSubtargetInfo(X, TT, CPU, FS);
  51   return X;
  52 }
  53
  54 static MCRegisterInfo *createARM64MCRegisterInfo(StringRef Triple) {
  55   MCRegisterInfo *X = new MCRegisterInfo();
  56   InitARM64MCRegisterInfo(X, ARM64::LR);
  57   return X;
  58 }
  59
  60 static MCAsmInfo *createARM64MCAsmInfo(const MCRegisterInfo &MRI,
  61                                        StringRef TT) {
  62   Triple TheTriple(TT);
  63
  64   MCAsmInfo *MAI;
  65   if (TheTriple.isOSDarwin())
  66     MAI = new ARM64MCAsmInfoDarwin();
  67   else {
  68     assert(TheTriple.isOSBinFormatELF() && "Only expect Darwin or ELF");
  69     MAI = new ARM64MCAsmInfoELF();
  70   }
  71
  72   // Initial state of the frame pointer is SP.
  73   unsigned Reg = MRI.getDwarfRegNum(ARM64::SP, true);
  74   MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(0, Reg, 0);
  75   MAI->addInitialFrameState(Inst);
  76
  77   return MAI;
  78 }
  79
  80 static MCCodeGenInfo *createARM64MCCodeGenInfo(StringRef TT, Reloc::Model RM,
  81                                                CodeModel::Model CM,
  82                                                CodeGenOpt::Level OL) {
  83   Triple TheTriple(TT);
  84   assert((TheTriple.isOSBinFormatELF() || TheTriple.isOSBinFormatMachO()) &&
  85          "Only expect Darwin and ELF targets");
  86
  87   if (CM == CodeModel::Default)
  88     CM = CodeModel::Small;
  89   // The default MCJIT memory managers make no guarantees about where they can
  90   // find an executable page; JITed code needs to be able to refer to globals
  91   // no matter how far away they are.
  92   else if (CM == CodeModel::JITDefault)
  93     CM = CodeModel::Large;
  94   else if (CM != CodeModel::Small && CM != CodeModel::Large)
  95     report_fatal_error("Only small and large code models are allowed on ARM64");
  96
  97   // ARM64 Darwin is always PIC.
  98   if (TheTriple.isOSDarwin())
  99     RM = Reloc::PIC_;
 100   // On ELF platforms the default static relocation model has a smart enough
 101   // linker to cope with referencing external symbols defined in a shared
 102   // library. Hence DynamicNoPIC doesn't need to be promoted to PIC.
 103   else if (RM == Reloc::Default || RM == Reloc::DynamicNoPIC)
 104     RM = Reloc::Static;
 105
 106   MCCodeGenInfo *X = new MCCodeGenInfo();
 107   X->InitMCCodeGenInfo(RM, CM, OL);
 108   return X;
 109 }
 110
 111 static MCInstPrinter *createARM64MCInstPrinter(const Target &T,
 112                                                unsigned SyntaxVariant,
 113                                                const MCAsmInfo &MAI,
 114                                                const MCInstrInfo &MII,
 115                                                const MCRegisterInfo &MRI,
 116                                                const MCSubtargetInfo &STI) {
 117   if (SyntaxVariant == 0)
 118     return new ARM64InstPrinter(MAI, MII, MRI, STI);
 119   if (SyntaxVariant == 1)
 120     return new ARM64AppleInstPrinter(MAI, MII, MRI, STI);
 121
 122   return 0;
 123 }
 124
 125 static MCStreamer *createMCStreamer(const Target &T, StringRef TT,
 126                                     MCContext &Ctx, MCAsmBackend &TAB,
 127                                     raw_ostream &OS, MCCodeEmitter *Emitter,
 128                                     const MCSubtargetInfo &STI, bool RelaxAll,
 129                                     bool NoExecStack) {
 130   Triple TheTriple(TT);
 131
 132   if (TheTriple.isOSDarwin())
 133     return createMachOStreamer(Ctx, TAB, OS, Emitter, RelaxAll,
 134                                /*LabelSections*/ true);
 135
 136   return createARM64ELFStreamer(Ctx, TAB, OS, Emitter, RelaxAll, NoExecStack);
 137 }
 138
 139 // Force static initialization.
 140 extern "C" void LLVMInitializeARM64TargetMC() {
 141   // Register the MC asm info.
 142   RegisterMCAsmInfoFn X(TheARM64Target, createARM64MCAsmInfo);
 143
 144   // Register the MC codegen info.
 145   TargetRegistry::RegisterMCCodeGenInfo(TheARM64Target,
 146                                         createARM64MCCodeGenInfo);
 147
 148   // Register the MC instruction info.
 149   TargetRegistry::RegisterMCInstrInfo(TheARM64Target, createARM64MCInstrInfo);
 150
 151   // Register the MC register info.
 152   TargetRegistry::RegisterMCRegInfo(TheARM64Target, createARM64MCRegisterInfo);
 153
 154   // Register the MC subtarget info.
 155   TargetRegistry::RegisterMCSubtargetInfo(TheARM64Target,
 156                                           createARM64MCSubtargetInfo);
 157
 158   // Register the asm backend.
 159   TargetRegistry::RegisterMCAsmBackend(TheARM64Target, createARM64AsmBackend);
 160
 161   // Register the MC Code Emitter
 162   TargetRegistry::RegisterMCCodeEmitter(TheARM64Target,
 163                                         createARM64MCCodeEmitter);
 164
 165   // Register the object streamer.
 166   TargetRegistry::RegisterMCObjectStreamer(TheARM64Target, createMCStreamer);
 167
 168   // Register the MCInstPrinter.
 169   TargetRegistry::RegisterMCInstPrinter(TheARM64Target,
 170                                         createARM64MCInstPrinter);
 171 }