1 //===-- ARMTargetMachine.h - Define TargetMachine for ARM -------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the ARM specific subclass of TargetMachine.
12 //===----------------------------------------------------------------------===//
14 #ifndef ARMTARGETMACHINE_H
15 #define ARMTARGETMACHINE_H
17 #include "llvm/Target/TargetMachine.h"
18 #include "llvm/Target/TargetData.h"
19 #include "llvm/Target/TargetFrameInfo.h"
20 #include "ARMInstrInfo.h"
21 #include "ARMFrameInfo.h"
22 #include "ARMJITInfo.h"
23 #include "ARMSubtarget.h"
24 #include "ARMISelLowering.h"
25 #include "Thumb1InstrInfo.h"
26 #include "Thumb2InstrInfo.h"
32 class ARMBaseTargetMachine : public LLVMTargetMachine {
34 ARMSubtarget Subtarget;
37 ARMFrameInfo FrameInfo;
39 InstrItineraryData InstrItins;
40 Reloc::Model DefRelocModel; // Reloc model before it's overridden.
43 // To avoid having target depend on the asmprinter stuff libraries, asmprinter
44 // set this functions to ctor pointer at startup time if they are linked in.
45 typedef FunctionPass *(*AsmPrinterCtorFn)(raw_ostream &o,
46 ARMBaseTargetMachine &tm,
48 static AsmPrinterCtorFn AsmPrinterCtor;
51 ARMBaseTargetMachine(const Module &M, const std::string &FS, bool isThumb);
53 virtual const ARMFrameInfo *getFrameInfo() const { return &FrameInfo; }
54 virtual ARMJITInfo *getJITInfo() { return &JITInfo; }
55 virtual const ARMSubtarget *getSubtargetImpl() const { return &Subtarget; }
56 virtual const InstrItineraryData getInstrItineraryData() const {
60 static void registerAsmPrinter(AsmPrinterCtorFn F) {
64 static unsigned getModuleMatchQuality(const Module &M);
65 static unsigned getJITMatchQuality();
67 virtual const TargetAsmInfo *createTargetAsmInfo() const;
69 // Pass Pipeline Configuration
70 virtual bool addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
71 virtual bool addPreRegAlloc(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
72 virtual bool addPreEmitPass(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
73 virtual bool addAssemblyEmitter(PassManagerBase &PM,
74 CodeGenOpt::Level OptLevel,
75 bool Verbose, raw_ostream &Out);
76 virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel,
77 bool DumpAsm, MachineCodeEmitter &MCE);
78 virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel,
79 bool DumpAsm, JITCodeEmitter &MCE);
80 virtual bool addSimpleCodeEmitter(PassManagerBase &PM,
81 CodeGenOpt::Level OptLevel,
83 MachineCodeEmitter &MCE);
84 virtual bool addSimpleCodeEmitter(PassManagerBase &PM,
85 CodeGenOpt::Level OptLevel,
90 /// ARMTargetMachine - ARM target machine.
92 class ARMTargetMachine : public ARMBaseTargetMachine {
93 ARMInstrInfo InstrInfo;
94 const TargetData DataLayout; // Calculates type size & alignment
95 ARMTargetLowering TLInfo;
97 ARMTargetMachine(const Module &M, const std::string &FS);
99 virtual const ARMRegisterInfo *getRegisterInfo() const {
100 return &InstrInfo.getRegisterInfo();
103 virtual ARMTargetLowering *getTargetLowering() const {
104 return const_cast<ARMTargetLowering*>(&TLInfo);
107 virtual const ARMInstrInfo *getInstrInfo() const { return &InstrInfo; }
108 virtual const TargetData *getTargetData() const { return &DataLayout; }
110 static unsigned getJITMatchQuality();
111 static unsigned getModuleMatchQuality(const Module &M);
114 /// ThumbTargetMachine - Thumb target machine.
115 /// Due to the way architectures are handled, this represents both
116 /// Thumb-1 and Thumb-2.
118 class ThumbTargetMachine : public ARMBaseTargetMachine {
119 ARMBaseInstrInfo *InstrInfo; // either Thumb1InstrInfo or Thumb2InstrInfo
120 const TargetData DataLayout; // Calculates type size & alignment
121 ARMTargetLowering TLInfo;
123 ThumbTargetMachine(const Module &M, const std::string &FS);
125 /// returns either Thumb1RegisterInfo of Thumb2RegisterInfo
126 virtual const ARMBaseRegisterInfo *getRegisterInfo() const {
127 return &InstrInfo->getRegisterInfo();
130 virtual ARMTargetLowering *getTargetLowering() const {
131 return const_cast<ARMTargetLowering*>(&TLInfo);
134 /// returns either Thumb1InstrInfo or Thumb2InstrInfo
135 virtual const ARMBaseInstrInfo *getInstrInfo() const { return InstrInfo; }
136 virtual const TargetData *getTargetData() const { return &DataLayout; }
138 static unsigned getJITMatchQuality();
139 static unsigned getModuleMatchQuality(const Module &M);
142 } // end namespace llvm