lib/Target/ARM/ARMRegisterInfo.h

   1 //===- ARMRegisterInfo.h - ARM Register Information Impl --------*- C++ -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file contains the ARM implementation of the MRegisterInfo class.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #ifndef ARMREGISTERINFO_H
  15 #define ARMREGISTERINFO_H
  16
  17 #include "llvm/Target/MRegisterInfo.h"
  18 #include "ARMGenRegisterInfo.h.inc"
  19
  20 namespace llvm {
  21   class ARMSubtarget;
  22   class TargetInstrInfo;
  23   class Type;
  24
  25 struct ARMRegisterInfo : public ARMGenRegisterInfo {
  26   const TargetInstrInfo &TII;
  27   const ARMSubtarget &STI;
  28 private:
  29   /// FramePtr - ARM physical register used as frame ptr.
  30   unsigned FramePtr;
  31
  32 public:
  33   ARMRegisterInfo(const TargetInstrInfo &tii, const ARMSubtarget &STI);
  34
  35   /// getRegisterNumbering - Given the enum value for some register, e.g.
  36   /// ARM::LR, return the number that it corresponds to (e.g. 14).
  37   static unsigned getRegisterNumbering(unsigned RegEnum);
  38
  39   /// Code Generation virtual methods...
  40   bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
  41                                  MachineBasicBlock::iterator MI,
  42                                  const std::vector<CalleeSavedInfo> &CSI) const;
  43
  44   bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
  45                                    MachineBasicBlock::iterator MI,
  46                                  const std::vector<CalleeSavedInfo> &CSI) const;
  47
  48   void storeRegToStackSlot(MachineBasicBlock &MBB,
  49                            MachineBasicBlock::iterator MBBI,
  50                            unsigned SrcReg, bool isKill, int FrameIndex,
  51                            const TargetRegisterClass *RC) const;
  52
  53   void storeRegToAddr(MachineFunction &MF, unsigned SrcReg, bool isKill,
  54                       SmallVectorImpl<MachineOperand> &Addr,
  55                       const TargetRegisterClass *RC,
  56                       SmallVectorImpl<MachineInstr*> &NewMIs) const;
  57
  58   void loadRegFromStackSlot(MachineBasicBlock &MBB,
  59                             MachineBasicBlock::iterator MBBI,
  60                             unsigned DestReg, int FrameIndex,
  61                             const TargetRegisterClass *RC) const;
  62
  63   void loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
  64                        SmallVectorImpl<MachineOperand> &Addr,
  65                        const TargetRegisterClass *RC,
  66                        SmallVectorImpl<MachineInstr*> &NewMIs) const;
  67
  68   void copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
  69                     unsigned DestReg, unsigned SrcReg,
  70                     const TargetRegisterClass *DestRC,
  71                     const TargetRegisterClass *SrcRC) const;
  72
  73   void reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
  74                      unsigned DestReg, const MachineInstr *Orig) const;
  75
  76   MachineInstr* foldMemoryOperand(MachineInstr* MI,
  77                                   SmallVectorImpl<unsigned> &Ops,
  78                                   int FrameIndex) const;
  79
  80   MachineInstr* foldMemoryOperand(MachineInstr* MI,
  81                                   SmallVectorImpl<unsigned> &Ops,
  82                                   MachineInstr* LoadMI) const {
  83     return 0;
  84   }
  85
  86   bool canFoldMemoryOperand(MachineInstr *MI,
  87                             SmallVectorImpl<unsigned> &Ops) const;
  88
  89   const unsigned *getCalleeSavedRegs(const MachineFunction *MF = 0) const;
  90
  91   const TargetRegisterClass* const*
  92   getCalleeSavedRegClasses(const MachineFunction *MF = 0) const;
  93
  94   BitVector getReservedRegs(const MachineFunction &MF) const;
  95
  96   bool isReservedReg(const MachineFunction &MF, unsigned Reg) const;
  97
  98   bool requiresRegisterScavenging(const MachineFunction &MF) const;
  99
 100   bool hasFP(const MachineFunction &MF) const;
 101
 102   bool hasReservedCallFrame(MachineFunction &MF) const;
 103
 104   void eliminateCallFramePseudoInstr(MachineFunction &MF,
 105                                      MachineBasicBlock &MBB,
 106                                      MachineBasicBlock::iterator I) const;
 107
 108   void eliminateFrameIndex(MachineBasicBlock::iterator II,
 109                            int SPAdj, RegScavenger *RS = NULL) const;
 110
 111   void processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
 112                                             RegScavenger *RS = NULL) const;
 113
 114   void emitPrologue(MachineFunction &MF) const;
 115   void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
 116
 117   // Debug information queries.
 118   unsigned getRARegister() const;
 119   unsigned getFrameRegister(MachineFunction &MF) const;
 120
 121   // Exception handling queries.
 122   unsigned getEHExceptionRegister() const;
 123   unsigned getEHHandlerRegister() const;
 124
 125   int getDwarfRegNum(unsigned RegNum, bool isEH) const;
 126 };
 127
 128 } // end namespace llvm
 129
 130 #endif