lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp

   1 //===-- AMDGPUBaseInfo.cpp - AMDGPU Base encoding information--------------===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 #include "AMDGPUBaseInfo.h"
  10 #include "AMDGPU.h"
  11 #include "llvm/IR/LLVMContext.h"
  12 #include "llvm/IR/Function.h"
  13 #include "llvm/IR/GlobalValue.h"
  14 #include "llvm/MC/MCContext.h"
  15 #include "llvm/MC/MCSectionELF.h"
  16 #include "llvm/MC/SubtargetFeature.h"
  17
  18 #define GET_SUBTARGETINFO_ENUM
  19 #include "AMDGPUGenSubtargetInfo.inc"
  20 #undef GET_SUBTARGETINFO_ENUM
  21
  22 namespace llvm {
  23 namespace AMDGPU {
  24
  25 IsaVersion getIsaVersion(const FeatureBitset &Features) {
  26
  27   if (Features.test(FeatureISAVersion7_0_0))
  28     return {7, 0, 0};
  29
  30   if (Features.test(FeatureISAVersion7_0_1))
  31     return {7, 0, 1};
  32
  33   if (Features.test(FeatureISAVersion8_0_0))
  34     return {8, 0, 0};
  35
  36   if (Features.test(FeatureISAVersion8_0_1))
  37     return {8, 0, 1};
  38
  39   return {0, 0, 0};
  40 }
  41
  42 void initDefaultAMDKernelCodeT(amd_kernel_code_t &Header,
  43                                const FeatureBitset &Features) {
  44
  45   IsaVersion ISA = getIsaVersion(Features);
  46
  47   memset(&Header, 0, sizeof(Header));
  48
  49   Header.amd_kernel_code_version_major = 1;
  50   Header.amd_kernel_code_version_minor = 0;
  51   Header.amd_machine_kind = 1; // AMD_MACHINE_KIND_AMDGPU
  52   Header.amd_machine_version_major = ISA.Major;
  53   Header.amd_machine_version_minor = ISA.Minor;
  54   Header.amd_machine_version_stepping = ISA.Stepping;
  55   Header.kernel_code_entry_byte_offset = sizeof(Header);
  56   // wavefront_size is specified as a power of 2: 2^6 = 64 threads.
  57   Header.wavefront_size = 6;
  58   // These alignment values are specified in powers of two, so alignment =
  59   // 2^n.  The minimum alignment is 2^4 = 16.
  60   Header.kernarg_segment_alignment = 4;
  61   Header.group_segment_alignment = 4;
  62   Header.private_segment_alignment = 4;
  63 }
  64
  65 MCSection *getHSATextSection(MCContext &Ctx) {
  66   return Ctx.getELFSection(".hsatext", ELF::SHT_PROGBITS,
  67                            ELF::SHF_ALLOC | ELF::SHF_WRITE |
  68                            ELF::SHF_EXECINSTR |
  69                            ELF::SHF_AMDGPU_HSA_AGENT |
  70                            ELF::SHF_AMDGPU_HSA_CODE);
  71 }
  72
  73 MCSection *getHSADataGlobalAgentSection(MCContext &Ctx) {
  74   return Ctx.getELFSection(".hsadata_global_agent", ELF::SHT_PROGBITS,
  75                            ELF::SHF_ALLOC | ELF::SHF_WRITE |
  76                            ELF::SHF_AMDGPU_HSA_GLOBAL |
  77                            ELF::SHF_AMDGPU_HSA_AGENT);
  78 }
  79
  80 MCSection *getHSADataGlobalProgramSection(MCContext &Ctx) {
  81   return  Ctx.getELFSection(".hsadata_global_program", ELF::SHT_PROGBITS,
  82                             ELF::SHF_ALLOC | ELF::SHF_WRITE |
  83                             ELF::SHF_AMDGPU_HSA_GLOBAL);
  84 }
  85
  86 MCSection *getHSARodataReadonlyAgentSection(MCContext &Ctx) {
  87   return Ctx.getELFSection(".hsarodata_readonly_agent", ELF::SHT_PROGBITS,
  88                            ELF::SHF_ALLOC | ELF::SHF_AMDGPU_HSA_READONLY |
  89                            ELF::SHF_AMDGPU_HSA_AGENT);
  90 }
  91
  92 bool isGroupSegment(const GlobalValue *GV) {
  93   return GV->getType()->getAddressSpace() == AMDGPUAS::LOCAL_ADDRESS;
  94 }
  95
  96 bool isGlobalSegment(const GlobalValue *GV) {
  97   return GV->getType()->getAddressSpace() == AMDGPUAS::GLOBAL_ADDRESS;
  98 }
  99
 100 bool isReadOnlySegment(const GlobalValue *GV) {
 101   return GV->getType()->getAddressSpace() == AMDGPUAS::CONSTANT_ADDRESS;
 102 }
 103
 104 static const char ShaderTypeAttribute[] = "ShaderType";
 105
 106 unsigned getShaderType(const Function &F) {
 107   Attribute A = F.getFnAttribute(ShaderTypeAttribute);
 108   unsigned ShaderType = ShaderType::COMPUTE;
 109
 110   if (A.isStringAttribute()) {
 111     StringRef Str = A.getValueAsString();
 112     if (Str.getAsInteger(0, ShaderType)) {
 113       LLVMContext &Ctx = F.getContext();
 114       Ctx.emitError("can't parse shader type");
 115     }
 116   }
 117   return ShaderType;
 118 }
 119
 120 } // End namespace AMDGPU
 121 } // End namespace llvm