1 //===-- AMDGPUInstrInfo.td - AMDGPU DAG nodes --------------*- tablegen -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains DAG node defintions for the AMDGPU target.
12 //===----------------------------------------------------------------------===//
14 //===----------------------------------------------------------------------===//
15 // AMDGPU DAG Profiles
16 //===----------------------------------------------------------------------===//
18 def AMDGPUDTIntTernaryOp : SDTypeProfile<1, 3, [
19 SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>, SDTCisInt<0>, SDTCisInt<3>
22 //===----------------------------------------------------------------------===//
26 // out = ((a << 32) | b) >> c)
28 // Can be used to optimize rtol:
29 // rotl(a, b) = bitalign(a, a, 32 - b)
30 def AMDGPUbitalign : SDNode<"AMDGPUISD::BITALIGN", AMDGPUDTIntTernaryOp>;
33 def AMDGPUfract : SDNode<"AMDGPUISD::FRACT", SDTFPUnaryOp>;
35 // out = max(a, b) a and b are floats
36 def AMDGPUfmax : SDNode<"AMDGPUISD::FMAX", SDTFPBinOp,
37 [SDNPCommutative, SDNPAssociative]
40 // out = max(a, b) a and b are signed ints
41 def AMDGPUsmax : SDNode<"AMDGPUISD::SMAX", SDTIntBinOp,
42 [SDNPCommutative, SDNPAssociative]
45 // out = max(a, b) a and b are unsigned ints
46 def AMDGPUumax : SDNode<"AMDGPUISD::UMAX", SDTIntBinOp,
47 [SDNPCommutative, SDNPAssociative]
50 // out = min(a, b) a and b are floats
51 def AMDGPUfmin : SDNode<"AMDGPUISD::FMIN", SDTFPBinOp,
52 [SDNPCommutative, SDNPAssociative]
55 // out = min(a, b) a snd b are signed ints
56 def AMDGPUsmin : SDNode<"AMDGPUISD::SMIN", SDTIntBinOp,
57 [SDNPCommutative, SDNPAssociative]
60 // out = min(a, b) a and b are unsigned ints
61 def AMDGPUumin : SDNode<"AMDGPUISD::UMIN", SDTIntBinOp,
62 [SDNPCommutative, SDNPAssociative]
65 // urecip - This operation is a helper for integer division, it returns the
66 // result of 1 / a as a fractional unsigned integer.
67 // out = (2^32 / a) + e
68 // e is rounding error
69 def AMDGPUurecip : SDNode<"AMDGPUISD::URECIP", SDTIntUnaryOp>;