1 //===-- TailDuplication.cpp - Duplicate blocks into predecessors' tails ---===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This pass duplicates basic blocks ending in unconditional branches into
11 // the tails of their predecessors.
13 //===----------------------------------------------------------------------===//
15 #define DEBUG_TYPE "tailduplication"
16 #include "llvm/Function.h"
17 #include "llvm/CodeGen/Passes.h"
18 #include "llvm/CodeGen/MachineModuleInfo.h"
19 #include "llvm/CodeGen/MachineFunctionPass.h"
20 #include "llvm/CodeGen/MachineInstrBuilder.h"
21 #include "llvm/CodeGen/MachineRegisterInfo.h"
22 #include "llvm/CodeGen/MachineSSAUpdater.h"
23 #include "llvm/Target/TargetInstrInfo.h"
24 #include "llvm/Support/CommandLine.h"
25 #include "llvm/Support/Debug.h"
26 #include "llvm/Support/ErrorHandling.h"
27 #include "llvm/Support/raw_ostream.h"
28 #include "llvm/ADT/SmallSet.h"
29 #include "llvm/ADT/SetVector.h"
30 #include "llvm/ADT/Statistic.h"
33 STATISTIC(NumTails , "Number of tails duplicated");
34 STATISTIC(NumTailDups , "Number of tail duplicated blocks");
35 STATISTIC(NumInstrDups , "Additional instructions due to tail duplication");
36 STATISTIC(NumDeadBlocks, "Number of dead blocks removed");
37 STATISTIC(NumAddedPHIs , "Number of phis added");
39 // Heuristic for tail duplication.
40 static cl::opt<unsigned>
41 TailDuplicateSize("tail-dup-size",
42 cl::desc("Maximum instructions to consider tail duplicating"),
43 cl::init(2), cl::Hidden);
46 TailDupVerify("tail-dup-verify",
47 cl::desc("Verify sanity of PHI instructions during taildup"),
48 cl::init(false), cl::Hidden);
50 static cl::opt<unsigned>
51 TailDupLimit("tail-dup-limit", cl::init(~0U), cl::Hidden);
53 typedef std::vector<std::pair<MachineBasicBlock*,unsigned> > AvailableValsTy;
56 /// TailDuplicatePass - Perform tail duplication.
57 class TailDuplicatePass : public MachineFunctionPass {
59 const TargetInstrInfo *TII;
60 MachineModuleInfo *MMI;
61 MachineRegisterInfo *MRI;
63 // SSAUpdateVRs - A list of virtual registers for which to update SSA form.
64 SmallVector<unsigned, 16> SSAUpdateVRs;
66 // SSAUpdateVals - For each virtual register in SSAUpdateVals keep a list of
67 // source virtual registers.
68 DenseMap<unsigned, AvailableValsTy> SSAUpdateVals;
72 explicit TailDuplicatePass(bool PreRA) :
73 MachineFunctionPass(ID), PreRegAlloc(PreRA) {}
75 virtual bool runOnMachineFunction(MachineFunction &MF);
76 virtual const char *getPassName() const { return "Tail Duplication"; }
79 void AddSSAUpdateEntry(unsigned OrigReg, unsigned NewReg,
80 MachineBasicBlock *BB);
81 void ProcessPHI(MachineInstr *MI, MachineBasicBlock *TailBB,
82 MachineBasicBlock *PredBB,
83 DenseMap<unsigned, unsigned> &LocalVRMap,
84 SmallVector<std::pair<unsigned,unsigned>, 4> &Copies);
85 void DuplicateInstruction(MachineInstr *MI,
86 MachineBasicBlock *TailBB,
87 MachineBasicBlock *PredBB,
89 DenseMap<unsigned, unsigned> &LocalVRMap);
90 void UpdateSuccessorsPHIs(MachineBasicBlock *FromBB, bool isDead,
91 SmallVector<MachineBasicBlock*, 8> &TDBBs,
92 SmallSetVector<MachineBasicBlock*, 8> &Succs);
93 bool TailDuplicateBlocks(MachineFunction &MF);
94 bool shouldTailDuplicate(const MachineFunction &MF,
95 MachineBasicBlock &TailBB);
96 bool TailDuplicate(MachineBasicBlock *TailBB, MachineFunction &MF,
97 SmallVector<MachineBasicBlock*, 8> &TDBBs,
98 SmallVector<MachineInstr*, 16> &Copies);
99 void RemoveDeadBlock(MachineBasicBlock *MBB);
102 char TailDuplicatePass::ID = 0;
105 FunctionPass *llvm::createTailDuplicatePass(bool PreRegAlloc) {
106 return new TailDuplicatePass(PreRegAlloc);
109 bool TailDuplicatePass::runOnMachineFunction(MachineFunction &MF) {
110 TII = MF.getTarget().getInstrInfo();
111 MRI = &MF.getRegInfo();
112 MMI = getAnalysisIfAvailable<MachineModuleInfo>();
114 bool MadeChange = false;
115 while (TailDuplicateBlocks(MF))
121 static void VerifyPHIs(MachineFunction &MF, bool CheckExtra) {
122 for (MachineFunction::iterator I = ++MF.begin(), E = MF.end(); I != E; ++I) {
123 MachineBasicBlock *MBB = I;
124 SmallSetVector<MachineBasicBlock*, 8> Preds(MBB->pred_begin(),
126 MachineBasicBlock::iterator MI = MBB->begin();
127 while (MI != MBB->end()) {
130 for (SmallSetVector<MachineBasicBlock *, 8>::iterator PI = Preds.begin(),
131 PE = Preds.end(); PI != PE; ++PI) {
132 MachineBasicBlock *PredBB = *PI;
134 for (unsigned i = 1, e = MI->getNumOperands(); i != e; i += 2) {
135 MachineBasicBlock *PHIBB = MI->getOperand(i+1).getMBB();
136 if (PHIBB == PredBB) {
142 dbgs() << "Malformed PHI in BB#" << MBB->getNumber() << ": " << *MI;
143 dbgs() << " missing input from predecessor BB#"
144 << PredBB->getNumber() << '\n';
149 for (unsigned i = 1, e = MI->getNumOperands(); i != e; i += 2) {
150 MachineBasicBlock *PHIBB = MI->getOperand(i+1).getMBB();
151 if (CheckExtra && !Preds.count(PHIBB)) {
152 // This is not a hard error.
153 dbgs() << "Warning: malformed PHI in BB#" << MBB->getNumber()
155 dbgs() << " extra input from predecessor BB#"
156 << PHIBB->getNumber() << '\n';
158 if (PHIBB->getNumber() < 0) {
159 dbgs() << "Malformed PHI in BB#" << MBB->getNumber() << ": " << *MI;
160 dbgs() << " non-existing BB#" << PHIBB->getNumber() << '\n';
169 /// TailDuplicateBlocks - Look for small blocks that are unconditionally
170 /// branched to and do not fall through. Tail-duplicate their instructions
171 /// into their predecessors to eliminate (dynamic) branches.
172 bool TailDuplicatePass::TailDuplicateBlocks(MachineFunction &MF) {
173 bool MadeChange = false;
175 if (PreRegAlloc && TailDupVerify) {
176 DEBUG(dbgs() << "\n*** Before tail-duplicating\n");
177 VerifyPHIs(MF, true);
180 SmallVector<MachineInstr*, 8> NewPHIs;
181 MachineSSAUpdater SSAUpdate(MF, &NewPHIs);
183 for (MachineFunction::iterator I = ++MF.begin(), E = MF.end(); I != E; ) {
184 MachineBasicBlock *MBB = I++;
186 if (NumTails == TailDupLimit)
189 // Save the successors list.
190 SmallSetVector<MachineBasicBlock*, 8> Succs(MBB->succ_begin(),
193 SmallVector<MachineBasicBlock*, 8> TDBBs;
194 SmallVector<MachineInstr*, 16> Copies;
195 if (TailDuplicate(MBB, MF, TDBBs, Copies)) {
198 // TailBB's immediate successors are now successors of those predecessors
199 // which duplicated TailBB. Add the predecessors as sources to the PHI
201 bool isDead = MBB->pred_empty();
203 UpdateSuccessorsPHIs(MBB, isDead, TDBBs, Succs);
205 // If it is dead, remove it.
207 NumInstrDups -= MBB->size();
208 RemoveDeadBlock(MBB);
213 if (!SSAUpdateVRs.empty()) {
214 for (unsigned i = 0, e = SSAUpdateVRs.size(); i != e; ++i) {
215 unsigned VReg = SSAUpdateVRs[i];
216 SSAUpdate.Initialize(VReg);
218 // If the original definition is still around, add it as an available
220 MachineInstr *DefMI = MRI->getVRegDef(VReg);
221 MachineBasicBlock *DefBB = 0;
223 DefBB = DefMI->getParent();
224 SSAUpdate.AddAvailableValue(DefBB, VReg);
227 // Add the new vregs as available values.
228 DenseMap<unsigned, AvailableValsTy>::iterator LI =
229 SSAUpdateVals.find(VReg);
230 for (unsigned j = 0, ee = LI->second.size(); j != ee; ++j) {
231 MachineBasicBlock *SrcBB = LI->second[j].first;
232 unsigned SrcReg = LI->second[j].second;
233 SSAUpdate.AddAvailableValue(SrcBB, SrcReg);
236 // Rewrite uses that are outside of the original def's block.
237 MachineRegisterInfo::use_iterator UI = MRI->use_begin(VReg);
238 while (UI != MRI->use_end()) {
239 MachineOperand &UseMO = UI.getOperand();
240 MachineInstr *UseMI = &*UI;
242 if (UseMI->getParent() == DefBB && !UseMI->isPHI())
244 SSAUpdate.RewriteUse(UseMO);
248 SSAUpdateVRs.clear();
249 SSAUpdateVals.clear();
252 // Eliminate some of the copies inserted by tail duplication to maintain
254 for (unsigned i = 0, e = Copies.size(); i != e; ++i) {
255 MachineInstr *Copy = Copies[i];
258 unsigned Dst = Copy->getOperand(0).getReg();
259 unsigned Src = Copy->getOperand(1).getReg();
260 MachineRegisterInfo::use_iterator UI = MRI->use_begin(Src);
261 if (++UI == MRI->use_end()) {
262 // Copy is the only use. Do trivial copy propagation here.
263 MRI->replaceRegWith(Dst, Src);
264 Copy->eraseFromParent();
268 if (PreRegAlloc && TailDupVerify)
269 VerifyPHIs(MF, false);
273 NumAddedPHIs += NewPHIs.size();
278 static bool isDefLiveOut(unsigned Reg, MachineBasicBlock *BB,
279 const MachineRegisterInfo *MRI) {
280 for (MachineRegisterInfo::use_iterator UI = MRI->use_begin(Reg),
281 UE = MRI->use_end(); UI != UE; ++UI) {
282 MachineInstr *UseMI = &*UI;
283 if (UseMI->getParent() != BB)
289 static unsigned getPHISrcRegOpIdx(MachineInstr *MI, MachineBasicBlock *SrcBB) {
290 for (unsigned i = 1, e = MI->getNumOperands(); i != e; i += 2)
291 if (MI->getOperand(i+1).getMBB() == SrcBB)
296 /// AddSSAUpdateEntry - Add a definition and source virtual registers pair for
298 void TailDuplicatePass::AddSSAUpdateEntry(unsigned OrigReg, unsigned NewReg,
299 MachineBasicBlock *BB) {
300 DenseMap<unsigned, AvailableValsTy>::iterator LI= SSAUpdateVals.find(OrigReg);
301 if (LI != SSAUpdateVals.end())
302 LI->second.push_back(std::make_pair(BB, NewReg));
304 AvailableValsTy Vals;
305 Vals.push_back(std::make_pair(BB, NewReg));
306 SSAUpdateVals.insert(std::make_pair(OrigReg, Vals));
307 SSAUpdateVRs.push_back(OrigReg);
311 /// ProcessPHI - Process PHI node in TailBB by turning it into a copy in PredBB.
312 /// Remember the source register that's contributed by PredBB and update SSA
314 void TailDuplicatePass::ProcessPHI(MachineInstr *MI,
315 MachineBasicBlock *TailBB,
316 MachineBasicBlock *PredBB,
317 DenseMap<unsigned, unsigned> &LocalVRMap,
318 SmallVector<std::pair<unsigned,unsigned>, 4> &Copies) {
319 unsigned DefReg = MI->getOperand(0).getReg();
320 unsigned SrcOpIdx = getPHISrcRegOpIdx(MI, PredBB);
321 assert(SrcOpIdx && "Unable to find matching PHI source?");
322 unsigned SrcReg = MI->getOperand(SrcOpIdx).getReg();
323 const TargetRegisterClass *RC = MRI->getRegClass(DefReg);
324 LocalVRMap.insert(std::make_pair(DefReg, SrcReg));
326 // Insert a copy from source to the end of the block. The def register is the
327 // available value liveout of the block.
328 unsigned NewDef = MRI->createVirtualRegister(RC);
329 Copies.push_back(std::make_pair(NewDef, SrcReg));
330 if (isDefLiveOut(DefReg, TailBB, MRI))
331 AddSSAUpdateEntry(DefReg, NewDef, PredBB);
333 // Remove PredBB from the PHI node.
334 MI->RemoveOperand(SrcOpIdx+1);
335 MI->RemoveOperand(SrcOpIdx);
336 if (MI->getNumOperands() == 1)
337 MI->eraseFromParent();
340 /// DuplicateInstruction - Duplicate a TailBB instruction to PredBB and update
341 /// the source operands due to earlier PHI translation.
342 void TailDuplicatePass::DuplicateInstruction(MachineInstr *MI,
343 MachineBasicBlock *TailBB,
344 MachineBasicBlock *PredBB,
346 DenseMap<unsigned, unsigned> &LocalVRMap) {
347 MachineInstr *NewMI = TII->duplicate(MI, MF);
348 for (unsigned i = 0, e = NewMI->getNumOperands(); i != e; ++i) {
349 MachineOperand &MO = NewMI->getOperand(i);
352 unsigned Reg = MO.getReg();
353 if (!TargetRegisterInfo::isVirtualRegister(Reg))
356 const TargetRegisterClass *RC = MRI->getRegClass(Reg);
357 unsigned NewReg = MRI->createVirtualRegister(RC);
359 LocalVRMap.insert(std::make_pair(Reg, NewReg));
360 if (isDefLiveOut(Reg, TailBB, MRI))
361 AddSSAUpdateEntry(Reg, NewReg, PredBB);
363 DenseMap<unsigned, unsigned>::iterator VI = LocalVRMap.find(Reg);
364 if (VI != LocalVRMap.end())
365 MO.setReg(VI->second);
368 PredBB->insert(PredBB->end(), NewMI);
371 /// UpdateSuccessorsPHIs - After FromBB is tail duplicated into its predecessor
372 /// blocks, the successors have gained new predecessors. Update the PHI
373 /// instructions in them accordingly.
375 TailDuplicatePass::UpdateSuccessorsPHIs(MachineBasicBlock *FromBB, bool isDead,
376 SmallVector<MachineBasicBlock*, 8> &TDBBs,
377 SmallSetVector<MachineBasicBlock*,8> &Succs) {
378 for (SmallSetVector<MachineBasicBlock*, 8>::iterator SI = Succs.begin(),
379 SE = Succs.end(); SI != SE; ++SI) {
380 MachineBasicBlock *SuccBB = *SI;
381 for (MachineBasicBlock::iterator II = SuccBB->begin(), EE = SuccBB->end();
386 for (unsigned i = 1, e = II->getNumOperands(); i != e; i += 2) {
387 MachineOperand &MO = II->getOperand(i+1);
388 if (MO.getMBB() == FromBB) {
395 MachineOperand &MO0 = II->getOperand(Idx);
396 unsigned Reg = MO0.getReg();
398 // Folded into the previous BB.
399 // There could be duplicate phi source entries. FIXME: Should sdisel
400 // or earlier pass fixed this?
401 for (unsigned i = II->getNumOperands()-2; i != Idx; i -= 2) {
402 MachineOperand &MO = II->getOperand(i+1);
403 if (MO.getMBB() == FromBB) {
404 II->RemoveOperand(i+1);
405 II->RemoveOperand(i);
411 // If Idx is set, the operands at Idx and Idx+1 must be removed.
412 // We reuse the location to avoid expensive RemoveOperand calls.
414 DenseMap<unsigned,AvailableValsTy>::iterator LI=SSAUpdateVals.find(Reg);
415 if (LI != SSAUpdateVals.end()) {
416 // This register is defined in the tail block.
417 for (unsigned j = 0, ee = LI->second.size(); j != ee; ++j) {
418 MachineBasicBlock *SrcBB = LI->second[j].first;
419 unsigned SrcReg = LI->second[j].second;
421 II->getOperand(Idx).setReg(SrcReg);
422 II->getOperand(Idx+1).setMBB(SrcBB);
425 II->addOperand(MachineOperand::CreateReg(SrcReg, false));
426 II->addOperand(MachineOperand::CreateMBB(SrcBB));
430 // Live in tail block, must also be live in predecessors.
431 for (unsigned j = 0, ee = TDBBs.size(); j != ee; ++j) {
432 MachineBasicBlock *SrcBB = TDBBs[j];
434 II->getOperand(Idx).setReg(Reg);
435 II->getOperand(Idx+1).setMBB(SrcBB);
438 II->addOperand(MachineOperand::CreateReg(Reg, false));
439 II->addOperand(MachineOperand::CreateMBB(SrcBB));
444 II->RemoveOperand(Idx+1);
445 II->RemoveOperand(Idx);
451 /// shouldTailDuplicate - Determine if it is profitable to duplicate this block.
453 TailDuplicatePass::shouldTailDuplicate(const MachineFunction &MF,
454 MachineBasicBlock &TailBB) {
455 // Only duplicate blocks that end with unconditional branches.
456 if (TailBB.canFallThrough())
459 // Set the limit on the cost to duplicate. When optimizing for size,
460 // duplicate only one, because one branch instruction can be eliminated to
461 // compensate for the duplication.
462 unsigned MaxDuplicateCount;
463 if (TailDuplicateSize.getNumOccurrences() == 0 &&
464 MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize))
465 MaxDuplicateCount = 1;
467 MaxDuplicateCount = TailDuplicateSize;
472 const TargetInstrDesc &TID = TailBB.back().getDesc();
473 // Pre-regalloc tail duplication hurts compile time and doesn't help
474 // much except for indirect branches.
475 if (!TID.isIndirectBranch())
477 // If the target has hardware branch prediction that can handle indirect
478 // branches, duplicating them can often make them predictable when there
479 // are common paths through the code. The limit needs to be high enough
480 // to allow undoing the effects of tail merging and other optimizations
481 // that rearrange the predecessors of the indirect branch.
482 MaxDuplicateCount = 20;
485 // Don't try to tail-duplicate single-block loops.
486 if (TailBB.isSuccessor(&TailBB))
489 // Check the instructions in the block to determine whether tail-duplication
490 // is invalid or unlikely to be profitable.
491 unsigned InstrCount = 0;
492 bool HasCall = false;
493 for (MachineBasicBlock::const_iterator I = TailBB.begin(); I != TailBB.end();
495 // Non-duplicable things shouldn't be tail-duplicated.
496 if (I->getDesc().isNotDuplicable()) return false;
497 // Do not duplicate 'return' instructions if this is a pre-regalloc run.
498 // A return may expand into a lot more instructions (e.g. reload of callee
499 // saved registers) after PEI.
500 if (PreRegAlloc && I->getDesc().isReturn()) return false;
501 // Don't duplicate more than the threshold.
502 if (InstrCount == MaxDuplicateCount) return false;
503 // Remember if we saw a call.
504 if (I->getDesc().isCall()) HasCall = true;
505 if (!I->isPHI() && !I->isDebugValue())
508 // Don't tail-duplicate calls before register allocation. Calls presents a
509 // barrier to register allocation so duplicating them may end up increasing
511 if (InstrCount > 1 && (PreRegAlloc && HasCall))
517 /// TailDuplicate - If it is profitable, duplicate TailBB's contents in each
518 /// of its predecessors.
520 TailDuplicatePass::TailDuplicate(MachineBasicBlock *TailBB, MachineFunction &MF,
521 SmallVector<MachineBasicBlock*, 8> &TDBBs,
522 SmallVector<MachineInstr*, 16> &Copies) {
523 if (!shouldTailDuplicate(MF, *TailBB))
526 DEBUG(dbgs() << "\n*** Tail-duplicating BB#" << TailBB->getNumber() << '\n');
528 // Iterate through all the unique predecessors and tail-duplicate this
529 // block into them, if possible. Copying the list ahead of time also
530 // avoids trouble with the predecessor list reallocating.
531 bool Changed = false;
532 SmallSetVector<MachineBasicBlock*, 8> Preds(TailBB->pred_begin(),
534 for (SmallSetVector<MachineBasicBlock *, 8>::iterator PI = Preds.begin(),
535 PE = Preds.end(); PI != PE; ++PI) {
536 MachineBasicBlock *PredBB = *PI;
538 assert(TailBB != PredBB &&
539 "Single-block loop should have been rejected earlier!");
540 if (PredBB->succ_size() > 1) continue;
542 MachineBasicBlock *PredTBB, *PredFBB;
543 SmallVector<MachineOperand, 4> PredCond;
544 // EH edges are ignored by AnalyzeBranch.
545 if (PredBB->succ_size() != 1)
547 if (TII->AnalyzeBranch(*PredBB, PredTBB, PredFBB, PredCond, true))
549 if (!PredCond.empty())
551 // Don't duplicate into a fall-through predecessor (at least for now).
552 if (PredBB->isLayoutSuccessor(TailBB) && PredBB->canFallThrough())
555 DEBUG(dbgs() << "\nTail-duplicating into PredBB: " << *PredBB
556 << "From Succ: " << *TailBB);
558 TDBBs.push_back(PredBB);
560 // Remove PredBB's unconditional branch.
561 TII->RemoveBranch(*PredBB);
563 // Clone the contents of TailBB into PredBB.
564 DenseMap<unsigned, unsigned> LocalVRMap;
565 SmallVector<std::pair<unsigned,unsigned>, 4> CopyInfos;
566 MachineBasicBlock::iterator I = TailBB->begin();
567 while (I != TailBB->end()) {
568 MachineInstr *MI = &*I;
571 // Replace the uses of the def of the PHI with the register coming
573 ProcessPHI(MI, TailBB, PredBB, LocalVRMap, CopyInfos);
575 // Replace def of virtual registers with new registers, and update
576 // uses with PHI source register or the new registers.
577 DuplicateInstruction(MI, TailBB, PredBB, MF, LocalVRMap);
580 MachineBasicBlock::iterator Loc = PredBB->getFirstTerminator();
581 for (unsigned i = 0, e = CopyInfos.size(); i != e; ++i) {
582 Copies.push_back(BuildMI(*PredBB, Loc, DebugLoc(),
583 TII->get(TargetOpcode::COPY),
584 CopyInfos[i].first).addReg(CopyInfos[i].second));
586 NumInstrDups += TailBB->size() - 1; // subtract one for removed branch
589 PredBB->removeSuccessor(PredBB->succ_begin());
590 assert(PredBB->succ_empty() &&
591 "TailDuplicate called on block with multiple successors!");
592 for (MachineBasicBlock::succ_iterator I = TailBB->succ_begin(),
593 E = TailBB->succ_end(); I != E; ++I)
594 PredBB->addSuccessor(*I);
600 // If TailBB was duplicated into all its predecessors except for the prior
601 // block, which falls through unconditionally, move the contents of this
602 // block into the prior block.
603 MachineBasicBlock *PrevBB = prior(MachineFunction::iterator(TailBB));
604 MachineBasicBlock *PriorTBB = 0, *PriorFBB = 0;
605 SmallVector<MachineOperand, 4> PriorCond;
606 // This has to check PrevBB->succ_size() because EH edges are ignored by
608 if (PrevBB->succ_size() == 1 &&
609 !TII->AnalyzeBranch(*PrevBB, PriorTBB, PriorFBB, PriorCond, true) &&
610 PriorCond.empty() && !PriorTBB && TailBB->pred_size() == 1 &&
611 !TailBB->hasAddressTaken()) {
612 DEBUG(dbgs() << "\nMerging into block: " << *PrevBB
613 << "From MBB: " << *TailBB);
615 DenseMap<unsigned, unsigned> LocalVRMap;
616 SmallVector<std::pair<unsigned,unsigned>, 4> CopyInfos;
617 MachineBasicBlock::iterator I = TailBB->begin();
618 // Process PHI instructions first.
619 while (I != TailBB->end() && I->isPHI()) {
620 // Replace the uses of the def of the PHI with the register coming
622 MachineInstr *MI = &*I++;
623 ProcessPHI(MI, TailBB, PrevBB, LocalVRMap, CopyInfos);
625 MI->eraseFromParent();
628 // Now copy the non-PHI instructions.
629 while (I != TailBB->end()) {
630 // Replace def of virtual registers with new registers, and update
631 // uses with PHI source register or the new registers.
632 MachineInstr *MI = &*I++;
633 DuplicateInstruction(MI, TailBB, PrevBB, MF, LocalVRMap);
634 MI->eraseFromParent();
636 MachineBasicBlock::iterator Loc = PrevBB->getFirstTerminator();
637 for (unsigned i = 0, e = CopyInfos.size(); i != e; ++i) {
638 Copies.push_back(BuildMI(*PrevBB, Loc, DebugLoc(),
639 TII->get(TargetOpcode::COPY),
641 .addReg(CopyInfos[i].second));
644 // No PHIs to worry about, just splice the instructions over.
645 PrevBB->splice(PrevBB->end(), TailBB, TailBB->begin(), TailBB->end());
647 PrevBB->removeSuccessor(PrevBB->succ_begin());
648 assert(PrevBB->succ_empty());
649 PrevBB->transferSuccessors(TailBB);
650 TDBBs.push_back(PrevBB);
657 /// RemoveDeadBlock - Remove the specified dead machine basic block from the
658 /// function, updating the CFG.
659 void TailDuplicatePass::RemoveDeadBlock(MachineBasicBlock *MBB) {
660 assert(MBB->pred_empty() && "MBB must be dead!");
661 DEBUG(dbgs() << "\nRemoving MBB: " << *MBB);
663 // Remove all successors.
664 while (!MBB->succ_empty())
665 MBB->removeSuccessor(MBB->succ_end()-1);
668 MBB->eraseFromParent();