1 //===------- LegalizeVectorTypes.cpp - Legalization of vector types -------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file performs vector type splitting and scalarization for LegalizeTypes.
11 // Scalarization is the act of changing a computation in an illegal one-element
12 // vector type to be a computation in its scalar element type. For example,
13 // implementing <1 x f32> arithmetic in a scalar f32 register. This is needed
14 // as a base case when scalarizing vector arithmetic like <4 x f32>, which
15 // eventually decomposes to scalars if the target doesn't support v4f32 or v2f32
17 // Splitting is the act of changing a computation in an invalid vector type to
18 // be a computation in two vectors of half the size. For example, implementing
19 // <128 x f32> operations in terms of two <64 x f32> operations.
21 //===----------------------------------------------------------------------===//
23 #include "LegalizeTypes.h"
24 #include "llvm/Target/TargetData.h"
25 #include "llvm/Support/ErrorHandling.h"
26 #include "llvm/Support/raw_ostream.h"
29 //===----------------------------------------------------------------------===//
30 // Result Vector Scalarization: <1 x ty> -> ty.
31 //===----------------------------------------------------------------------===//
33 void DAGTypeLegalizer::ScalarizeVectorResult(SDNode *N, unsigned ResNo) {
34 DEBUG(dbgs() << "Scalarize node result " << ResNo << ": ";
37 SDValue R = SDValue();
39 switch (N->getOpcode()) {
42 dbgs() << "ScalarizeVectorResult #" << ResNo << ": ";
46 report_fatal_error("Do not know how to scalarize the result of this "
49 case ISD::MERGE_VALUES: R = ScalarizeVecRes_MERGE_VALUES(N, ResNo);break;
50 case ISD::BITCAST: R = ScalarizeVecRes_BITCAST(N); break;
51 case ISD::BUILD_VECTOR: R = N->getOperand(0); break;
52 case ISD::CONVERT_RNDSAT: R = ScalarizeVecRes_CONVERT_RNDSAT(N); break;
53 case ISD::EXTRACT_SUBVECTOR: R = ScalarizeVecRes_EXTRACT_SUBVECTOR(N); break;
54 case ISD::FP_ROUND: R = ScalarizeVecRes_FP_ROUND(N); break;
55 case ISD::FP_ROUND_INREG: R = ScalarizeVecRes_InregOp(N); break;
56 case ISD::FPOWI: R = ScalarizeVecRes_FPOWI(N); break;
57 case ISD::INSERT_VECTOR_ELT: R = ScalarizeVecRes_INSERT_VECTOR_ELT(N); break;
58 case ISD::LOAD: R = ScalarizeVecRes_LOAD(cast<LoadSDNode>(N));break;
59 case ISD::SCALAR_TO_VECTOR: R = ScalarizeVecRes_SCALAR_TO_VECTOR(N); break;
60 case ISD::SIGN_EXTEND_INREG: R = ScalarizeVecRes_InregOp(N); break;
61 case ISD::VSELECT: R = ScalarizeVecRes_VSELECT(N); break;
62 case ISD::SELECT: R = ScalarizeVecRes_SELECT(N); break;
63 case ISD::SELECT_CC: R = ScalarizeVecRes_SELECT_CC(N); break;
64 case ISD::SETCC: R = ScalarizeVecRes_SETCC(N); break;
65 case ISD::UNDEF: R = ScalarizeVecRes_UNDEF(N); break;
66 case ISD::VECTOR_SHUFFLE: R = ScalarizeVecRes_VECTOR_SHUFFLE(N); break;
89 case ISD::SIGN_EXTEND:
93 case ISD::ZERO_EXTEND:
94 R = ScalarizeVecRes_UnaryOp(N);
116 R = ScalarizeVecRes_BinOp(N);
119 R = ScalarizeVecRes_TernaryOp(N);
123 // If R is null, the sub-method took care of registering the result.
125 SetScalarizedVector(SDValue(N, ResNo), R);
128 SDValue DAGTypeLegalizer::ScalarizeVecRes_BinOp(SDNode *N) {
129 SDValue LHS = GetScalarizedVector(N->getOperand(0));
130 SDValue RHS = GetScalarizedVector(N->getOperand(1));
131 return DAG.getNode(N->getOpcode(), N->getDebugLoc(),
132 LHS.getValueType(), LHS, RHS);
135 SDValue DAGTypeLegalizer::ScalarizeVecRes_TernaryOp(SDNode *N) {
136 SDValue Op0 = GetScalarizedVector(N->getOperand(0));
137 SDValue Op1 = GetScalarizedVector(N->getOperand(1));
138 SDValue Op2 = GetScalarizedVector(N->getOperand(2));
139 return DAG.getNode(N->getOpcode(), N->getDebugLoc(),
140 Op0.getValueType(), Op0, Op1, Op2);
143 SDValue DAGTypeLegalizer::ScalarizeVecRes_MERGE_VALUES(SDNode *N,
145 SDValue Op = DisintegrateMERGE_VALUES(N, ResNo);
146 return GetScalarizedVector(Op);
149 SDValue DAGTypeLegalizer::ScalarizeVecRes_BITCAST(SDNode *N) {
150 EVT NewVT = N->getValueType(0).getVectorElementType();
151 return DAG.getNode(ISD::BITCAST, N->getDebugLoc(),
152 NewVT, N->getOperand(0));
155 SDValue DAGTypeLegalizer::ScalarizeVecRes_CONVERT_RNDSAT(SDNode *N) {
156 EVT NewVT = N->getValueType(0).getVectorElementType();
157 SDValue Op0 = GetScalarizedVector(N->getOperand(0));
158 return DAG.getConvertRndSat(NewVT, N->getDebugLoc(),
159 Op0, DAG.getValueType(NewVT),
160 DAG.getValueType(Op0.getValueType()),
163 cast<CvtRndSatSDNode>(N)->getCvtCode());
166 SDValue DAGTypeLegalizer::ScalarizeVecRes_EXTRACT_SUBVECTOR(SDNode *N) {
167 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, N->getDebugLoc(),
168 N->getValueType(0).getVectorElementType(),
169 N->getOperand(0), N->getOperand(1));
172 SDValue DAGTypeLegalizer::ScalarizeVecRes_FP_ROUND(SDNode *N) {
173 EVT NewVT = N->getValueType(0).getVectorElementType();
174 SDValue Op = GetScalarizedVector(N->getOperand(0));
175 return DAG.getNode(ISD::FP_ROUND, N->getDebugLoc(),
176 NewVT, Op, N->getOperand(1));
179 SDValue DAGTypeLegalizer::ScalarizeVecRes_FPOWI(SDNode *N) {
180 SDValue Op = GetScalarizedVector(N->getOperand(0));
181 return DAG.getNode(ISD::FPOWI, N->getDebugLoc(),
182 Op.getValueType(), Op, N->getOperand(1));
185 SDValue DAGTypeLegalizer::ScalarizeVecRes_INSERT_VECTOR_ELT(SDNode *N) {
186 // The value to insert may have a wider type than the vector element type,
187 // so be sure to truncate it to the element type if necessary.
188 SDValue Op = N->getOperand(1);
189 EVT EltVT = N->getValueType(0).getVectorElementType();
190 if (Op.getValueType() != EltVT)
191 // FIXME: Can this happen for floating point types?
192 Op = DAG.getNode(ISD::TRUNCATE, N->getDebugLoc(), EltVT, Op);
196 SDValue DAGTypeLegalizer::ScalarizeVecRes_LOAD(LoadSDNode *N) {
197 assert(N->isUnindexed() && "Indexed vector load?");
199 SDValue Result = DAG.getLoad(ISD::UNINDEXED,
200 N->getExtensionType(),
201 N->getValueType(0).getVectorElementType(),
203 N->getChain(), N->getBasePtr(),
204 DAG.getUNDEF(N->getBasePtr().getValueType()),
206 N->getMemoryVT().getVectorElementType(),
207 N->isVolatile(), N->isNonTemporal(),
208 N->isInvariant(), N->getOriginalAlignment());
210 // Legalized the chain result - switch anything that used the old chain to
212 ReplaceValueWith(SDValue(N, 1), Result.getValue(1));
216 SDValue DAGTypeLegalizer::ScalarizeVecRes_UnaryOp(SDNode *N) {
217 // Get the dest type - it doesn't always match the input type, e.g. int_to_fp.
218 EVT DestVT = N->getValueType(0).getVectorElementType();
219 SDValue Op = GetScalarizedVector(N->getOperand(0));
220 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), DestVT, Op);
223 SDValue DAGTypeLegalizer::ScalarizeVecRes_InregOp(SDNode *N) {
224 EVT EltVT = N->getValueType(0).getVectorElementType();
225 EVT ExtVT = cast<VTSDNode>(N->getOperand(1))->getVT().getVectorElementType();
226 SDValue LHS = GetScalarizedVector(N->getOperand(0));
227 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), EltVT,
228 LHS, DAG.getValueType(ExtVT));
231 SDValue DAGTypeLegalizer::ScalarizeVecRes_SCALAR_TO_VECTOR(SDNode *N) {
232 // If the operand is wider than the vector element type then it is implicitly
233 // truncated. Make that explicit here.
234 EVT EltVT = N->getValueType(0).getVectorElementType();
235 SDValue InOp = N->getOperand(0);
236 if (InOp.getValueType() != EltVT)
237 return DAG.getNode(ISD::TRUNCATE, N->getDebugLoc(), EltVT, InOp);
241 SDValue DAGTypeLegalizer::ScalarizeVecRes_VSELECT(SDNode *N) {
242 SDValue Cond = GetScalarizedVector(N->getOperand(0));
243 SDValue LHS = GetScalarizedVector(N->getOperand(1));
244 TargetLowering::BooleanContent ScalarBool = TLI.getBooleanContents(false);
245 TargetLowering::BooleanContent VecBool = TLI.getBooleanContents(true);
246 if (ScalarBool != VecBool) {
247 EVT CondVT = Cond.getValueType();
248 switch (ScalarBool) {
249 case TargetLowering::UndefinedBooleanContent:
251 case TargetLowering::ZeroOrOneBooleanContent:
252 assert(VecBool == TargetLowering::UndefinedBooleanContent ||
253 VecBool == TargetLowering::ZeroOrNegativeOneBooleanContent);
254 // Vector read from all ones, scalar expects a single 1 so mask.
255 Cond = DAG.getNode(ISD::AND, N->getDebugLoc(), CondVT,
256 Cond, DAG.getConstant(1, CondVT));
258 case TargetLowering::ZeroOrNegativeOneBooleanContent:
259 assert(VecBool == TargetLowering::UndefinedBooleanContent ||
260 VecBool == TargetLowering::ZeroOrOneBooleanContent);
261 // Vector reads from a one, scalar from all ones so sign extend.
262 Cond = DAG.getNode(ISD::SIGN_EXTEND_INREG, N->getDebugLoc(), CondVT,
263 Cond, DAG.getValueType(MVT::i1));
267 return DAG.getNode(ISD::SELECT, N->getDebugLoc(),
268 LHS.getValueType(), Cond, LHS,
269 GetScalarizedVector(N->getOperand(2)));
272 SDValue DAGTypeLegalizer::ScalarizeVecRes_SELECT(SDNode *N) {
273 SDValue LHS = GetScalarizedVector(N->getOperand(1));
274 return DAG.getNode(ISD::SELECT, N->getDebugLoc(),
275 LHS.getValueType(), N->getOperand(0), LHS,
276 GetScalarizedVector(N->getOperand(2)));
279 SDValue DAGTypeLegalizer::ScalarizeVecRes_SELECT_CC(SDNode *N) {
280 SDValue LHS = GetScalarizedVector(N->getOperand(2));
281 return DAG.getNode(ISD::SELECT_CC, N->getDebugLoc(), LHS.getValueType(),
282 N->getOperand(0), N->getOperand(1),
283 LHS, GetScalarizedVector(N->getOperand(3)),
287 SDValue DAGTypeLegalizer::ScalarizeVecRes_SETCC(SDNode *N) {
288 assert(N->getValueType(0).isVector() ==
289 N->getOperand(0).getValueType().isVector() &&
290 "Scalar/Vector type mismatch");
292 if (N->getValueType(0).isVector()) return ScalarizeVecRes_VSETCC(N);
294 SDValue LHS = GetScalarizedVector(N->getOperand(0));
295 SDValue RHS = GetScalarizedVector(N->getOperand(1));
296 DebugLoc DL = N->getDebugLoc();
298 // Turn it into a scalar SETCC.
299 return DAG.getNode(ISD::SETCC, DL, MVT::i1, LHS, RHS, N->getOperand(2));
302 SDValue DAGTypeLegalizer::ScalarizeVecRes_UNDEF(SDNode *N) {
303 return DAG.getUNDEF(N->getValueType(0).getVectorElementType());
306 SDValue DAGTypeLegalizer::ScalarizeVecRes_VECTOR_SHUFFLE(SDNode *N) {
307 // Figure out if the scalar is the LHS or RHS and return it.
308 SDValue Arg = N->getOperand(2).getOperand(0);
309 if (Arg.getOpcode() == ISD::UNDEF)
310 return DAG.getUNDEF(N->getValueType(0).getVectorElementType());
311 unsigned Op = !cast<ConstantSDNode>(Arg)->isNullValue();
312 return GetScalarizedVector(N->getOperand(Op));
315 SDValue DAGTypeLegalizer::ScalarizeVecRes_VSETCC(SDNode *N) {
316 assert(N->getValueType(0).isVector() &&
317 N->getOperand(0).getValueType().isVector() &&
318 "Operand types must be vectors");
320 SDValue LHS = GetScalarizedVector(N->getOperand(0));
321 SDValue RHS = GetScalarizedVector(N->getOperand(1));
322 EVT NVT = N->getValueType(0).getVectorElementType();
323 DebugLoc DL = N->getDebugLoc();
325 // Turn it into a scalar SETCC.
326 SDValue Res = DAG.getNode(ISD::SETCC, DL, MVT::i1, LHS, RHS,
328 // Vectors may have a different boolean contents to scalars. Promote the
329 // value appropriately.
330 ISD::NodeType ExtendCode =
331 TargetLowering::getExtendForContent(TLI.getBooleanContents(true));
332 return DAG.getNode(ExtendCode, DL, NVT, Res);
336 //===----------------------------------------------------------------------===//
337 // Operand Vector Scalarization <1 x ty> -> ty.
338 //===----------------------------------------------------------------------===//
340 bool DAGTypeLegalizer::ScalarizeVectorOperand(SDNode *N, unsigned OpNo) {
341 DEBUG(dbgs() << "Scalarize node operand " << OpNo << ": ";
344 SDValue Res = SDValue();
346 if (Res.getNode() == 0) {
347 switch (N->getOpcode()) {
350 dbgs() << "ScalarizeVectorOperand Op #" << OpNo << ": ";
354 llvm_unreachable("Do not know how to scalarize this operator's operand!");
356 Res = ScalarizeVecOp_BITCAST(N);
358 case ISD::CONCAT_VECTORS:
359 Res = ScalarizeVecOp_CONCAT_VECTORS(N);
361 case ISD::EXTRACT_VECTOR_ELT:
362 Res = ScalarizeVecOp_EXTRACT_VECTOR_ELT(N);
365 Res = ScalarizeVecOp_STORE(cast<StoreSDNode>(N), OpNo);
370 // If the result is null, the sub-method took care of registering results etc.
371 if (!Res.getNode()) return false;
373 // If the result is N, the sub-method updated N in place. Tell the legalizer
375 if (Res.getNode() == N)
378 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
379 "Invalid operand expansion");
381 ReplaceValueWith(SDValue(N, 0), Res);
385 /// ScalarizeVecOp_BITCAST - If the value to convert is a vector that needs
386 /// to be scalarized, it must be <1 x ty>. Convert the element instead.
387 SDValue DAGTypeLegalizer::ScalarizeVecOp_BITCAST(SDNode *N) {
388 SDValue Elt = GetScalarizedVector(N->getOperand(0));
389 return DAG.getNode(ISD::BITCAST, N->getDebugLoc(),
390 N->getValueType(0), Elt);
393 /// ScalarizeVecOp_CONCAT_VECTORS - The vectors to concatenate have length one -
394 /// use a BUILD_VECTOR instead.
395 SDValue DAGTypeLegalizer::ScalarizeVecOp_CONCAT_VECTORS(SDNode *N) {
396 SmallVector<SDValue, 8> Ops(N->getNumOperands());
397 for (unsigned i = 0, e = N->getNumOperands(); i < e; ++i)
398 Ops[i] = GetScalarizedVector(N->getOperand(i));
399 return DAG.getNode(ISD::BUILD_VECTOR, N->getDebugLoc(), N->getValueType(0),
400 &Ops[0], Ops.size());
403 /// ScalarizeVecOp_EXTRACT_VECTOR_ELT - If the input is a vector that needs to
404 /// be scalarized, it must be <1 x ty>, so just return the element, ignoring the
406 SDValue DAGTypeLegalizer::ScalarizeVecOp_EXTRACT_VECTOR_ELT(SDNode *N) {
407 SDValue Res = GetScalarizedVector(N->getOperand(0));
408 if (Res.getValueType() != N->getValueType(0))
409 Res = DAG.getNode(ISD::ANY_EXTEND, N->getDebugLoc(), N->getValueType(0),
414 /// ScalarizeVecOp_STORE - If the value to store is a vector that needs to be
415 /// scalarized, it must be <1 x ty>. Just store the element.
416 SDValue DAGTypeLegalizer::ScalarizeVecOp_STORE(StoreSDNode *N, unsigned OpNo){
417 assert(N->isUnindexed() && "Indexed store of one-element vector?");
418 assert(OpNo == 1 && "Do not know how to scalarize this operand!");
419 DebugLoc dl = N->getDebugLoc();
421 if (N->isTruncatingStore())
422 return DAG.getTruncStore(N->getChain(), dl,
423 GetScalarizedVector(N->getOperand(1)),
424 N->getBasePtr(), N->getPointerInfo(),
425 N->getMemoryVT().getVectorElementType(),
426 N->isVolatile(), N->isNonTemporal(),
429 return DAG.getStore(N->getChain(), dl, GetScalarizedVector(N->getOperand(1)),
430 N->getBasePtr(), N->getPointerInfo(),
431 N->isVolatile(), N->isNonTemporal(),
432 N->getOriginalAlignment());
436 //===----------------------------------------------------------------------===//
437 // Result Vector Splitting
438 //===----------------------------------------------------------------------===//
440 /// SplitVectorResult - This method is called when the specified result of the
441 /// specified node is found to need vector splitting. At this point, the node
442 /// may also have invalid operands or may have other results that need
443 /// legalization, we just know that (at least) one result needs vector
445 void DAGTypeLegalizer::SplitVectorResult(SDNode *N, unsigned ResNo) {
446 DEBUG(dbgs() << "Split node result: ";
451 // See if the target wants to custom expand this node.
452 if (CustomLowerNode(N, N->getValueType(ResNo), true))
455 switch (N->getOpcode()) {
458 dbgs() << "SplitVectorResult #" << ResNo << ": ";
462 llvm_unreachable("Do not know how to split the result of this operator!");
464 case ISD::MERGE_VALUES: SplitRes_MERGE_VALUES(N, ResNo, Lo, Hi); break;
466 case ISD::SELECT: SplitRes_SELECT(N, Lo, Hi); break;
467 case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break;
468 case ISD::UNDEF: SplitRes_UNDEF(N, Lo, Hi); break;
469 case ISD::BITCAST: SplitVecRes_BITCAST(N, Lo, Hi); break;
470 case ISD::BUILD_VECTOR: SplitVecRes_BUILD_VECTOR(N, Lo, Hi); break;
471 case ISD::CONCAT_VECTORS: SplitVecRes_CONCAT_VECTORS(N, Lo, Hi); break;
472 case ISD::EXTRACT_SUBVECTOR: SplitVecRes_EXTRACT_SUBVECTOR(N, Lo, Hi); break;
473 case ISD::FP_ROUND_INREG: SplitVecRes_InregOp(N, Lo, Hi); break;
474 case ISD::FPOWI: SplitVecRes_FPOWI(N, Lo, Hi); break;
475 case ISD::INSERT_VECTOR_ELT: SplitVecRes_INSERT_VECTOR_ELT(N, Lo, Hi); break;
476 case ISD::SCALAR_TO_VECTOR: SplitVecRes_SCALAR_TO_VECTOR(N, Lo, Hi); break;
477 case ISD::SIGN_EXTEND_INREG: SplitVecRes_InregOp(N, Lo, Hi); break;
479 SplitVecRes_LOAD(cast<LoadSDNode>(N), Lo, Hi);
482 SplitVecRes_SETCC(N, Lo, Hi);
484 case ISD::VECTOR_SHUFFLE:
485 SplitVecRes_VECTOR_SHUFFLE(cast<ShuffleVectorSDNode>(N), Lo, Hi);
488 case ISD::ANY_EXTEND:
489 case ISD::CONVERT_RNDSAT:
492 case ISD::CTLZ_ZERO_UNDEF:
493 case ISD::CTTZ_ZERO_UNDEF:
504 case ISD::FNEARBYINT:
508 case ISD::FP_TO_SINT:
509 case ISD::FP_TO_UINT:
514 case ISD::SIGN_EXTEND:
515 case ISD::SINT_TO_FP:
517 case ISD::UINT_TO_FP:
518 case ISD::ZERO_EXTEND:
519 SplitVecRes_UnaryOp(N, Lo, Hi);
541 SplitVecRes_BinOp(N, Lo, Hi);
544 SplitVecRes_TernaryOp(N, Lo, Hi);
548 // If Lo/Hi is null, the sub-method took care of registering results etc.
550 SetSplitVector(SDValue(N, ResNo), Lo, Hi);
553 void DAGTypeLegalizer::SplitVecRes_BinOp(SDNode *N, SDValue &Lo,
555 SDValue LHSLo, LHSHi;
556 GetSplitVector(N->getOperand(0), LHSLo, LHSHi);
557 SDValue RHSLo, RHSHi;
558 GetSplitVector(N->getOperand(1), RHSLo, RHSHi);
559 DebugLoc dl = N->getDebugLoc();
561 Lo = DAG.getNode(N->getOpcode(), dl, LHSLo.getValueType(), LHSLo, RHSLo);
562 Hi = DAG.getNode(N->getOpcode(), dl, LHSHi.getValueType(), LHSHi, RHSHi);
565 void DAGTypeLegalizer::SplitVecRes_TernaryOp(SDNode *N, SDValue &Lo,
567 SDValue Op0Lo, Op0Hi;
568 GetSplitVector(N->getOperand(0), Op0Lo, Op0Hi);
569 SDValue Op1Lo, Op1Hi;
570 GetSplitVector(N->getOperand(1), Op1Lo, Op1Hi);
571 SDValue Op2Lo, Op2Hi;
572 GetSplitVector(N->getOperand(2), Op2Lo, Op2Hi);
573 DebugLoc dl = N->getDebugLoc();
575 Lo = DAG.getNode(N->getOpcode(), dl, Op0Lo.getValueType(),
576 Op0Lo, Op1Lo, Op2Lo);
577 Hi = DAG.getNode(N->getOpcode(), dl, Op0Hi.getValueType(),
578 Op0Hi, Op1Hi, Op2Hi);
581 void DAGTypeLegalizer::SplitVecRes_BITCAST(SDNode *N, SDValue &Lo,
583 // We know the result is a vector. The input may be either a vector or a
586 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
587 DebugLoc dl = N->getDebugLoc();
589 SDValue InOp = N->getOperand(0);
590 EVT InVT = InOp.getValueType();
592 // Handle some special cases efficiently.
593 switch (getTypeAction(InVT)) {
594 case TargetLowering::TypeLegal:
595 case TargetLowering::TypePromoteInteger:
596 case TargetLowering::TypeSoftenFloat:
597 case TargetLowering::TypeScalarizeVector:
598 case TargetLowering::TypeWidenVector:
600 case TargetLowering::TypeExpandInteger:
601 case TargetLowering::TypeExpandFloat:
602 // A scalar to vector conversion, where the scalar needs expansion.
603 // If the vector is being split in two then we can just convert the
606 GetExpandedOp(InOp, Lo, Hi);
607 if (TLI.isBigEndian())
609 Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo);
610 Hi = DAG.getNode(ISD::BITCAST, dl, HiVT, Hi);
614 case TargetLowering::TypeSplitVector:
615 // If the input is a vector that needs to be split, convert each split
616 // piece of the input now.
617 GetSplitVector(InOp, Lo, Hi);
618 Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo);
619 Hi = DAG.getNode(ISD::BITCAST, dl, HiVT, Hi);
623 // In the general case, convert the input to an integer and split it by hand.
624 EVT LoIntVT = EVT::getIntegerVT(*DAG.getContext(), LoVT.getSizeInBits());
625 EVT HiIntVT = EVT::getIntegerVT(*DAG.getContext(), HiVT.getSizeInBits());
626 if (TLI.isBigEndian())
627 std::swap(LoIntVT, HiIntVT);
629 SplitInteger(BitConvertToInteger(InOp), LoIntVT, HiIntVT, Lo, Hi);
631 if (TLI.isBigEndian())
633 Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo);
634 Hi = DAG.getNode(ISD::BITCAST, dl, HiVT, Hi);
637 void DAGTypeLegalizer::SplitVecRes_BUILD_VECTOR(SDNode *N, SDValue &Lo,
640 DebugLoc dl = N->getDebugLoc();
641 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
642 unsigned LoNumElts = LoVT.getVectorNumElements();
643 SmallVector<SDValue, 8> LoOps(N->op_begin(), N->op_begin()+LoNumElts);
644 Lo = DAG.getNode(ISD::BUILD_VECTOR, dl, LoVT, &LoOps[0], LoOps.size());
646 SmallVector<SDValue, 8> HiOps(N->op_begin()+LoNumElts, N->op_end());
647 Hi = DAG.getNode(ISD::BUILD_VECTOR, dl, HiVT, &HiOps[0], HiOps.size());
650 void DAGTypeLegalizer::SplitVecRes_CONCAT_VECTORS(SDNode *N, SDValue &Lo,
652 assert(!(N->getNumOperands() & 1) && "Unsupported CONCAT_VECTORS");
653 DebugLoc dl = N->getDebugLoc();
654 unsigned NumSubvectors = N->getNumOperands() / 2;
655 if (NumSubvectors == 1) {
656 Lo = N->getOperand(0);
657 Hi = N->getOperand(1);
662 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
664 SmallVector<SDValue, 8> LoOps(N->op_begin(), N->op_begin()+NumSubvectors);
665 Lo = DAG.getNode(ISD::CONCAT_VECTORS, dl, LoVT, &LoOps[0], LoOps.size());
667 SmallVector<SDValue, 8> HiOps(N->op_begin()+NumSubvectors, N->op_end());
668 Hi = DAG.getNode(ISD::CONCAT_VECTORS, dl, HiVT, &HiOps[0], HiOps.size());
671 void DAGTypeLegalizer::SplitVecRes_EXTRACT_SUBVECTOR(SDNode *N, SDValue &Lo,
673 SDValue Vec = N->getOperand(0);
674 SDValue Idx = N->getOperand(1);
675 DebugLoc dl = N->getDebugLoc();
678 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
680 Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, LoVT, Vec, Idx);
681 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
682 Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, HiVT, Vec,
683 DAG.getIntPtrConstant(IdxVal + LoVT.getVectorNumElements()));
686 void DAGTypeLegalizer::SplitVecRes_FPOWI(SDNode *N, SDValue &Lo,
688 DebugLoc dl = N->getDebugLoc();
689 GetSplitVector(N->getOperand(0), Lo, Hi);
690 Lo = DAG.getNode(ISD::FPOWI, dl, Lo.getValueType(), Lo, N->getOperand(1));
691 Hi = DAG.getNode(ISD::FPOWI, dl, Hi.getValueType(), Hi, N->getOperand(1));
694 void DAGTypeLegalizer::SplitVecRes_InregOp(SDNode *N, SDValue &Lo,
696 SDValue LHSLo, LHSHi;
697 GetSplitVector(N->getOperand(0), LHSLo, LHSHi);
698 DebugLoc dl = N->getDebugLoc();
701 GetSplitDestVTs(cast<VTSDNode>(N->getOperand(1))->getVT(), LoVT, HiVT);
703 Lo = DAG.getNode(N->getOpcode(), dl, LHSLo.getValueType(), LHSLo,
704 DAG.getValueType(LoVT));
705 Hi = DAG.getNode(N->getOpcode(), dl, LHSHi.getValueType(), LHSHi,
706 DAG.getValueType(HiVT));
709 void DAGTypeLegalizer::SplitVecRes_INSERT_VECTOR_ELT(SDNode *N, SDValue &Lo,
711 SDValue Vec = N->getOperand(0);
712 SDValue Elt = N->getOperand(1);
713 SDValue Idx = N->getOperand(2);
714 DebugLoc dl = N->getDebugLoc();
715 GetSplitVector(Vec, Lo, Hi);
717 if (ConstantSDNode *CIdx = dyn_cast<ConstantSDNode>(Idx)) {
718 unsigned IdxVal = CIdx->getZExtValue();
719 unsigned LoNumElts = Lo.getValueType().getVectorNumElements();
720 if (IdxVal < LoNumElts)
721 Lo = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl,
722 Lo.getValueType(), Lo, Elt, Idx);
724 Hi = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, Hi.getValueType(), Hi, Elt,
725 DAG.getIntPtrConstant(IdxVal - LoNumElts));
729 // Spill the vector to the stack.
730 EVT VecVT = Vec.getValueType();
731 EVT EltVT = VecVT.getVectorElementType();
732 SDValue StackPtr = DAG.CreateStackTemporary(VecVT);
733 SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, Vec, StackPtr,
734 MachinePointerInfo(), false, false, 0);
736 // Store the new element. This may be larger than the vector element type,
737 // so use a truncating store.
738 SDValue EltPtr = GetVectorElementPointer(StackPtr, EltVT, Idx);
739 Type *VecType = VecVT.getTypeForEVT(*DAG.getContext());
741 TLI.getTargetData()->getPrefTypeAlignment(VecType);
742 Store = DAG.getTruncStore(Store, dl, Elt, EltPtr, MachinePointerInfo(), EltVT,
745 // Load the Lo part from the stack slot.
746 Lo = DAG.getLoad(Lo.getValueType(), dl, Store, StackPtr, MachinePointerInfo(),
747 false, false, false, 0);
749 // Increment the pointer to the other part.
750 unsigned IncrementSize = Lo.getValueType().getSizeInBits() / 8;
751 StackPtr = DAG.getNode(ISD::ADD, dl, StackPtr.getValueType(), StackPtr,
752 DAG.getIntPtrConstant(IncrementSize));
754 // Load the Hi part from the stack slot.
755 Hi = DAG.getLoad(Hi.getValueType(), dl, Store, StackPtr, MachinePointerInfo(),
756 false, false, false, MinAlign(Alignment, IncrementSize));
759 void DAGTypeLegalizer::SplitVecRes_SCALAR_TO_VECTOR(SDNode *N, SDValue &Lo,
762 DebugLoc dl = N->getDebugLoc();
763 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
764 Lo = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, LoVT, N->getOperand(0));
765 Hi = DAG.getUNDEF(HiVT);
768 void DAGTypeLegalizer::SplitVecRes_LOAD(LoadSDNode *LD, SDValue &Lo,
770 assert(ISD::isUNINDEXEDLoad(LD) && "Indexed load during type legalization!");
772 DebugLoc dl = LD->getDebugLoc();
773 GetSplitDestVTs(LD->getValueType(0), LoVT, HiVT);
775 ISD::LoadExtType ExtType = LD->getExtensionType();
776 SDValue Ch = LD->getChain();
777 SDValue Ptr = LD->getBasePtr();
778 SDValue Offset = DAG.getUNDEF(Ptr.getValueType());
779 EVT MemoryVT = LD->getMemoryVT();
780 unsigned Alignment = LD->getOriginalAlignment();
781 bool isVolatile = LD->isVolatile();
782 bool isNonTemporal = LD->isNonTemporal();
783 bool isInvariant = LD->isInvariant();
785 EVT LoMemVT, HiMemVT;
786 GetSplitDestVTs(MemoryVT, LoMemVT, HiMemVT);
788 Lo = DAG.getLoad(ISD::UNINDEXED, ExtType, LoVT, dl, Ch, Ptr, Offset,
789 LD->getPointerInfo(), LoMemVT, isVolatile, isNonTemporal,
790 isInvariant, Alignment);
792 unsigned IncrementSize = LoMemVT.getSizeInBits()/8;
793 Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr,
794 DAG.getIntPtrConstant(IncrementSize));
795 Hi = DAG.getLoad(ISD::UNINDEXED, ExtType, HiVT, dl, Ch, Ptr, Offset,
796 LD->getPointerInfo().getWithOffset(IncrementSize),
797 HiMemVT, isVolatile, isNonTemporal, isInvariant, Alignment);
799 // Build a factor node to remember that this load is independent of the
801 Ch = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Lo.getValue(1),
804 // Legalized the chain result - switch anything that used the old chain to
806 ReplaceValueWith(SDValue(LD, 1), Ch);
809 void DAGTypeLegalizer::SplitVecRes_SETCC(SDNode *N, SDValue &Lo, SDValue &Hi) {
810 assert(N->getValueType(0).isVector() &&
811 N->getOperand(0).getValueType().isVector() &&
812 "Operand types must be vectors");
815 DebugLoc DL = N->getDebugLoc();
816 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
819 EVT InVT = N->getOperand(0).getValueType();
820 SDValue LL, LH, RL, RH;
821 EVT InNVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(),
822 LoVT.getVectorNumElements());
823 LL = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(0),
824 DAG.getIntPtrConstant(0));
825 LH = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(0),
826 DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
828 RL = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(1),
829 DAG.getIntPtrConstant(0));
830 RH = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(1),
831 DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
833 Lo = DAG.getNode(N->getOpcode(), DL, LoVT, LL, RL, N->getOperand(2));
834 Hi = DAG.getNode(N->getOpcode(), DL, HiVT, LH, RH, N->getOperand(2));
837 void DAGTypeLegalizer::SplitVecRes_UnaryOp(SDNode *N, SDValue &Lo,
839 // Get the dest types - they may not match the input types, e.g. int_to_fp.
841 DebugLoc dl = N->getDebugLoc();
842 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
844 // If the input also splits, handle it directly for a compile time speedup.
845 // Otherwise split it by hand.
846 EVT InVT = N->getOperand(0).getValueType();
847 if (getTypeAction(InVT) == TargetLowering::TypeSplitVector) {
848 GetSplitVector(N->getOperand(0), Lo, Hi);
850 EVT InNVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(),
851 LoVT.getVectorNumElements());
852 Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, N->getOperand(0),
853 DAG.getIntPtrConstant(0));
854 Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, N->getOperand(0),
855 DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
858 if (N->getOpcode() == ISD::FP_ROUND) {
859 Lo = DAG.getNode(N->getOpcode(), dl, LoVT, Lo, N->getOperand(1));
860 Hi = DAG.getNode(N->getOpcode(), dl, HiVT, Hi, N->getOperand(1));
861 } else if (N->getOpcode() == ISD::CONVERT_RNDSAT) {
862 SDValue DTyOpLo = DAG.getValueType(LoVT);
863 SDValue DTyOpHi = DAG.getValueType(HiVT);
864 SDValue STyOpLo = DAG.getValueType(Lo.getValueType());
865 SDValue STyOpHi = DAG.getValueType(Hi.getValueType());
866 SDValue RndOp = N->getOperand(3);
867 SDValue SatOp = N->getOperand(4);
868 ISD::CvtCode CvtCode = cast<CvtRndSatSDNode>(N)->getCvtCode();
869 Lo = DAG.getConvertRndSat(LoVT, dl, Lo, DTyOpLo, STyOpLo, RndOp, SatOp,
871 Hi = DAG.getConvertRndSat(HiVT, dl, Hi, DTyOpHi, STyOpHi, RndOp, SatOp,
874 Lo = DAG.getNode(N->getOpcode(), dl, LoVT, Lo);
875 Hi = DAG.getNode(N->getOpcode(), dl, HiVT, Hi);
879 void DAGTypeLegalizer::SplitVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N,
880 SDValue &Lo, SDValue &Hi) {
881 // The low and high parts of the original input give four input vectors.
883 DebugLoc dl = N->getDebugLoc();
884 GetSplitVector(N->getOperand(0), Inputs[0], Inputs[1]);
885 GetSplitVector(N->getOperand(1), Inputs[2], Inputs[3]);
886 EVT NewVT = Inputs[0].getValueType();
887 unsigned NewElts = NewVT.getVectorNumElements();
889 // If Lo or Hi uses elements from at most two of the four input vectors, then
890 // express it as a vector shuffle of those two inputs. Otherwise extract the
891 // input elements by hand and construct the Lo/Hi output using a BUILD_VECTOR.
892 SmallVector<int, 16> Ops;
893 for (unsigned High = 0; High < 2; ++High) {
894 SDValue &Output = High ? Hi : Lo;
896 // Build a shuffle mask for the output, discovering on the fly which
897 // input vectors to use as shuffle operands (recorded in InputUsed).
898 // If building a suitable shuffle vector proves too hard, then bail
899 // out with useBuildVector set.
900 unsigned InputUsed[2] = { -1U, -1U }; // Not yet discovered.
901 unsigned FirstMaskIdx = High * NewElts;
902 bool useBuildVector = false;
903 for (unsigned MaskOffset = 0; MaskOffset < NewElts; ++MaskOffset) {
904 // The mask element. This indexes into the input.
905 int Idx = N->getMaskElt(FirstMaskIdx + MaskOffset);
907 // The input vector this mask element indexes into.
908 unsigned Input = (unsigned)Idx / NewElts;
910 if (Input >= array_lengthof(Inputs)) {
911 // The mask element does not index into any input vector.
916 // Turn the index into an offset from the start of the input vector.
917 Idx -= Input * NewElts;
919 // Find or create a shuffle vector operand to hold this input.
921 for (OpNo = 0; OpNo < array_lengthof(InputUsed); ++OpNo) {
922 if (InputUsed[OpNo] == Input) {
923 // This input vector is already an operand.
925 } else if (InputUsed[OpNo] == -1U) {
926 // Create a new operand for this input vector.
927 InputUsed[OpNo] = Input;
932 if (OpNo >= array_lengthof(InputUsed)) {
933 // More than two input vectors used! Give up on trying to create a
934 // shuffle vector. Insert all elements into a BUILD_VECTOR instead.
935 useBuildVector = true;
939 // Add the mask index for the new shuffle vector.
940 Ops.push_back(Idx + OpNo * NewElts);
943 if (useBuildVector) {
944 EVT EltVT = NewVT.getVectorElementType();
945 SmallVector<SDValue, 16> SVOps;
947 // Extract the input elements by hand.
948 for (unsigned MaskOffset = 0; MaskOffset < NewElts; ++MaskOffset) {
949 // The mask element. This indexes into the input.
950 int Idx = N->getMaskElt(FirstMaskIdx + MaskOffset);
952 // The input vector this mask element indexes into.
953 unsigned Input = (unsigned)Idx / NewElts;
955 if (Input >= array_lengthof(Inputs)) {
956 // The mask element is "undef" or indexes off the end of the input.
957 SVOps.push_back(DAG.getUNDEF(EltVT));
961 // Turn the index into an offset from the start of the input vector.
962 Idx -= Input * NewElts;
964 // Extract the vector element by hand.
965 SVOps.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT,
966 Inputs[Input], DAG.getIntPtrConstant(Idx)));
969 // Construct the Lo/Hi output using a BUILD_VECTOR.
970 Output = DAG.getNode(ISD::BUILD_VECTOR,dl,NewVT, &SVOps[0], SVOps.size());
971 } else if (InputUsed[0] == -1U) {
972 // No input vectors were used! The result is undefined.
973 Output = DAG.getUNDEF(NewVT);
975 SDValue Op0 = Inputs[InputUsed[0]];
976 // If only one input was used, use an undefined vector for the other.
977 SDValue Op1 = InputUsed[1] == -1U ?
978 DAG.getUNDEF(NewVT) : Inputs[InputUsed[1]];
979 // At least one input vector was used. Create a new shuffle vector.
980 Output = DAG.getVectorShuffle(NewVT, dl, Op0, Op1, &Ops[0]);
988 //===----------------------------------------------------------------------===//
989 // Operand Vector Splitting
990 //===----------------------------------------------------------------------===//
992 /// SplitVectorOperand - This method is called when the specified operand of the
993 /// specified node is found to need vector splitting. At this point, all of the
994 /// result types of the node are known to be legal, but other operands of the
995 /// node may need legalization as well as the specified one.
996 bool DAGTypeLegalizer::SplitVectorOperand(SDNode *N, unsigned OpNo) {
997 DEBUG(dbgs() << "Split node operand: ";
1000 SDValue Res = SDValue();
1002 if (Res.getNode() == 0) {
1003 switch (N->getOpcode()) {
1006 dbgs() << "SplitVectorOperand Op #" << OpNo << ": ";
1010 llvm_unreachable("Do not know how to split this operator's operand!");
1011 case ISD::SETCC: Res = SplitVecOp_VSETCC(N); break;
1012 case ISD::BITCAST: Res = SplitVecOp_BITCAST(N); break;
1013 case ISD::EXTRACT_SUBVECTOR: Res = SplitVecOp_EXTRACT_SUBVECTOR(N); break;
1014 case ISD::EXTRACT_VECTOR_ELT:Res = SplitVecOp_EXTRACT_VECTOR_ELT(N); break;
1015 case ISD::CONCAT_VECTORS: Res = SplitVecOp_CONCAT_VECTORS(N); break;
1016 case ISD::FP_ROUND: Res = SplitVecOp_FP_ROUND(N); break;
1018 Res = SplitVecOp_STORE(cast<StoreSDNode>(N), OpNo);
1024 case ISD::FP_EXTEND:
1025 case ISD::FP_TO_SINT:
1026 case ISD::FP_TO_UINT:
1027 case ISD::SINT_TO_FP:
1028 case ISD::UINT_TO_FP:
1031 case ISD::SIGN_EXTEND:
1032 case ISD::ZERO_EXTEND:
1033 case ISD::ANY_EXTEND:
1034 Res = SplitVecOp_UnaryOp(N);
1039 // If the result is null, the sub-method took care of registering results etc.
1040 if (!Res.getNode()) return false;
1042 // If the result is N, the sub-method updated N in place. Tell the legalizer
1044 if (Res.getNode() == N)
1047 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
1048 "Invalid operand expansion");
1050 ReplaceValueWith(SDValue(N, 0), Res);
1054 SDValue DAGTypeLegalizer::SplitVecOp_UnaryOp(SDNode *N) {
1055 // The result has a legal vector type, but the input needs splitting.
1056 EVT ResVT = N->getValueType(0);
1058 DebugLoc dl = N->getDebugLoc();
1059 GetSplitVector(N->getOperand(0), Lo, Hi);
1060 EVT InVT = Lo.getValueType();
1062 EVT OutVT = EVT::getVectorVT(*DAG.getContext(), ResVT.getVectorElementType(),
1063 InVT.getVectorNumElements());
1065 Lo = DAG.getNode(N->getOpcode(), dl, OutVT, Lo);
1066 Hi = DAG.getNode(N->getOpcode(), dl, OutVT, Hi);
1068 return DAG.getNode(ISD::CONCAT_VECTORS, dl, ResVT, Lo, Hi);
1071 SDValue DAGTypeLegalizer::SplitVecOp_BITCAST(SDNode *N) {
1072 // For example, i64 = BITCAST v4i16 on alpha. Typically the vector will
1073 // end up being split all the way down to individual components. Convert the
1074 // split pieces into integers and reassemble.
1076 GetSplitVector(N->getOperand(0), Lo, Hi);
1077 Lo = BitConvertToInteger(Lo);
1078 Hi = BitConvertToInteger(Hi);
1080 if (TLI.isBigEndian())
1083 return DAG.getNode(ISD::BITCAST, N->getDebugLoc(), N->getValueType(0),
1084 JoinIntegers(Lo, Hi));
1087 SDValue DAGTypeLegalizer::SplitVecOp_EXTRACT_SUBVECTOR(SDNode *N) {
1088 // We know that the extracted result type is legal.
1089 EVT SubVT = N->getValueType(0);
1090 SDValue Idx = N->getOperand(1);
1091 DebugLoc dl = N->getDebugLoc();
1093 GetSplitVector(N->getOperand(0), Lo, Hi);
1095 uint64_t LoElts = Lo.getValueType().getVectorNumElements();
1096 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
1098 if (IdxVal < LoElts) {
1099 assert(IdxVal + SubVT.getVectorNumElements() <= LoElts &&
1100 "Extracted subvector crosses vector split!");
1101 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, SubVT, Lo, Idx);
1103 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, SubVT, Hi,
1104 DAG.getConstant(IdxVal - LoElts, Idx.getValueType()));
1108 SDValue DAGTypeLegalizer::SplitVecOp_EXTRACT_VECTOR_ELT(SDNode *N) {
1109 SDValue Vec = N->getOperand(0);
1110 SDValue Idx = N->getOperand(1);
1111 EVT VecVT = Vec.getValueType();
1113 if (isa<ConstantSDNode>(Idx)) {
1114 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
1115 assert(IdxVal < VecVT.getVectorNumElements() && "Invalid vector index!");
1118 GetSplitVector(Vec, Lo, Hi);
1120 uint64_t LoElts = Lo.getValueType().getVectorNumElements();
1122 if (IdxVal < LoElts)
1123 return SDValue(DAG.UpdateNodeOperands(N, Lo, Idx), 0);
1124 return SDValue(DAG.UpdateNodeOperands(N, Hi,
1125 DAG.getConstant(IdxVal - LoElts,
1126 Idx.getValueType())), 0);
1129 // Store the vector to the stack.
1130 EVT EltVT = VecVT.getVectorElementType();
1131 DebugLoc dl = N->getDebugLoc();
1132 SDValue StackPtr = DAG.CreateStackTemporary(VecVT);
1133 SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, Vec, StackPtr,
1134 MachinePointerInfo(), false, false, 0);
1136 // Load back the required element.
1137 StackPtr = GetVectorElementPointer(StackPtr, EltVT, Idx);
1138 return DAG.getExtLoad(ISD::EXTLOAD, dl, N->getValueType(0), Store, StackPtr,
1139 MachinePointerInfo(), EltVT, false, false, 0);
1142 SDValue DAGTypeLegalizer::SplitVecOp_STORE(StoreSDNode *N, unsigned OpNo) {
1143 assert(N->isUnindexed() && "Indexed store of vector?");
1144 assert(OpNo == 1 && "Can only split the stored value");
1145 DebugLoc DL = N->getDebugLoc();
1147 bool isTruncating = N->isTruncatingStore();
1148 SDValue Ch = N->getChain();
1149 SDValue Ptr = N->getBasePtr();
1150 EVT MemoryVT = N->getMemoryVT();
1151 unsigned Alignment = N->getOriginalAlignment();
1152 bool isVol = N->isVolatile();
1153 bool isNT = N->isNonTemporal();
1155 GetSplitVector(N->getOperand(1), Lo, Hi);
1157 EVT LoMemVT, HiMemVT;
1158 GetSplitDestVTs(MemoryVT, LoMemVT, HiMemVT);
1160 unsigned IncrementSize = LoMemVT.getSizeInBits()/8;
1163 Lo = DAG.getTruncStore(Ch, DL, Lo, Ptr, N->getPointerInfo(),
1164 LoMemVT, isVol, isNT, Alignment);
1166 Lo = DAG.getStore(Ch, DL, Lo, Ptr, N->getPointerInfo(),
1167 isVol, isNT, Alignment);
1169 // Increment the pointer to the other half.
1170 Ptr = DAG.getNode(ISD::ADD, DL, Ptr.getValueType(), Ptr,
1171 DAG.getIntPtrConstant(IncrementSize));
1174 Hi = DAG.getTruncStore(Ch, DL, Hi, Ptr,
1175 N->getPointerInfo().getWithOffset(IncrementSize),
1176 HiMemVT, isVol, isNT, Alignment);
1178 Hi = DAG.getStore(Ch, DL, Hi, Ptr,
1179 N->getPointerInfo().getWithOffset(IncrementSize),
1180 isVol, isNT, Alignment);
1182 return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Lo, Hi);
1185 SDValue DAGTypeLegalizer::SplitVecOp_CONCAT_VECTORS(SDNode *N) {
1186 DebugLoc DL = N->getDebugLoc();
1188 // The input operands all must have the same type, and we know the result the
1189 // result type is valid. Convert this to a buildvector which extracts all the
1191 // TODO: If the input elements are power-two vectors, we could convert this to
1192 // a new CONCAT_VECTORS node with elements that are half-wide.
1193 SmallVector<SDValue, 32> Elts;
1194 EVT EltVT = N->getValueType(0).getVectorElementType();
1195 for (unsigned op = 0, e = N->getNumOperands(); op != e; ++op) {
1196 SDValue Op = N->getOperand(op);
1197 for (unsigned i = 0, e = Op.getValueType().getVectorNumElements();
1199 Elts.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, EltVT,
1200 Op, DAG.getIntPtrConstant(i)));
1205 return DAG.getNode(ISD::BUILD_VECTOR, DL, N->getValueType(0),
1206 &Elts[0], Elts.size());
1209 SDValue DAGTypeLegalizer::SplitVecOp_VSETCC(SDNode *N) {
1210 assert(N->getValueType(0).isVector() &&
1211 N->getOperand(0).getValueType().isVector() &&
1212 "Operand types must be vectors");
1213 // The result has a legal vector type, but the input needs splitting.
1214 SDValue Lo0, Hi0, Lo1, Hi1, LoRes, HiRes;
1215 DebugLoc DL = N->getDebugLoc();
1216 GetSplitVector(N->getOperand(0), Lo0, Hi0);
1217 GetSplitVector(N->getOperand(1), Lo1, Hi1);
1218 unsigned PartElements = Lo0.getValueType().getVectorNumElements();
1219 EVT PartResVT = EVT::getVectorVT(*DAG.getContext(), MVT::i1, PartElements);
1220 EVT WideResVT = EVT::getVectorVT(*DAG.getContext(), MVT::i1, 2*PartElements);
1222 LoRes = DAG.getNode(ISD::SETCC, DL, PartResVT, Lo0, Lo1, N->getOperand(2));
1223 HiRes = DAG.getNode(ISD::SETCC, DL, PartResVT, Hi0, Hi1, N->getOperand(2));
1224 SDValue Con = DAG.getNode(ISD::CONCAT_VECTORS, DL, WideResVT, LoRes, HiRes);
1225 return PromoteTargetBoolean(Con, N->getValueType(0));
1229 SDValue DAGTypeLegalizer::SplitVecOp_FP_ROUND(SDNode *N) {
1230 // The result has a legal vector type, but the input needs splitting.
1231 EVT ResVT = N->getValueType(0);
1233 DebugLoc DL = N->getDebugLoc();
1234 GetSplitVector(N->getOperand(0), Lo, Hi);
1235 EVT InVT = Lo.getValueType();
1237 EVT OutVT = EVT::getVectorVT(*DAG.getContext(), ResVT.getVectorElementType(),
1238 InVT.getVectorNumElements());
1240 Lo = DAG.getNode(ISD::FP_ROUND, DL, OutVT, Lo, N->getOperand(1));
1241 Hi = DAG.getNode(ISD::FP_ROUND, DL, OutVT, Hi, N->getOperand(1));
1243 return DAG.getNode(ISD::CONCAT_VECTORS, DL, ResVT, Lo, Hi);
1248 //===----------------------------------------------------------------------===//
1249 // Result Vector Widening
1250 //===----------------------------------------------------------------------===//
1252 void DAGTypeLegalizer::WidenVectorResult(SDNode *N, unsigned ResNo) {
1253 DEBUG(dbgs() << "Widen node result " << ResNo << ": ";
1257 // See if the target wants to custom widen this node.
1258 if (CustomWidenLowerNode(N, N->getValueType(ResNo)))
1261 SDValue Res = SDValue();
1262 switch (N->getOpcode()) {
1265 dbgs() << "WidenVectorResult #" << ResNo << ": ";
1269 llvm_unreachable("Do not know how to widen the result of this operator!");
1271 case ISD::MERGE_VALUES: Res = WidenVecRes_MERGE_VALUES(N, ResNo); break;
1272 case ISD::BITCAST: Res = WidenVecRes_BITCAST(N); break;
1273 case ISD::BUILD_VECTOR: Res = WidenVecRes_BUILD_VECTOR(N); break;
1274 case ISD::CONCAT_VECTORS: Res = WidenVecRes_CONCAT_VECTORS(N); break;
1275 case ISD::CONVERT_RNDSAT: Res = WidenVecRes_CONVERT_RNDSAT(N); break;
1276 case ISD::EXTRACT_SUBVECTOR: Res = WidenVecRes_EXTRACT_SUBVECTOR(N); break;
1277 case ISD::FP_ROUND_INREG: Res = WidenVecRes_InregOp(N); break;
1278 case ISD::INSERT_VECTOR_ELT: Res = WidenVecRes_INSERT_VECTOR_ELT(N); break;
1279 case ISD::LOAD: Res = WidenVecRes_LOAD(N); break;
1280 case ISD::SCALAR_TO_VECTOR: Res = WidenVecRes_SCALAR_TO_VECTOR(N); break;
1281 case ISD::SIGN_EXTEND_INREG: Res = WidenVecRes_InregOp(N); break;
1283 case ISD::SELECT: Res = WidenVecRes_SELECT(N); break;
1284 case ISD::SELECT_CC: Res = WidenVecRes_SELECT_CC(N); break;
1285 case ISD::SETCC: Res = WidenVecRes_SETCC(N); break;
1286 case ISD::UNDEF: Res = WidenVecRes_UNDEF(N); break;
1287 case ISD::VECTOR_SHUFFLE:
1288 Res = WidenVecRes_VECTOR_SHUFFLE(cast<ShuffleVectorSDNode>(N));
1294 case ISD::FCOPYSIGN:
1310 Res = WidenVecRes_Binary(N);
1314 Res = WidenVecRes_POWI(N);
1320 Res = WidenVecRes_Shift(N);
1323 case ISD::ANY_EXTEND:
1324 case ISD::FP_EXTEND:
1326 case ISD::FP_TO_SINT:
1327 case ISD::FP_TO_UINT:
1328 case ISD::SIGN_EXTEND:
1329 case ISD::SINT_TO_FP:
1331 case ISD::UINT_TO_FP:
1332 case ISD::ZERO_EXTEND:
1333 Res = WidenVecRes_Convert(N);
1348 case ISD::FNEARBYINT:
1354 Res = WidenVecRes_Unary(N);
1358 // If Res is null, the sub-method took care of registering the result.
1360 SetWidenedVector(SDValue(N, ResNo), Res);
1363 SDValue DAGTypeLegalizer::WidenVecRes_Binary(SDNode *N) {
1364 // Binary op widening.
1365 unsigned Opcode = N->getOpcode();
1366 DebugLoc dl = N->getDebugLoc();
1367 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1368 EVT WidenEltVT = WidenVT.getVectorElementType();
1370 unsigned NumElts = VT.getVectorNumElements();
1371 while (!TLI.isTypeLegal(VT) && NumElts != 1) {
1372 NumElts = NumElts / 2;
1373 VT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NumElts);
1376 if (NumElts != 1 && !TLI.canOpTrap(N->getOpcode(), VT)) {
1377 // Operation doesn't trap so just widen as normal.
1378 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
1379 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1380 return DAG.getNode(N->getOpcode(), dl, WidenVT, InOp1, InOp2);
1383 // No legal vector version so unroll the vector operation and then widen.
1385 return DAG.UnrollVectorOp(N, WidenVT.getVectorNumElements());
1387 // Since the operation can trap, apply operation on the original vector.
1389 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
1390 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1391 unsigned CurNumElts = N->getValueType(0).getVectorNumElements();
1393 SmallVector<SDValue, 16> ConcatOps(CurNumElts);
1394 unsigned ConcatEnd = 0; // Current ConcatOps index.
1395 int Idx = 0; // Current Idx into input vectors.
1397 // NumElts := greatest legal vector size (at most WidenVT)
1398 // while (orig. vector has unhandled elements) {
1399 // take munches of size NumElts from the beginning and add to ConcatOps
1400 // NumElts := next smaller supported vector size or 1
1402 while (CurNumElts != 0) {
1403 while (CurNumElts >= NumElts) {
1404 SDValue EOp1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, InOp1,
1405 DAG.getIntPtrConstant(Idx));
1406 SDValue EOp2 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, InOp2,
1407 DAG.getIntPtrConstant(Idx));
1408 ConcatOps[ConcatEnd++] = DAG.getNode(Opcode, dl, VT, EOp1, EOp2);
1410 CurNumElts -= NumElts;
1413 NumElts = NumElts / 2;
1414 VT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NumElts);
1415 } while (!TLI.isTypeLegal(VT) && NumElts != 1);
1418 for (unsigned i = 0; i != CurNumElts; ++i, ++Idx) {
1419 SDValue EOp1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, WidenEltVT,
1420 InOp1, DAG.getIntPtrConstant(Idx));
1421 SDValue EOp2 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, WidenEltVT,
1422 InOp2, DAG.getIntPtrConstant(Idx));
1423 ConcatOps[ConcatEnd++] = DAG.getNode(Opcode, dl, WidenEltVT,
1430 // Check to see if we have a single operation with the widen type.
1431 if (ConcatEnd == 1) {
1432 VT = ConcatOps[0].getValueType();
1434 return ConcatOps[0];
1437 // while (Some element of ConcatOps is not of type MaxVT) {
1438 // From the end of ConcatOps, collect elements of the same type and put
1439 // them into an op of the next larger supported type
1441 while (ConcatOps[ConcatEnd-1].getValueType() != MaxVT) {
1442 Idx = ConcatEnd - 1;
1443 VT = ConcatOps[Idx--].getValueType();
1444 while (Idx >= 0 && ConcatOps[Idx].getValueType() == VT)
1447 int NextSize = VT.isVector() ? VT.getVectorNumElements() : 1;
1451 NextVT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NextSize);
1452 } while (!TLI.isTypeLegal(NextVT));
1454 if (!VT.isVector()) {
1455 // Scalar type, create an INSERT_VECTOR_ELEMENT of type NextVT
1456 SDValue VecOp = DAG.getUNDEF(NextVT);
1457 unsigned NumToInsert = ConcatEnd - Idx - 1;
1458 for (unsigned i = 0, OpIdx = Idx+1; i < NumToInsert; i++, OpIdx++) {
1459 VecOp = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NextVT, VecOp,
1460 ConcatOps[OpIdx], DAG.getIntPtrConstant(i));
1462 ConcatOps[Idx+1] = VecOp;
1463 ConcatEnd = Idx + 2;
1465 // Vector type, create a CONCAT_VECTORS of type NextVT
1466 SDValue undefVec = DAG.getUNDEF(VT);
1467 unsigned OpsToConcat = NextSize/VT.getVectorNumElements();
1468 SmallVector<SDValue, 16> SubConcatOps(OpsToConcat);
1469 unsigned RealVals = ConcatEnd - Idx - 1;
1470 unsigned SubConcatEnd = 0;
1471 unsigned SubConcatIdx = Idx + 1;
1472 while (SubConcatEnd < RealVals)
1473 SubConcatOps[SubConcatEnd++] = ConcatOps[++Idx];
1474 while (SubConcatEnd < OpsToConcat)
1475 SubConcatOps[SubConcatEnd++] = undefVec;
1476 ConcatOps[SubConcatIdx] = DAG.getNode(ISD::CONCAT_VECTORS, dl,
1477 NextVT, &SubConcatOps[0],
1479 ConcatEnd = SubConcatIdx + 1;
1483 // Check to see if we have a single operation with the widen type.
1484 if (ConcatEnd == 1) {
1485 VT = ConcatOps[0].getValueType();
1487 return ConcatOps[0];
1490 // add undefs of size MaxVT until ConcatOps grows to length of WidenVT
1491 unsigned NumOps = WidenVT.getVectorNumElements()/MaxVT.getVectorNumElements();
1492 if (NumOps != ConcatEnd ) {
1493 SDValue UndefVal = DAG.getUNDEF(MaxVT);
1494 for (unsigned j = ConcatEnd; j < NumOps; ++j)
1495 ConcatOps[j] = UndefVal;
1497 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &ConcatOps[0], NumOps);
1500 SDValue DAGTypeLegalizer::WidenVecRes_Convert(SDNode *N) {
1501 SDValue InOp = N->getOperand(0);
1502 DebugLoc DL = N->getDebugLoc();
1504 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1505 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1507 EVT InVT = InOp.getValueType();
1508 EVT InEltVT = InVT.getVectorElementType();
1509 EVT InWidenVT = EVT::getVectorVT(*DAG.getContext(), InEltVT, WidenNumElts);
1511 unsigned Opcode = N->getOpcode();
1512 unsigned InVTNumElts = InVT.getVectorNumElements();
1514 if (getTypeAction(InVT) == TargetLowering::TypeWidenVector) {
1515 InOp = GetWidenedVector(N->getOperand(0));
1516 InVT = InOp.getValueType();
1517 InVTNumElts = InVT.getVectorNumElements();
1518 if (InVTNumElts == WidenNumElts) {
1519 if (N->getNumOperands() == 1)
1520 return DAG.getNode(Opcode, DL, WidenVT, InOp);
1521 return DAG.getNode(Opcode, DL, WidenVT, InOp, N->getOperand(1));
1525 if (TLI.isTypeLegal(InWidenVT)) {
1526 // Because the result and the input are different vector types, widening
1527 // the result could create a legal type but widening the input might make
1528 // it an illegal type that might lead to repeatedly splitting the input
1529 // and then widening it. To avoid this, we widen the input only if
1530 // it results in a legal type.
1531 if (WidenNumElts % InVTNumElts == 0) {
1532 // Widen the input and call convert on the widened input vector.
1533 unsigned NumConcat = WidenNumElts/InVTNumElts;
1534 SmallVector<SDValue, 16> Ops(NumConcat);
1536 SDValue UndefVal = DAG.getUNDEF(InVT);
1537 for (unsigned i = 1; i != NumConcat; ++i)
1539 SDValue InVec = DAG.getNode(ISD::CONCAT_VECTORS, DL, InWidenVT,
1540 &Ops[0], NumConcat);
1541 if (N->getNumOperands() == 1)
1542 return DAG.getNode(Opcode, DL, WidenVT, InVec);
1543 return DAG.getNode(Opcode, DL, WidenVT, InVec, N->getOperand(1));
1546 if (InVTNumElts % WidenNumElts == 0) {
1547 SDValue InVal = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InWidenVT,
1548 InOp, DAG.getIntPtrConstant(0));
1549 // Extract the input and convert the shorten input vector.
1550 if (N->getNumOperands() == 1)
1551 return DAG.getNode(Opcode, DL, WidenVT, InVal);
1552 return DAG.getNode(Opcode, DL, WidenVT, InVal, N->getOperand(1));
1556 // Otherwise unroll into some nasty scalar code and rebuild the vector.
1557 SmallVector<SDValue, 16> Ops(WidenNumElts);
1558 EVT EltVT = WidenVT.getVectorElementType();
1559 unsigned MinElts = std::min(InVTNumElts, WidenNumElts);
1561 for (i=0; i < MinElts; ++i) {
1562 SDValue Val = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, InEltVT, InOp,
1563 DAG.getIntPtrConstant(i));
1564 if (N->getNumOperands() == 1)
1565 Ops[i] = DAG.getNode(Opcode, DL, EltVT, Val);
1567 Ops[i] = DAG.getNode(Opcode, DL, EltVT, Val, N->getOperand(1));
1570 SDValue UndefVal = DAG.getUNDEF(EltVT);
1571 for (; i < WidenNumElts; ++i)
1574 return DAG.getNode(ISD::BUILD_VECTOR, DL, WidenVT, &Ops[0], WidenNumElts);
1577 SDValue DAGTypeLegalizer::WidenVecRes_POWI(SDNode *N) {
1578 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1579 SDValue InOp = GetWidenedVector(N->getOperand(0));
1580 SDValue ShOp = N->getOperand(1);
1581 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), WidenVT, InOp, ShOp);
1584 SDValue DAGTypeLegalizer::WidenVecRes_Shift(SDNode *N) {
1585 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1586 SDValue InOp = GetWidenedVector(N->getOperand(0));
1587 SDValue ShOp = N->getOperand(1);
1589 EVT ShVT = ShOp.getValueType();
1590 if (getTypeAction(ShVT) == TargetLowering::TypeWidenVector) {
1591 ShOp = GetWidenedVector(ShOp);
1592 ShVT = ShOp.getValueType();
1594 EVT ShWidenVT = EVT::getVectorVT(*DAG.getContext(),
1595 ShVT.getVectorElementType(),
1596 WidenVT.getVectorNumElements());
1597 if (ShVT != ShWidenVT)
1598 ShOp = ModifyToType(ShOp, ShWidenVT);
1600 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), WidenVT, InOp, ShOp);
1603 SDValue DAGTypeLegalizer::WidenVecRes_Unary(SDNode *N) {
1604 // Unary op widening.
1605 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1606 SDValue InOp = GetWidenedVector(N->getOperand(0));
1607 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), WidenVT, InOp);
1610 SDValue DAGTypeLegalizer::WidenVecRes_InregOp(SDNode *N) {
1611 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1612 EVT ExtVT = EVT::getVectorVT(*DAG.getContext(),
1613 cast<VTSDNode>(N->getOperand(1))->getVT()
1614 .getVectorElementType(),
1615 WidenVT.getVectorNumElements());
1616 SDValue WidenLHS = GetWidenedVector(N->getOperand(0));
1617 return DAG.getNode(N->getOpcode(), N->getDebugLoc(),
1618 WidenVT, WidenLHS, DAG.getValueType(ExtVT));
1621 SDValue DAGTypeLegalizer::WidenVecRes_MERGE_VALUES(SDNode *N, unsigned ResNo) {
1622 SDValue WidenVec = DisintegrateMERGE_VALUES(N, ResNo);
1623 return GetWidenedVector(WidenVec);
1626 SDValue DAGTypeLegalizer::WidenVecRes_BITCAST(SDNode *N) {
1627 SDValue InOp = N->getOperand(0);
1628 EVT InVT = InOp.getValueType();
1629 EVT VT = N->getValueType(0);
1630 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1631 DebugLoc dl = N->getDebugLoc();
1633 switch (getTypeAction(InVT)) {
1634 case TargetLowering::TypeLegal:
1636 case TargetLowering::TypePromoteInteger:
1637 // If the incoming type is a vector that is being promoted, then
1638 // we know that the elements are arranged differently and that we
1639 // must perform the conversion using a stack slot.
1640 if (InVT.isVector())
1643 // If the InOp is promoted to the same size, convert it. Otherwise,
1644 // fall out of the switch and widen the promoted input.
1645 InOp = GetPromotedInteger(InOp);
1646 InVT = InOp.getValueType();
1647 if (WidenVT.bitsEq(InVT))
1648 return DAG.getNode(ISD::BITCAST, dl, WidenVT, InOp);
1650 case TargetLowering::TypeSoftenFloat:
1651 case TargetLowering::TypeExpandInteger:
1652 case TargetLowering::TypeExpandFloat:
1653 case TargetLowering::TypeScalarizeVector:
1654 case TargetLowering::TypeSplitVector:
1656 case TargetLowering::TypeWidenVector:
1657 // If the InOp is widened to the same size, convert it. Otherwise, fall
1658 // out of the switch and widen the widened input.
1659 InOp = GetWidenedVector(InOp);
1660 InVT = InOp.getValueType();
1661 if (WidenVT.bitsEq(InVT))
1662 // The input widens to the same size. Convert to the widen value.
1663 return DAG.getNode(ISD::BITCAST, dl, WidenVT, InOp);
1667 unsigned WidenSize = WidenVT.getSizeInBits();
1668 unsigned InSize = InVT.getSizeInBits();
1669 // x86mmx is not an acceptable vector element type, so don't try.
1670 if (WidenSize % InSize == 0 && InVT != MVT::x86mmx) {
1671 // Determine new input vector type. The new input vector type will use
1672 // the same element type (if its a vector) or use the input type as a
1673 // vector. It is the same size as the type to widen to.
1675 unsigned NewNumElts = WidenSize / InSize;
1676 if (InVT.isVector()) {
1677 EVT InEltVT = InVT.getVectorElementType();
1678 NewInVT = EVT::getVectorVT(*DAG.getContext(), InEltVT,
1679 WidenSize / InEltVT.getSizeInBits());
1681 NewInVT = EVT::getVectorVT(*DAG.getContext(), InVT, NewNumElts);
1684 if (TLI.isTypeLegal(NewInVT)) {
1685 // Because the result and the input are different vector types, widening
1686 // the result could create a legal type but widening the input might make
1687 // it an illegal type that might lead to repeatedly splitting the input
1688 // and then widening it. To avoid this, we widen the input only if
1689 // it results in a legal type.
1690 SmallVector<SDValue, 16> Ops(NewNumElts);
1691 SDValue UndefVal = DAG.getUNDEF(InVT);
1693 for (unsigned i = 1; i < NewNumElts; ++i)
1697 if (InVT.isVector())
1698 NewVec = DAG.getNode(ISD::CONCAT_VECTORS, dl,
1699 NewInVT, &Ops[0], NewNumElts);
1701 NewVec = DAG.getNode(ISD::BUILD_VECTOR, dl,
1702 NewInVT, &Ops[0], NewNumElts);
1703 return DAG.getNode(ISD::BITCAST, dl, WidenVT, NewVec);
1707 return CreateStackStoreLoad(InOp, WidenVT);
1710 SDValue DAGTypeLegalizer::WidenVecRes_BUILD_VECTOR(SDNode *N) {
1711 DebugLoc dl = N->getDebugLoc();
1712 // Build a vector with undefined for the new nodes.
1713 EVT VT = N->getValueType(0);
1714 EVT EltVT = VT.getVectorElementType();
1715 unsigned NumElts = VT.getVectorNumElements();
1717 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1718 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1720 SmallVector<SDValue, 16> NewOps(N->op_begin(), N->op_end());
1721 NewOps.reserve(WidenNumElts);
1722 for (unsigned i = NumElts; i < WidenNumElts; ++i)
1723 NewOps.push_back(DAG.getUNDEF(EltVT));
1725 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &NewOps[0], NewOps.size());
1728 SDValue DAGTypeLegalizer::WidenVecRes_CONCAT_VECTORS(SDNode *N) {
1729 EVT InVT = N->getOperand(0).getValueType();
1730 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1731 DebugLoc dl = N->getDebugLoc();
1732 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1733 unsigned NumInElts = InVT.getVectorNumElements();
1734 unsigned NumOperands = N->getNumOperands();
1736 bool InputWidened = false; // Indicates we need to widen the input.
1737 if (getTypeAction(InVT) != TargetLowering::TypeWidenVector) {
1738 if (WidenVT.getVectorNumElements() % InVT.getVectorNumElements() == 0) {
1739 // Add undef vectors to widen to correct length.
1740 unsigned NumConcat = WidenVT.getVectorNumElements() /
1741 InVT.getVectorNumElements();
1742 SDValue UndefVal = DAG.getUNDEF(InVT);
1743 SmallVector<SDValue, 16> Ops(NumConcat);
1744 for (unsigned i=0; i < NumOperands; ++i)
1745 Ops[i] = N->getOperand(i);
1746 for (unsigned i = NumOperands; i != NumConcat; ++i)
1748 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &Ops[0], NumConcat);
1751 InputWidened = true;
1752 if (WidenVT == TLI.getTypeToTransformTo(*DAG.getContext(), InVT)) {
1753 // The inputs and the result are widen to the same value.
1755 for (i=1; i < NumOperands; ++i)
1756 if (N->getOperand(i).getOpcode() != ISD::UNDEF)
1759 if (i == NumOperands)
1760 // Everything but the first operand is an UNDEF so just return the
1761 // widened first operand.
1762 return GetWidenedVector(N->getOperand(0));
1764 if (NumOperands == 2) {
1765 // Replace concat of two operands with a shuffle.
1766 SmallVector<int, 16> MaskOps(WidenNumElts, -1);
1767 for (unsigned i = 0; i < NumInElts; ++i) {
1769 MaskOps[i + NumInElts] = i + WidenNumElts;
1771 return DAG.getVectorShuffle(WidenVT, dl,
1772 GetWidenedVector(N->getOperand(0)),
1773 GetWidenedVector(N->getOperand(1)),
1779 // Fall back to use extracts and build vector.
1780 EVT EltVT = WidenVT.getVectorElementType();
1781 SmallVector<SDValue, 16> Ops(WidenNumElts);
1783 for (unsigned i=0; i < NumOperands; ++i) {
1784 SDValue InOp = N->getOperand(i);
1786 InOp = GetWidenedVector(InOp);
1787 for (unsigned j=0; j < NumInElts; ++j)
1788 Ops[Idx++] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
1789 DAG.getIntPtrConstant(j));
1791 SDValue UndefVal = DAG.getUNDEF(EltVT);
1792 for (; Idx < WidenNumElts; ++Idx)
1793 Ops[Idx] = UndefVal;
1794 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], WidenNumElts);
1797 SDValue DAGTypeLegalizer::WidenVecRes_CONVERT_RNDSAT(SDNode *N) {
1798 DebugLoc dl = N->getDebugLoc();
1799 SDValue InOp = N->getOperand(0);
1800 SDValue RndOp = N->getOperand(3);
1801 SDValue SatOp = N->getOperand(4);
1803 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1804 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1806 EVT InVT = InOp.getValueType();
1807 EVT InEltVT = InVT.getVectorElementType();
1808 EVT InWidenVT = EVT::getVectorVT(*DAG.getContext(), InEltVT, WidenNumElts);
1810 SDValue DTyOp = DAG.getValueType(WidenVT);
1811 SDValue STyOp = DAG.getValueType(InWidenVT);
1812 ISD::CvtCode CvtCode = cast<CvtRndSatSDNode>(N)->getCvtCode();
1814 unsigned InVTNumElts = InVT.getVectorNumElements();
1815 if (getTypeAction(InVT) == TargetLowering::TypeWidenVector) {
1816 InOp = GetWidenedVector(InOp);
1817 InVT = InOp.getValueType();
1818 InVTNumElts = InVT.getVectorNumElements();
1819 if (InVTNumElts == WidenNumElts)
1820 return DAG.getConvertRndSat(WidenVT, dl, InOp, DTyOp, STyOp, RndOp,
1824 if (TLI.isTypeLegal(InWidenVT)) {
1825 // Because the result and the input are different vector types, widening
1826 // the result could create a legal type but widening the input might make
1827 // it an illegal type that might lead to repeatedly splitting the input
1828 // and then widening it. To avoid this, we widen the input only if
1829 // it results in a legal type.
1830 if (WidenNumElts % InVTNumElts == 0) {
1831 // Widen the input and call convert on the widened input vector.
1832 unsigned NumConcat = WidenNumElts/InVTNumElts;
1833 SmallVector<SDValue, 16> Ops(NumConcat);
1835 SDValue UndefVal = DAG.getUNDEF(InVT);
1836 for (unsigned i = 1; i != NumConcat; ++i)
1839 InOp = DAG.getNode(ISD::CONCAT_VECTORS, dl, InWidenVT, &Ops[0],NumConcat);
1840 return DAG.getConvertRndSat(WidenVT, dl, InOp, DTyOp, STyOp, RndOp,
1844 if (InVTNumElts % WidenNumElts == 0) {
1845 // Extract the input and convert the shorten input vector.
1846 InOp = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InWidenVT, InOp,
1847 DAG.getIntPtrConstant(0));
1848 return DAG.getConvertRndSat(WidenVT, dl, InOp, DTyOp, STyOp, RndOp,
1853 // Otherwise unroll into some nasty scalar code and rebuild the vector.
1854 SmallVector<SDValue, 16> Ops(WidenNumElts);
1855 EVT EltVT = WidenVT.getVectorElementType();
1856 DTyOp = DAG.getValueType(EltVT);
1857 STyOp = DAG.getValueType(InEltVT);
1859 unsigned MinElts = std::min(InVTNumElts, WidenNumElts);
1861 for (i=0; i < MinElts; ++i) {
1862 SDValue ExtVal = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, InEltVT, InOp,
1863 DAG.getIntPtrConstant(i));
1864 Ops[i] = DAG.getConvertRndSat(WidenVT, dl, ExtVal, DTyOp, STyOp, RndOp,
1868 SDValue UndefVal = DAG.getUNDEF(EltVT);
1869 for (; i < WidenNumElts; ++i)
1872 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], WidenNumElts);
1875 SDValue DAGTypeLegalizer::WidenVecRes_EXTRACT_SUBVECTOR(SDNode *N) {
1876 EVT VT = N->getValueType(0);
1877 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1878 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1879 SDValue InOp = N->getOperand(0);
1880 SDValue Idx = N->getOperand(1);
1881 DebugLoc dl = N->getDebugLoc();
1883 if (getTypeAction(InOp.getValueType()) == TargetLowering::TypeWidenVector)
1884 InOp = GetWidenedVector(InOp);
1886 EVT InVT = InOp.getValueType();
1888 // Check if we can just return the input vector after widening.
1889 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
1890 if (IdxVal == 0 && InVT == WidenVT)
1893 // Check if we can extract from the vector.
1894 unsigned InNumElts = InVT.getVectorNumElements();
1895 if (IdxVal % WidenNumElts == 0 && IdxVal + WidenNumElts < InNumElts)
1896 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, WidenVT, InOp, Idx);
1898 // We could try widening the input to the right length but for now, extract
1899 // the original elements, fill the rest with undefs and build a vector.
1900 SmallVector<SDValue, 16> Ops(WidenNumElts);
1901 EVT EltVT = VT.getVectorElementType();
1902 unsigned NumElts = VT.getVectorNumElements();
1904 for (i=0; i < NumElts; ++i)
1905 Ops[i] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
1906 DAG.getIntPtrConstant(IdxVal+i));
1908 SDValue UndefVal = DAG.getUNDEF(EltVT);
1909 for (; i < WidenNumElts; ++i)
1911 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], WidenNumElts);
1914 SDValue DAGTypeLegalizer::WidenVecRes_INSERT_VECTOR_ELT(SDNode *N) {
1915 SDValue InOp = GetWidenedVector(N->getOperand(0));
1916 return DAG.getNode(ISD::INSERT_VECTOR_ELT, N->getDebugLoc(),
1917 InOp.getValueType(), InOp,
1918 N->getOperand(1), N->getOperand(2));
1921 SDValue DAGTypeLegalizer::WidenVecRes_LOAD(SDNode *N) {
1922 LoadSDNode *LD = cast<LoadSDNode>(N);
1923 ISD::LoadExtType ExtType = LD->getExtensionType();
1926 SmallVector<SDValue, 16> LdChain; // Chain for the series of load
1927 if (ExtType != ISD::NON_EXTLOAD)
1928 Result = GenWidenVectorExtLoads(LdChain, LD, ExtType);
1930 Result = GenWidenVectorLoads(LdChain, LD);
1932 // If we generate a single load, we can use that for the chain. Otherwise,
1933 // build a factor node to remember the multiple loads are independent and
1936 if (LdChain.size() == 1)
1937 NewChain = LdChain[0];
1939 NewChain = DAG.getNode(ISD::TokenFactor, LD->getDebugLoc(), MVT::Other,
1940 &LdChain[0], LdChain.size());
1942 // Modified the chain - switch anything that used the old chain to use
1944 ReplaceValueWith(SDValue(N, 1), NewChain);
1949 SDValue DAGTypeLegalizer::WidenVecRes_SCALAR_TO_VECTOR(SDNode *N) {
1950 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1951 return DAG.getNode(ISD::SCALAR_TO_VECTOR, N->getDebugLoc(),
1952 WidenVT, N->getOperand(0));
1955 SDValue DAGTypeLegalizer::WidenVecRes_SELECT(SDNode *N) {
1956 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1957 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1959 SDValue Cond1 = N->getOperand(0);
1960 EVT CondVT = Cond1.getValueType();
1961 if (CondVT.isVector()) {
1962 EVT CondEltVT = CondVT.getVectorElementType();
1963 EVT CondWidenVT = EVT::getVectorVT(*DAG.getContext(),
1964 CondEltVT, WidenNumElts);
1965 if (getTypeAction(CondVT) == TargetLowering::TypeWidenVector)
1966 Cond1 = GetWidenedVector(Cond1);
1968 if (Cond1.getValueType() != CondWidenVT)
1969 Cond1 = ModifyToType(Cond1, CondWidenVT);
1972 SDValue InOp1 = GetWidenedVector(N->getOperand(1));
1973 SDValue InOp2 = GetWidenedVector(N->getOperand(2));
1974 assert(InOp1.getValueType() == WidenVT && InOp2.getValueType() == WidenVT);
1975 return DAG.getNode(N->getOpcode(), N->getDebugLoc(),
1976 WidenVT, Cond1, InOp1, InOp2);
1979 SDValue DAGTypeLegalizer::WidenVecRes_SELECT_CC(SDNode *N) {
1980 SDValue InOp1 = GetWidenedVector(N->getOperand(2));
1981 SDValue InOp2 = GetWidenedVector(N->getOperand(3));
1982 return DAG.getNode(ISD::SELECT_CC, N->getDebugLoc(),
1983 InOp1.getValueType(), N->getOperand(0),
1984 N->getOperand(1), InOp1, InOp2, N->getOperand(4));
1987 SDValue DAGTypeLegalizer::WidenVecRes_SETCC(SDNode *N) {
1988 assert(N->getValueType(0).isVector() ==
1989 N->getOperand(0).getValueType().isVector() &&
1990 "Scalar/Vector type mismatch");
1991 if (N->getValueType(0).isVector()) return WidenVecRes_VSETCC(N);
1993 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1994 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
1995 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1996 return DAG.getNode(ISD::SETCC, N->getDebugLoc(), WidenVT,
1997 InOp1, InOp2, N->getOperand(2));
2000 SDValue DAGTypeLegalizer::WidenVecRes_UNDEF(SDNode *N) {
2001 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
2002 return DAG.getUNDEF(WidenVT);
2005 SDValue DAGTypeLegalizer::WidenVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N) {
2006 EVT VT = N->getValueType(0);
2007 DebugLoc dl = N->getDebugLoc();
2009 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2010 unsigned NumElts = VT.getVectorNumElements();
2011 unsigned WidenNumElts = WidenVT.getVectorNumElements();
2013 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
2014 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
2016 // Adjust mask based on new input vector length.
2017 SmallVector<int, 16> NewMask;
2018 for (unsigned i = 0; i != NumElts; ++i) {
2019 int Idx = N->getMaskElt(i);
2020 if (Idx < (int)NumElts)
2021 NewMask.push_back(Idx);
2023 NewMask.push_back(Idx - NumElts + WidenNumElts);
2025 for (unsigned i = NumElts; i != WidenNumElts; ++i)
2026 NewMask.push_back(-1);
2027 return DAG.getVectorShuffle(WidenVT, dl, InOp1, InOp2, &NewMask[0]);
2030 SDValue DAGTypeLegalizer::WidenVecRes_VSETCC(SDNode *N) {
2031 assert(N->getValueType(0).isVector() &&
2032 N->getOperand(0).getValueType().isVector() &&
2033 "Operands must be vectors");
2034 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
2035 unsigned WidenNumElts = WidenVT.getVectorNumElements();
2037 SDValue InOp1 = N->getOperand(0);
2038 EVT InVT = InOp1.getValueType();
2039 assert(InVT.isVector() && "can not widen non vector type");
2040 EVT WidenInVT = EVT::getVectorVT(*DAG.getContext(),
2041 InVT.getVectorElementType(), WidenNumElts);
2042 InOp1 = GetWidenedVector(InOp1);
2043 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
2045 // Assume that the input and output will be widen appropriately. If not,
2046 // we will have to unroll it at some point.
2047 assert(InOp1.getValueType() == WidenInVT &&
2048 InOp2.getValueType() == WidenInVT &&
2049 "Input not widened to expected type!");
2051 return DAG.getNode(ISD::SETCC, N->getDebugLoc(),
2052 WidenVT, InOp1, InOp2, N->getOperand(2));
2056 //===----------------------------------------------------------------------===//
2057 // Widen Vector Operand
2058 //===----------------------------------------------------------------------===//
2059 bool DAGTypeLegalizer::WidenVectorOperand(SDNode *N, unsigned ResNo) {
2060 DEBUG(dbgs() << "Widen node operand " << ResNo << ": ";
2063 SDValue Res = SDValue();
2065 switch (N->getOpcode()) {
2068 dbgs() << "WidenVectorOperand op #" << ResNo << ": ";
2072 llvm_unreachable("Do not know how to widen this operator's operand!");
2074 case ISD::BITCAST: Res = WidenVecOp_BITCAST(N); break;
2075 case ISD::CONCAT_VECTORS: Res = WidenVecOp_CONCAT_VECTORS(N); break;
2076 case ISD::EXTRACT_SUBVECTOR: Res = WidenVecOp_EXTRACT_SUBVECTOR(N); break;
2077 case ISD::EXTRACT_VECTOR_ELT: Res = WidenVecOp_EXTRACT_VECTOR_ELT(N); break;
2078 case ISD::STORE: Res = WidenVecOp_STORE(N); break;
2079 case ISD::SETCC: Res = WidenVecOp_SETCC(N); break;
2081 case ISD::FP_EXTEND:
2082 case ISD::FP_TO_SINT:
2083 case ISD::FP_TO_UINT:
2084 case ISD::SINT_TO_FP:
2085 case ISD::UINT_TO_FP:
2087 case ISD::SIGN_EXTEND:
2088 case ISD::ZERO_EXTEND:
2089 case ISD::ANY_EXTEND:
2090 Res = WidenVecOp_Convert(N);
2094 // If Res is null, the sub-method took care of registering the result.
2095 if (!Res.getNode()) return false;
2097 // If the result is N, the sub-method updated N in place. Tell the legalizer
2099 if (Res.getNode() == N)
2103 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
2104 "Invalid operand expansion");
2106 ReplaceValueWith(SDValue(N, 0), Res);
2110 SDValue DAGTypeLegalizer::WidenVecOp_Convert(SDNode *N) {
2111 // Since the result is legal and the input is illegal, it is unlikely
2112 // that we can fix the input to a legal type so unroll the convert
2113 // into some scalar code and create a nasty build vector.
2114 EVT VT = N->getValueType(0);
2115 EVT EltVT = VT.getVectorElementType();
2116 DebugLoc dl = N->getDebugLoc();
2117 unsigned NumElts = VT.getVectorNumElements();
2118 SDValue InOp = N->getOperand(0);
2119 if (getTypeAction(InOp.getValueType()) == TargetLowering::TypeWidenVector)
2120 InOp = GetWidenedVector(InOp);
2121 EVT InVT = InOp.getValueType();
2122 EVT InEltVT = InVT.getVectorElementType();
2124 unsigned Opcode = N->getOpcode();
2125 SmallVector<SDValue, 16> Ops(NumElts);
2126 for (unsigned i=0; i < NumElts; ++i)
2127 Ops[i] = DAG.getNode(Opcode, dl, EltVT,
2128 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, InEltVT, InOp,
2129 DAG.getIntPtrConstant(i)));
2131 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, &Ops[0], NumElts);
2134 SDValue DAGTypeLegalizer::WidenVecOp_BITCAST(SDNode *N) {
2135 EVT VT = N->getValueType(0);
2136 SDValue InOp = GetWidenedVector(N->getOperand(0));
2137 EVT InWidenVT = InOp.getValueType();
2138 DebugLoc dl = N->getDebugLoc();
2140 // Check if we can convert between two legal vector types and extract.
2141 unsigned InWidenSize = InWidenVT.getSizeInBits();
2142 unsigned Size = VT.getSizeInBits();
2143 // x86mmx is not an acceptable vector element type, so don't try.
2144 if (InWidenSize % Size == 0 && !VT.isVector() && VT != MVT::x86mmx) {
2145 unsigned NewNumElts = InWidenSize / Size;
2146 EVT NewVT = EVT::getVectorVT(*DAG.getContext(), VT, NewNumElts);
2147 if (TLI.isTypeLegal(NewVT)) {
2148 SDValue BitOp = DAG.getNode(ISD::BITCAST, dl, NewVT, InOp);
2149 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, VT, BitOp,
2150 DAG.getIntPtrConstant(0));
2154 return CreateStackStoreLoad(InOp, VT);
2157 SDValue DAGTypeLegalizer::WidenVecOp_CONCAT_VECTORS(SDNode *N) {
2158 // If the input vector is not legal, it is likely that we will not find a
2159 // legal vector of the same size. Replace the concatenate vector with a
2160 // nasty build vector.
2161 EVT VT = N->getValueType(0);
2162 EVT EltVT = VT.getVectorElementType();
2163 DebugLoc dl = N->getDebugLoc();
2164 unsigned NumElts = VT.getVectorNumElements();
2165 SmallVector<SDValue, 16> Ops(NumElts);
2167 EVT InVT = N->getOperand(0).getValueType();
2168 unsigned NumInElts = InVT.getVectorNumElements();
2171 unsigned NumOperands = N->getNumOperands();
2172 for (unsigned i=0; i < NumOperands; ++i) {
2173 SDValue InOp = N->getOperand(i);
2174 if (getTypeAction(InOp.getValueType()) == TargetLowering::TypeWidenVector)
2175 InOp = GetWidenedVector(InOp);
2176 for (unsigned j=0; j < NumInElts; ++j)
2177 Ops[Idx++] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
2178 DAG.getIntPtrConstant(j));
2180 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, &Ops[0], NumElts);
2183 SDValue DAGTypeLegalizer::WidenVecOp_EXTRACT_SUBVECTOR(SDNode *N) {
2184 SDValue InOp = GetWidenedVector(N->getOperand(0));
2185 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, N->getDebugLoc(),
2186 N->getValueType(0), InOp, N->getOperand(1));
2189 SDValue DAGTypeLegalizer::WidenVecOp_EXTRACT_VECTOR_ELT(SDNode *N) {
2190 SDValue InOp = GetWidenedVector(N->getOperand(0));
2191 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, N->getDebugLoc(),
2192 N->getValueType(0), InOp, N->getOperand(1));
2195 SDValue DAGTypeLegalizer::WidenVecOp_STORE(SDNode *N) {
2196 // We have to widen the value but we want only to store the original
2198 StoreSDNode *ST = cast<StoreSDNode>(N);
2200 SmallVector<SDValue, 16> StChain;
2201 if (ST->isTruncatingStore())
2202 GenWidenVectorTruncStores(StChain, ST);
2204 GenWidenVectorStores(StChain, ST);
2206 if (StChain.size() == 1)
2209 return DAG.getNode(ISD::TokenFactor, ST->getDebugLoc(),
2210 MVT::Other,&StChain[0],StChain.size());
2213 SDValue DAGTypeLegalizer::WidenVecOp_SETCC(SDNode *N) {
2214 SDValue InOp0 = GetWidenedVector(N->getOperand(0));
2215 SDValue InOp1 = GetWidenedVector(N->getOperand(1));
2216 DebugLoc dl = N->getDebugLoc();
2218 // WARNING: In this code we widen the compare instruction with garbage.
2219 // This garbage may contain denormal floats which may be slow. Is this a real
2220 // concern ? Should we zero the unused lanes if this is a float compare ?
2222 // Get a new SETCC node to compare the newly widened operands.
2223 // Only some of the compared elements are legal.
2224 EVT SVT = TLI.getSetCCResultType(InOp0.getValueType());
2225 SDValue WideSETCC = DAG.getNode(ISD::SETCC, N->getDebugLoc(),
2226 SVT, InOp0, InOp1, N->getOperand(2));
2228 // Extract the needed results from the result vector.
2229 EVT ResVT = EVT::getVectorVT(*DAG.getContext(),
2230 SVT.getVectorElementType(),
2231 N->getValueType(0).getVectorNumElements());
2232 SDValue CC = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl,
2233 ResVT, WideSETCC, DAG.getIntPtrConstant(0));
2235 return PromoteTargetBoolean(CC, N->getValueType(0));
2239 //===----------------------------------------------------------------------===//
2240 // Vector Widening Utilities
2241 //===----------------------------------------------------------------------===//
2243 // Utility function to find the type to chop up a widen vector for load/store
2244 // TLI: Target lowering used to determine legal types.
2245 // Width: Width left need to load/store.
2246 // WidenVT: The widen vector type to load to/store from
2247 // Align: If 0, don't allow use of a wider type
2248 // WidenEx: If Align is not 0, the amount additional we can load/store from.
2250 static EVT FindMemType(SelectionDAG& DAG, const TargetLowering &TLI,
2251 unsigned Width, EVT WidenVT,
2252 unsigned Align = 0, unsigned WidenEx = 0) {
2253 EVT WidenEltVT = WidenVT.getVectorElementType();
2254 unsigned WidenWidth = WidenVT.getSizeInBits();
2255 unsigned WidenEltWidth = WidenEltVT.getSizeInBits();
2256 unsigned AlignInBits = Align*8;
2258 // If we have one element to load/store, return it.
2259 EVT RetVT = WidenEltVT;
2260 if (Width == WidenEltWidth)
2263 // See if there is larger legal integer than the element type to load/store
2265 for (VT = (unsigned)MVT::LAST_INTEGER_VALUETYPE;
2266 VT >= (unsigned)MVT::FIRST_INTEGER_VALUETYPE; --VT) {
2267 EVT MemVT((MVT::SimpleValueType) VT);
2268 unsigned MemVTWidth = MemVT.getSizeInBits();
2269 if (MemVT.getSizeInBits() <= WidenEltWidth)
2271 if (TLI.isTypeLegal(MemVT) && (WidenWidth % MemVTWidth) == 0 &&
2272 isPowerOf2_32(WidenWidth / MemVTWidth) &&
2273 (MemVTWidth <= Width ||
2274 (Align!=0 && MemVTWidth<=AlignInBits && MemVTWidth<=Width+WidenEx))) {
2280 // See if there is a larger vector type to load/store that has the same vector
2281 // element type and is evenly divisible with the WidenVT.
2282 for (VT = (unsigned)MVT::LAST_VECTOR_VALUETYPE;
2283 VT >= (unsigned)MVT::FIRST_VECTOR_VALUETYPE; --VT) {
2284 EVT MemVT = (MVT::SimpleValueType) VT;
2285 unsigned MemVTWidth = MemVT.getSizeInBits();
2286 if (TLI.isTypeLegal(MemVT) && WidenEltVT == MemVT.getVectorElementType() &&
2287 (WidenWidth % MemVTWidth) == 0 &&
2288 isPowerOf2_32(WidenWidth / MemVTWidth) &&
2289 (MemVTWidth <= Width ||
2290 (Align!=0 && MemVTWidth<=AlignInBits && MemVTWidth<=Width+WidenEx))) {
2291 if (RetVT.getSizeInBits() < MemVTWidth || MemVT == WidenVT)
2299 // Builds a vector type from scalar loads
2300 // VecTy: Resulting Vector type
2301 // LDOps: Load operators to build a vector type
2302 // [Start,End) the list of loads to use.
2303 static SDValue BuildVectorFromScalar(SelectionDAG& DAG, EVT VecTy,
2304 SmallVector<SDValue, 16>& LdOps,
2305 unsigned Start, unsigned End) {
2306 DebugLoc dl = LdOps[Start].getDebugLoc();
2307 EVT LdTy = LdOps[Start].getValueType();
2308 unsigned Width = VecTy.getSizeInBits();
2309 unsigned NumElts = Width / LdTy.getSizeInBits();
2310 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), LdTy, NumElts);
2313 SDValue VecOp = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, NewVecVT,LdOps[Start]);
2315 for (unsigned i = Start + 1; i != End; ++i) {
2316 EVT NewLdTy = LdOps[i].getValueType();
2317 if (NewLdTy != LdTy) {
2318 NumElts = Width / NewLdTy.getSizeInBits();
2319 NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewLdTy, NumElts);
2320 VecOp = DAG.getNode(ISD::BITCAST, dl, NewVecVT, VecOp);
2321 // Readjust position and vector position based on new load type
2322 Idx = Idx * LdTy.getSizeInBits() / NewLdTy.getSizeInBits();
2325 VecOp = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NewVecVT, VecOp, LdOps[i],
2326 DAG.getIntPtrConstant(Idx++));
2328 return DAG.getNode(ISD::BITCAST, dl, VecTy, VecOp);
2331 SDValue DAGTypeLegalizer::GenWidenVectorLoads(SmallVector<SDValue, 16> &LdChain,
2333 // The strategy assumes that we can efficiently load powers of two widths.
2334 // The routines chops the vector into the largest vector loads with the same
2335 // element type or scalar loads and then recombines it to the widen vector
2337 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(),LD->getValueType(0));
2338 unsigned WidenWidth = WidenVT.getSizeInBits();
2339 EVT LdVT = LD->getMemoryVT();
2340 DebugLoc dl = LD->getDebugLoc();
2341 assert(LdVT.isVector() && WidenVT.isVector());
2342 assert(LdVT.getVectorElementType() == WidenVT.getVectorElementType());
2345 SDValue Chain = LD->getChain();
2346 SDValue BasePtr = LD->getBasePtr();
2347 unsigned Align = LD->getAlignment();
2348 bool isVolatile = LD->isVolatile();
2349 bool isNonTemporal = LD->isNonTemporal();
2350 bool isInvariant = LD->isInvariant();
2352 int LdWidth = LdVT.getSizeInBits();
2353 int WidthDiff = WidenWidth - LdWidth; // Difference
2354 unsigned LdAlign = (isVolatile) ? 0 : Align; // Allow wider loads
2356 // Find the vector type that can load from.
2357 EVT NewVT = FindMemType(DAG, TLI, LdWidth, WidenVT, LdAlign, WidthDiff);
2358 int NewVTWidth = NewVT.getSizeInBits();
2359 SDValue LdOp = DAG.getLoad(NewVT, dl, Chain, BasePtr, LD->getPointerInfo(),
2360 isVolatile, isNonTemporal, isInvariant, Align);
2361 LdChain.push_back(LdOp.getValue(1));
2363 // Check if we can load the element with one instruction
2364 if (LdWidth <= NewVTWidth) {
2365 if (!NewVT.isVector()) {
2366 unsigned NumElts = WidenWidth / NewVTWidth;
2367 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewVT, NumElts);
2368 SDValue VecOp = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, NewVecVT, LdOp);
2369 return DAG.getNode(ISD::BITCAST, dl, WidenVT, VecOp);
2371 if (NewVT == WidenVT)
2374 assert(WidenWidth % NewVTWidth == 0);
2375 unsigned NumConcat = WidenWidth / NewVTWidth;
2376 SmallVector<SDValue, 16> ConcatOps(NumConcat);
2377 SDValue UndefVal = DAG.getUNDEF(NewVT);
2378 ConcatOps[0] = LdOp;
2379 for (unsigned i = 1; i != NumConcat; ++i)
2380 ConcatOps[i] = UndefVal;
2381 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &ConcatOps[0],
2385 // Load vector by using multiple loads from largest vector to scalar
2386 SmallVector<SDValue, 16> LdOps;
2387 LdOps.push_back(LdOp);
2389 LdWidth -= NewVTWidth;
2390 unsigned Offset = 0;
2392 while (LdWidth > 0) {
2393 unsigned Increment = NewVTWidth / 8;
2394 Offset += Increment;
2395 BasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr,
2396 DAG.getIntPtrConstant(Increment));
2399 if (LdWidth < NewVTWidth) {
2400 // Our current type we are using is too large, find a better size
2401 NewVT = FindMemType(DAG, TLI, LdWidth, WidenVT, LdAlign, WidthDiff);
2402 NewVTWidth = NewVT.getSizeInBits();
2403 L = DAG.getLoad(NewVT, dl, Chain, BasePtr,
2404 LD->getPointerInfo().getWithOffset(Offset),
2406 isNonTemporal, isInvariant,
2407 MinAlign(Align, Increment));
2408 LdChain.push_back(L.getValue(1));
2409 if (L->getValueType(0).isVector()) {
2410 SmallVector<SDValue, 16> Loads;
2412 unsigned size = L->getValueSizeInBits(0);
2413 while (size < LdOp->getValueSizeInBits(0)) {
2414 Loads.push_back(DAG.getUNDEF(L->getValueType(0)));
2415 size += L->getValueSizeInBits(0);
2417 L = DAG.getNode(ISD::CONCAT_VECTORS, dl, LdOp->getValueType(0),
2418 &Loads[0], Loads.size());
2421 L = DAG.getLoad(NewVT, dl, Chain, BasePtr,
2422 LD->getPointerInfo().getWithOffset(Offset), isVolatile,
2423 isNonTemporal, isInvariant, MinAlign(Align, Increment));
2424 LdChain.push_back(L.getValue(1));
2430 LdWidth -= NewVTWidth;
2433 // Build the vector from the loads operations
2434 unsigned End = LdOps.size();
2435 if (!LdOps[0].getValueType().isVector())
2436 // All the loads are scalar loads.
2437 return BuildVectorFromScalar(DAG, WidenVT, LdOps, 0, End);
2439 // If the load contains vectors, build the vector using concat vector.
2440 // All of the vectors used to loads are power of 2 and the scalars load
2441 // can be combined to make a power of 2 vector.
2442 SmallVector<SDValue, 16> ConcatOps(End);
2445 EVT LdTy = LdOps[i].getValueType();
2446 // First combine the scalar loads to a vector
2447 if (!LdTy.isVector()) {
2448 for (--i; i >= 0; --i) {
2449 LdTy = LdOps[i].getValueType();
2450 if (LdTy.isVector())
2453 ConcatOps[--Idx] = BuildVectorFromScalar(DAG, LdTy, LdOps, i+1, End);
2455 ConcatOps[--Idx] = LdOps[i];
2456 for (--i; i >= 0; --i) {
2457 EVT NewLdTy = LdOps[i].getValueType();
2458 if (NewLdTy != LdTy) {
2459 // Create a larger vector
2460 ConcatOps[End-1] = DAG.getNode(ISD::CONCAT_VECTORS, dl, NewLdTy,
2461 &ConcatOps[Idx], End - Idx);
2465 ConcatOps[--Idx] = LdOps[i];
2468 if (WidenWidth == LdTy.getSizeInBits()*(End - Idx))
2469 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT,
2470 &ConcatOps[Idx], End - Idx);
2472 // We need to fill the rest with undefs to build the vector
2473 unsigned NumOps = WidenWidth / LdTy.getSizeInBits();
2474 SmallVector<SDValue, 16> WidenOps(NumOps);
2475 SDValue UndefVal = DAG.getUNDEF(LdTy);
2478 for (; i != End-Idx; ++i)
2479 WidenOps[i] = ConcatOps[Idx+i];
2480 for (; i != NumOps; ++i)
2481 WidenOps[i] = UndefVal;
2483 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &WidenOps[0],NumOps);
2487 DAGTypeLegalizer::GenWidenVectorExtLoads(SmallVector<SDValue, 16>& LdChain,
2489 ISD::LoadExtType ExtType) {
2490 // For extension loads, it may not be more efficient to chop up the vector
2491 // and then extended it. Instead, we unroll the load and build a new vector.
2492 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(),LD->getValueType(0));
2493 EVT LdVT = LD->getMemoryVT();
2494 DebugLoc dl = LD->getDebugLoc();
2495 assert(LdVT.isVector() && WidenVT.isVector());
2498 SDValue Chain = LD->getChain();
2499 SDValue BasePtr = LD->getBasePtr();
2500 unsigned Align = LD->getAlignment();
2501 bool isVolatile = LD->isVolatile();
2502 bool isNonTemporal = LD->isNonTemporal();
2504 EVT EltVT = WidenVT.getVectorElementType();
2505 EVT LdEltVT = LdVT.getVectorElementType();
2506 unsigned NumElts = LdVT.getVectorNumElements();
2508 // Load each element and widen
2509 unsigned WidenNumElts = WidenVT.getVectorNumElements();
2510 SmallVector<SDValue, 16> Ops(WidenNumElts);
2511 unsigned Increment = LdEltVT.getSizeInBits() / 8;
2512 Ops[0] = DAG.getExtLoad(ExtType, dl, EltVT, Chain, BasePtr,
2513 LD->getPointerInfo(),
2514 LdEltVT, isVolatile, isNonTemporal, Align);
2515 LdChain.push_back(Ops[0].getValue(1));
2516 unsigned i = 0, Offset = Increment;
2517 for (i=1; i < NumElts; ++i, Offset += Increment) {
2518 SDValue NewBasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(),
2519 BasePtr, DAG.getIntPtrConstant(Offset));
2520 Ops[i] = DAG.getExtLoad(ExtType, dl, EltVT, Chain, NewBasePtr,
2521 LD->getPointerInfo().getWithOffset(Offset), LdEltVT,
2522 isVolatile, isNonTemporal, Align);
2523 LdChain.push_back(Ops[i].getValue(1));
2526 // Fill the rest with undefs
2527 SDValue UndefVal = DAG.getUNDEF(EltVT);
2528 for (; i != WidenNumElts; ++i)
2531 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], Ops.size());
2535 void DAGTypeLegalizer::GenWidenVectorStores(SmallVector<SDValue, 16>& StChain,
2537 // The strategy assumes that we can efficiently store powers of two widths.
2538 // The routines chops the vector into the largest vector stores with the same
2539 // element type or scalar stores.
2540 SDValue Chain = ST->getChain();
2541 SDValue BasePtr = ST->getBasePtr();
2542 unsigned Align = ST->getAlignment();
2543 bool isVolatile = ST->isVolatile();
2544 bool isNonTemporal = ST->isNonTemporal();
2545 SDValue ValOp = GetWidenedVector(ST->getValue());
2546 DebugLoc dl = ST->getDebugLoc();
2548 EVT StVT = ST->getMemoryVT();
2549 unsigned StWidth = StVT.getSizeInBits();
2550 EVT ValVT = ValOp.getValueType();
2551 unsigned ValWidth = ValVT.getSizeInBits();
2552 EVT ValEltVT = ValVT.getVectorElementType();
2553 unsigned ValEltWidth = ValEltVT.getSizeInBits();
2554 assert(StVT.getVectorElementType() == ValEltVT);
2556 int Idx = 0; // current index to store
2557 unsigned Offset = 0; // offset from base to store
2558 while (StWidth != 0) {
2559 // Find the largest vector type we can store with
2560 EVT NewVT = FindMemType(DAG, TLI, StWidth, ValVT);
2561 unsigned NewVTWidth = NewVT.getSizeInBits();
2562 unsigned Increment = NewVTWidth / 8;
2563 if (NewVT.isVector()) {
2564 unsigned NumVTElts = NewVT.getVectorNumElements();
2566 SDValue EOp = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, NewVT, ValOp,
2567 DAG.getIntPtrConstant(Idx));
2568 StChain.push_back(DAG.getStore(Chain, dl, EOp, BasePtr,
2569 ST->getPointerInfo().getWithOffset(Offset),
2570 isVolatile, isNonTemporal,
2571 MinAlign(Align, Offset)));
2572 StWidth -= NewVTWidth;
2573 Offset += Increment;
2575 BasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr,
2576 DAG.getIntPtrConstant(Increment));
2577 } while (StWidth != 0 && StWidth >= NewVTWidth);
2579 // Cast the vector to the scalar type we can store
2580 unsigned NumElts = ValWidth / NewVTWidth;
2581 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewVT, NumElts);
2582 SDValue VecOp = DAG.getNode(ISD::BITCAST, dl, NewVecVT, ValOp);
2583 // Readjust index position based on new vector type
2584 Idx = Idx * ValEltWidth / NewVTWidth;
2586 SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NewVT, VecOp,
2587 DAG.getIntPtrConstant(Idx++));
2588 StChain.push_back(DAG.getStore(Chain, dl, EOp, BasePtr,
2589 ST->getPointerInfo().getWithOffset(Offset),
2590 isVolatile, isNonTemporal,
2591 MinAlign(Align, Offset)));
2592 StWidth -= NewVTWidth;
2593 Offset += Increment;
2594 BasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr,
2595 DAG.getIntPtrConstant(Increment));
2596 } while (StWidth != 0 && StWidth >= NewVTWidth);
2597 // Restore index back to be relative to the original widen element type
2598 Idx = Idx * NewVTWidth / ValEltWidth;
2604 DAGTypeLegalizer::GenWidenVectorTruncStores(SmallVector<SDValue, 16>& StChain,
2606 // For extension loads, it may not be more efficient to truncate the vector
2607 // and then store it. Instead, we extract each element and then store it.
2608 SDValue Chain = ST->getChain();
2609 SDValue BasePtr = ST->getBasePtr();
2610 unsigned Align = ST->getAlignment();
2611 bool isVolatile = ST->isVolatile();
2612 bool isNonTemporal = ST->isNonTemporal();
2613 SDValue ValOp = GetWidenedVector(ST->getValue());
2614 DebugLoc dl = ST->getDebugLoc();
2616 EVT StVT = ST->getMemoryVT();
2617 EVT ValVT = ValOp.getValueType();
2619 // It must be true that we the widen vector type is bigger than where
2620 // we need to store.
2621 assert(StVT.isVector() && ValOp.getValueType().isVector());
2622 assert(StVT.bitsLT(ValOp.getValueType()));
2624 // For truncating stores, we can not play the tricks of chopping legal
2625 // vector types and bit cast it to the right type. Instead, we unroll
2627 EVT StEltVT = StVT.getVectorElementType();
2628 EVT ValEltVT = ValVT.getVectorElementType();
2629 unsigned Increment = ValEltVT.getSizeInBits() / 8;
2630 unsigned NumElts = StVT.getVectorNumElements();
2631 SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ValEltVT, ValOp,
2632 DAG.getIntPtrConstant(0));
2633 StChain.push_back(DAG.getTruncStore(Chain, dl, EOp, BasePtr,
2634 ST->getPointerInfo(), StEltVT,
2635 isVolatile, isNonTemporal, Align));
2636 unsigned Offset = Increment;
2637 for (unsigned i=1; i < NumElts; ++i, Offset += Increment) {
2638 SDValue NewBasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(),
2639 BasePtr, DAG.getIntPtrConstant(Offset));
2640 SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ValEltVT, ValOp,
2641 DAG.getIntPtrConstant(0));
2642 StChain.push_back(DAG.getTruncStore(Chain, dl, EOp, NewBasePtr,
2643 ST->getPointerInfo().getWithOffset(Offset),
2644 StEltVT, isVolatile, isNonTemporal,
2645 MinAlign(Align, Offset)));
2649 /// Modifies a vector input (widen or narrows) to a vector of NVT. The
2650 /// input vector must have the same element type as NVT.
2651 SDValue DAGTypeLegalizer::ModifyToType(SDValue InOp, EVT NVT) {
2652 // Note that InOp might have been widened so it might already have
2653 // the right width or it might need be narrowed.
2654 EVT InVT = InOp.getValueType();
2655 assert(InVT.getVectorElementType() == NVT.getVectorElementType() &&
2656 "input and widen element type must match");
2657 DebugLoc dl = InOp.getDebugLoc();
2659 // Check if InOp already has the right width.
2663 unsigned InNumElts = InVT.getVectorNumElements();
2664 unsigned WidenNumElts = NVT.getVectorNumElements();
2665 if (WidenNumElts > InNumElts && WidenNumElts % InNumElts == 0) {
2666 unsigned NumConcat = WidenNumElts / InNumElts;
2667 SmallVector<SDValue, 16> Ops(NumConcat);
2668 SDValue UndefVal = DAG.getUNDEF(InVT);
2670 for (unsigned i = 1; i != NumConcat; ++i)
2673 return DAG.getNode(ISD::CONCAT_VECTORS, dl, NVT, &Ops[0], NumConcat);
2676 if (WidenNumElts < InNumElts && InNumElts % WidenNumElts)
2677 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, NVT, InOp,
2678 DAG.getIntPtrConstant(0));
2680 // Fall back to extract and build.
2681 SmallVector<SDValue, 16> Ops(WidenNumElts);
2682 EVT EltVT = NVT.getVectorElementType();
2683 unsigned MinNumElts = std::min(WidenNumElts, InNumElts);
2685 for (Idx = 0; Idx < MinNumElts; ++Idx)
2686 Ops[Idx] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
2687 DAG.getIntPtrConstant(Idx));
2689 SDValue UndefVal = DAG.getUNDEF(EltVT);
2690 for ( ; Idx < WidenNumElts; ++Idx)
2691 Ops[Idx] = UndefVal;
2692 return DAG.getNode(ISD::BUILD_VECTOR, dl, NVT, &Ops[0], WidenNumElts);