1 //===-- llvm/CodeGen/MachineBasicBlock.cpp ----------------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Collect the sequence of machine instructions for a basic block.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/MachineBasicBlock.h"
15 #include "llvm/ADT/SmallPtrSet.h"
16 #include "llvm/ADT/SmallString.h"
17 #include "llvm/Assembly/Writer.h"
18 #include "llvm/CodeGen/LiveIntervalAnalysis.h"
19 #include "llvm/CodeGen/LiveVariables.h"
20 #include "llvm/CodeGen/MachineDominators.h"
21 #include "llvm/CodeGen/MachineFunction.h"
22 #include "llvm/CodeGen/MachineLoopInfo.h"
23 #include "llvm/CodeGen/MachineRegisterInfo.h"
24 #include "llvm/CodeGen/SlotIndexes.h"
25 #include "llvm/IR/BasicBlock.h"
26 #include "llvm/IR/DataLayout.h"
27 #include "llvm/MC/MCAsmInfo.h"
28 #include "llvm/MC/MCContext.h"
29 #include "llvm/Support/Debug.h"
30 #include "llvm/Support/LeakDetector.h"
31 #include "llvm/Support/raw_ostream.h"
32 #include "llvm/Target/TargetInstrInfo.h"
33 #include "llvm/Target/TargetMachine.h"
34 #include "llvm/Target/TargetRegisterInfo.h"
38 MachineBasicBlock::MachineBasicBlock(MachineFunction &mf, const BasicBlock *bb)
39 : BB(bb), Number(-1), xParent(&mf), Alignment(0), IsLandingPad(false),
44 MachineBasicBlock::~MachineBasicBlock() {
45 LeakDetector::removeGarbageObject(this);
48 /// getSymbol - Return the MCSymbol for this basic block.
50 MCSymbol *MachineBasicBlock::getSymbol() const {
51 const MachineFunction *MF = getParent();
52 MCContext &Ctx = MF->getContext();
53 const char *Prefix = Ctx.getAsmInfo().getPrivateGlobalPrefix();
54 return Ctx.GetOrCreateSymbol(Twine(Prefix) + "BB" +
55 Twine(MF->getFunctionNumber()) + "_" +
60 raw_ostream &llvm::operator<<(raw_ostream &OS, const MachineBasicBlock &MBB) {
65 /// addNodeToList (MBB) - When an MBB is added to an MF, we need to update the
66 /// parent pointer of the MBB, the MBB numbering, and any instructions in the
67 /// MBB to be on the right operand list for registers.
69 /// MBBs start out as #-1. When a MBB is added to a MachineFunction, it
70 /// gets the next available unique MBB number. If it is removed from a
71 /// MachineFunction, it goes back to being #-1.
72 void ilist_traits<MachineBasicBlock>::addNodeToList(MachineBasicBlock *N) {
73 MachineFunction &MF = *N->getParent();
74 N->Number = MF.addToMBBNumbering(N);
76 // Make sure the instructions have their operands in the reginfo lists.
77 MachineRegisterInfo &RegInfo = MF.getRegInfo();
78 for (MachineBasicBlock::instr_iterator
79 I = N->instr_begin(), E = N->instr_end(); I != E; ++I)
80 I->AddRegOperandsToUseLists(RegInfo);
82 LeakDetector::removeGarbageObject(N);
85 void ilist_traits<MachineBasicBlock>::removeNodeFromList(MachineBasicBlock *N) {
86 N->getParent()->removeFromMBBNumbering(N->Number);
88 LeakDetector::addGarbageObject(N);
92 /// addNodeToList (MI) - When we add an instruction to a basic block
93 /// list, we update its parent pointer and add its operands from reg use/def
94 /// lists if appropriate.
95 void ilist_traits<MachineInstr>::addNodeToList(MachineInstr *N) {
96 assert(N->getParent() == 0 && "machine instruction already in a basic block");
99 // Add the instruction's register operands to their corresponding
101 MachineFunction *MF = Parent->getParent();
102 N->AddRegOperandsToUseLists(MF->getRegInfo());
104 LeakDetector::removeGarbageObject(N);
107 /// removeNodeFromList (MI) - When we remove an instruction from a basic block
108 /// list, we update its parent pointer and remove its operands from reg use/def
109 /// lists if appropriate.
110 void ilist_traits<MachineInstr>::removeNodeFromList(MachineInstr *N) {
111 assert(N->getParent() != 0 && "machine instruction not in a basic block");
113 // Remove from the use/def lists.
114 if (MachineFunction *MF = N->getParent()->getParent())
115 N->RemoveRegOperandsFromUseLists(MF->getRegInfo());
119 LeakDetector::addGarbageObject(N);
122 /// transferNodesFromList (MI) - When moving a range of instructions from one
123 /// MBB list to another, we need to update the parent pointers and the use/def
125 void ilist_traits<MachineInstr>::
126 transferNodesFromList(ilist_traits<MachineInstr> &fromList,
127 ilist_iterator<MachineInstr> first,
128 ilist_iterator<MachineInstr> last) {
129 assert(Parent->getParent() == fromList.Parent->getParent() &&
130 "MachineInstr parent mismatch!");
132 // Splice within the same MBB -> no change.
133 if (Parent == fromList.Parent) return;
135 // If splicing between two blocks within the same function, just update the
137 for (; first != last; ++first)
138 first->setParent(Parent);
141 void ilist_traits<MachineInstr>::deleteNode(MachineInstr* MI) {
142 assert(!MI->getParent() && "MI is still in a block!");
143 Parent->getParent()->DeleteMachineInstr(MI);
146 MachineBasicBlock::iterator MachineBasicBlock::getFirstNonPHI() {
147 instr_iterator I = instr_begin(), E = instr_end();
148 while (I != E && I->isPHI())
150 assert((I == E || !I->isInsideBundle()) &&
151 "First non-phi MI cannot be inside a bundle!");
155 MachineBasicBlock::iterator
156 MachineBasicBlock::SkipPHIsAndLabels(MachineBasicBlock::iterator I) {
158 while (I != E && (I->isPHI() || I->isLabel() || I->isDebugValue()))
160 // FIXME: This needs to change if we wish to bundle labels / dbg_values
161 // inside the bundle.
162 assert((I == E || !I->isInsideBundle()) &&
163 "First non-phi / non-label instruction is inside a bundle!");
167 MachineBasicBlock::iterator MachineBasicBlock::getFirstTerminator() {
168 iterator B = begin(), E = end(), I = E;
169 while (I != B && ((--I)->isTerminator() || I->isDebugValue()))
171 while (I != E && !I->isTerminator())
176 MachineBasicBlock::const_iterator
177 MachineBasicBlock::getFirstTerminator() const {
178 const_iterator B = begin(), E = end(), I = E;
179 while (I != B && ((--I)->isTerminator() || I->isDebugValue()))
181 while (I != E && !I->isTerminator())
186 MachineBasicBlock::instr_iterator MachineBasicBlock::getFirstInstrTerminator() {
187 instr_iterator B = instr_begin(), E = instr_end(), I = E;
188 while (I != B && ((--I)->isTerminator() || I->isDebugValue()))
190 while (I != E && !I->isTerminator())
195 MachineBasicBlock::iterator MachineBasicBlock::getLastNonDebugInstr() {
196 // Skip over end-of-block dbg_value instructions.
197 instr_iterator B = instr_begin(), I = instr_end();
200 // Return instruction that starts a bundle.
201 if (I->isDebugValue() || I->isInsideBundle())
205 // The block is all debug values.
209 MachineBasicBlock::const_iterator
210 MachineBasicBlock::getLastNonDebugInstr() const {
211 // Skip over end-of-block dbg_value instructions.
212 const_instr_iterator B = instr_begin(), I = instr_end();
215 // Return instruction that starts a bundle.
216 if (I->isDebugValue() || I->isInsideBundle())
220 // The block is all debug values.
224 const MachineBasicBlock *MachineBasicBlock::getLandingPadSuccessor() const {
225 // A block with a landing pad successor only has one other successor.
228 for (const_succ_iterator I = succ_begin(), E = succ_end(); I != E; ++I)
229 if ((*I)->isLandingPad())
234 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
235 void MachineBasicBlock::dump() const {
240 StringRef MachineBasicBlock::getName() const {
241 if (const BasicBlock *LBB = getBasicBlock())
242 return LBB->getName();
247 /// Return a hopefully unique identifier for this block.
248 std::string MachineBasicBlock::getFullName() const {
251 Name = (getParent()->getName() + ":").str();
253 Name += getBasicBlock()->getName();
255 Name += (Twine("BB") + Twine(getNumber())).str();
259 void MachineBasicBlock::print(raw_ostream &OS, SlotIndexes *Indexes) const {
260 const MachineFunction *MF = getParent();
262 OS << "Can't print out MachineBasicBlock because parent MachineFunction"
268 OS << Indexes->getMBBStartIdx(this) << '\t';
270 OS << "BB#" << getNumber() << ": ";
272 const char *Comma = "";
273 if (const BasicBlock *LBB = getBasicBlock()) {
274 OS << Comma << "derived from LLVM BB ";
275 WriteAsOperand(OS, LBB, /*PrintType=*/false);
278 if (isLandingPad()) { OS << Comma << "EH LANDING PAD"; Comma = ", "; }
279 if (hasAddressTaken()) { OS << Comma << "ADDRESS TAKEN"; Comma = ", "; }
281 OS << Comma << "Align " << Alignment << " (" << (1u << Alignment)
286 const TargetRegisterInfo *TRI = MF->getTarget().getRegisterInfo();
287 if (!livein_empty()) {
288 if (Indexes) OS << '\t';
290 for (livein_iterator I = livein_begin(),E = livein_end(); I != E; ++I)
291 OS << ' ' << PrintReg(*I, TRI);
294 // Print the preds of this block according to the CFG.
296 if (Indexes) OS << '\t';
297 OS << " Predecessors according to CFG:";
298 for (const_pred_iterator PI = pred_begin(), E = pred_end(); PI != E; ++PI)
299 OS << " BB#" << (*PI)->getNumber();
303 for (const_instr_iterator I = instr_begin(); I != instr_end(); ++I) {
305 if (Indexes->hasIndex(I))
306 OS << Indexes->getInstructionIndex(I);
310 if (I->isInsideBundle())
312 I->print(OS, &getParent()->getTarget());
315 // Print the successors of this block according to the CFG.
317 if (Indexes) OS << '\t';
318 OS << " Successors according to CFG:";
319 for (const_succ_iterator SI = succ_begin(), E = succ_end(); SI != E; ++SI) {
320 OS << " BB#" << (*SI)->getNumber();
321 if (!Weights.empty())
322 OS << '(' << *getWeightIterator(SI) << ')';
328 void MachineBasicBlock::removeLiveIn(unsigned Reg) {
329 std::vector<unsigned>::iterator I =
330 std::find(LiveIns.begin(), LiveIns.end(), Reg);
331 if (I != LiveIns.end())
335 bool MachineBasicBlock::isLiveIn(unsigned Reg) const {
336 livein_iterator I = std::find(livein_begin(), livein_end(), Reg);
337 return I != livein_end();
340 void MachineBasicBlock::moveBefore(MachineBasicBlock *NewAfter) {
341 getParent()->splice(NewAfter, this);
344 void MachineBasicBlock::moveAfter(MachineBasicBlock *NewBefore) {
345 MachineFunction::iterator BBI = NewBefore;
346 getParent()->splice(++BBI, this);
349 void MachineBasicBlock::updateTerminator() {
350 const TargetInstrInfo *TII = getParent()->getTarget().getInstrInfo();
351 // A block with no successors has no concerns with fall-through edges.
352 if (this->succ_empty()) return;
354 MachineBasicBlock *TBB = 0, *FBB = 0;
355 SmallVector<MachineOperand, 4> Cond;
356 DebugLoc dl; // FIXME: this is nowhere
357 bool B = TII->AnalyzeBranch(*this, TBB, FBB, Cond);
359 assert(!B && "UpdateTerminators requires analyzable predecessors!");
362 // The block has an unconditional branch. If its successor is now
363 // its layout successor, delete the branch.
364 if (isLayoutSuccessor(TBB))
365 TII->RemoveBranch(*this);
367 // The block has an unconditional fallthrough. If its successor is not
368 // its layout successor, insert a branch. First we have to locate the
369 // only non-landing-pad successor, as that is the fallthrough block.
370 for (succ_iterator SI = succ_begin(), SE = succ_end(); SI != SE; ++SI) {
371 if ((*SI)->isLandingPad())
373 assert(!TBB && "Found more than one non-landing-pad successor!");
377 // If there is no non-landing-pad successor, the block has no
378 // fall-through edges to be concerned with.
382 // Finally update the unconditional successor to be reached via a branch
383 // if it would not be reached by fallthrough.
384 if (!isLayoutSuccessor(TBB))
385 TII->InsertBranch(*this, TBB, 0, Cond, dl);
389 // The block has a non-fallthrough conditional branch. If one of its
390 // successors is its layout successor, rewrite it to a fallthrough
391 // conditional branch.
392 if (isLayoutSuccessor(TBB)) {
393 if (TII->ReverseBranchCondition(Cond))
395 TII->RemoveBranch(*this);
396 TII->InsertBranch(*this, FBB, 0, Cond, dl);
397 } else if (isLayoutSuccessor(FBB)) {
398 TII->RemoveBranch(*this);
399 TII->InsertBranch(*this, TBB, 0, Cond, dl);
402 // Walk through the successors and find the successor which is not
403 // a landing pad and is not the conditional branch destination (in TBB)
404 // as the fallthrough successor.
405 MachineBasicBlock *FallthroughBB = 0;
406 for (succ_iterator SI = succ_begin(), SE = succ_end(); SI != SE; ++SI) {
407 if ((*SI)->isLandingPad() || *SI == TBB)
409 assert(!FallthroughBB && "Found more than one fallthrough successor.");
412 if (!FallthroughBB && canFallThrough()) {
413 // We fallthrough to the same basic block as the conditional jump
414 // targets. Remove the conditional jump, leaving unconditional
416 // FIXME: This does not seem like a reasonable pattern to support, but it
417 // has been seen in the wild coming out of degenerate ARM test cases.
418 TII->RemoveBranch(*this);
420 // Finally update the unconditional successor to be reached via a branch
421 // if it would not be reached by fallthrough.
422 if (!isLayoutSuccessor(TBB))
423 TII->InsertBranch(*this, TBB, 0, Cond, dl);
427 // The block has a fallthrough conditional branch.
428 if (isLayoutSuccessor(TBB)) {
429 if (TII->ReverseBranchCondition(Cond)) {
430 // We can't reverse the condition, add an unconditional branch.
432 TII->InsertBranch(*this, FallthroughBB, 0, Cond, dl);
435 TII->RemoveBranch(*this);
436 TII->InsertBranch(*this, FallthroughBB, 0, Cond, dl);
437 } else if (!isLayoutSuccessor(FallthroughBB)) {
438 TII->RemoveBranch(*this);
439 TII->InsertBranch(*this, TBB, FallthroughBB, Cond, dl);
445 void MachineBasicBlock::addSuccessor(MachineBasicBlock *succ, uint32_t weight) {
447 // If we see non-zero value for the first time it means we actually use Weight
448 // list, so we fill all Weights with 0's.
449 if (weight != 0 && Weights.empty())
450 Weights.resize(Successors.size());
452 if (weight != 0 || !Weights.empty())
453 Weights.push_back(weight);
455 Successors.push_back(succ);
456 succ->addPredecessor(this);
459 void MachineBasicBlock::removeSuccessor(MachineBasicBlock *succ) {
460 succ->removePredecessor(this);
461 succ_iterator I = std::find(Successors.begin(), Successors.end(), succ);
462 assert(I != Successors.end() && "Not a current successor!");
464 // If Weight list is empty it means we don't use it (disabled optimization).
465 if (!Weights.empty()) {
466 weight_iterator WI = getWeightIterator(I);
473 MachineBasicBlock::succ_iterator
474 MachineBasicBlock::removeSuccessor(succ_iterator I) {
475 assert(I != Successors.end() && "Not a current successor!");
477 // If Weight list is empty it means we don't use it (disabled optimization).
478 if (!Weights.empty()) {
479 weight_iterator WI = getWeightIterator(I);
483 (*I)->removePredecessor(this);
484 return Successors.erase(I);
487 void MachineBasicBlock::replaceSuccessor(MachineBasicBlock *Old,
488 MachineBasicBlock *New) {
492 succ_iterator E = succ_end();
493 succ_iterator NewI = E;
494 succ_iterator OldI = E;
495 for (succ_iterator I = succ_begin(); I != E; ++I) {
507 assert(OldI != E && "Old is not a successor of this block");
508 Old->removePredecessor(this);
510 // If New isn't already a successor, let it take Old's place.
512 New->addPredecessor(this);
517 // New is already a successor.
518 // Update its weight instead of adding a duplicate edge.
519 if (!Weights.empty()) {
520 weight_iterator OldWI = getWeightIterator(OldI);
521 *getWeightIterator(NewI) += *OldWI;
522 Weights.erase(OldWI);
524 Successors.erase(OldI);
527 void MachineBasicBlock::addPredecessor(MachineBasicBlock *pred) {
528 Predecessors.push_back(pred);
531 void MachineBasicBlock::removePredecessor(MachineBasicBlock *pred) {
532 pred_iterator I = std::find(Predecessors.begin(), Predecessors.end(), pred);
533 assert(I != Predecessors.end() && "Pred is not a predecessor of this block!");
534 Predecessors.erase(I);
537 void MachineBasicBlock::transferSuccessors(MachineBasicBlock *fromMBB) {
541 while (!fromMBB->succ_empty()) {
542 MachineBasicBlock *Succ = *fromMBB->succ_begin();
545 // If Weight list is empty it means we don't use it (disabled optimization).
546 if (!fromMBB->Weights.empty())
547 Weight = *fromMBB->Weights.begin();
549 addSuccessor(Succ, Weight);
550 fromMBB->removeSuccessor(Succ);
555 MachineBasicBlock::transferSuccessorsAndUpdatePHIs(MachineBasicBlock *fromMBB) {
559 while (!fromMBB->succ_empty()) {
560 MachineBasicBlock *Succ = *fromMBB->succ_begin();
562 if (!fromMBB->Weights.empty())
563 Weight = *fromMBB->Weights.begin();
564 addSuccessor(Succ, Weight);
565 fromMBB->removeSuccessor(Succ);
567 // Fix up any PHI nodes in the successor.
568 for (MachineBasicBlock::instr_iterator MI = Succ->instr_begin(),
569 ME = Succ->instr_end(); MI != ME && MI->isPHI(); ++MI)
570 for (unsigned i = 2, e = MI->getNumOperands()+1; i != e; i += 2) {
571 MachineOperand &MO = MI->getOperand(i);
572 if (MO.getMBB() == fromMBB)
578 bool MachineBasicBlock::isPredecessor(const MachineBasicBlock *MBB) const {
579 return std::find(pred_begin(), pred_end(), MBB) != pred_end();
582 bool MachineBasicBlock::isSuccessor(const MachineBasicBlock *MBB) const {
583 return std::find(succ_begin(), succ_end(), MBB) != succ_end();
586 bool MachineBasicBlock::isLayoutSuccessor(const MachineBasicBlock *MBB) const {
587 MachineFunction::const_iterator I(this);
588 return llvm::next(I) == MachineFunction::const_iterator(MBB);
591 bool MachineBasicBlock::canFallThrough() {
592 MachineFunction::iterator Fallthrough = this;
594 // If FallthroughBlock is off the end of the function, it can't fall through.
595 if (Fallthrough == getParent()->end())
598 // If FallthroughBlock isn't a successor, no fallthrough is possible.
599 if (!isSuccessor(Fallthrough))
602 // Analyze the branches, if any, at the end of the block.
603 MachineBasicBlock *TBB = 0, *FBB = 0;
604 SmallVector<MachineOperand, 4> Cond;
605 const TargetInstrInfo *TII = getParent()->getTarget().getInstrInfo();
606 if (TII->AnalyzeBranch(*this, TBB, FBB, Cond)) {
607 // If we couldn't analyze the branch, examine the last instruction.
608 // If the block doesn't end in a known control barrier, assume fallthrough
609 // is possible. The isPredicated check is needed because this code can be
610 // called during IfConversion, where an instruction which is normally a
611 // Barrier is predicated and thus no longer an actual control barrier.
612 return empty() || !back().isBarrier() || TII->isPredicated(&back());
615 // If there is no branch, control always falls through.
616 if (TBB == 0) return true;
618 // If there is some explicit branch to the fallthrough block, it can obviously
619 // reach, even though the branch should get folded to fall through implicitly.
620 if (MachineFunction::iterator(TBB) == Fallthrough ||
621 MachineFunction::iterator(FBB) == Fallthrough)
624 // If it's an unconditional branch to some block not the fall through, it
625 // doesn't fall through.
626 if (Cond.empty()) return false;
628 // Otherwise, if it is conditional and has no explicit false block, it falls
634 MachineBasicBlock::SplitCriticalEdge(MachineBasicBlock *Succ, Pass *P) {
635 // Splitting the critical edge to a landing pad block is non-trivial. Don't do
636 // it in this generic function.
637 if (Succ->isLandingPad())
640 MachineFunction *MF = getParent();
641 DebugLoc dl; // FIXME: this is nowhere
643 // We may need to update this's terminator, but we can't do that if
644 // AnalyzeBranch fails. If this uses a jump table, we won't touch it.
645 const TargetInstrInfo *TII = MF->getTarget().getInstrInfo();
646 MachineBasicBlock *TBB = 0, *FBB = 0;
647 SmallVector<MachineOperand, 4> Cond;
648 if (TII->AnalyzeBranch(*this, TBB, FBB, Cond))
651 // Avoid bugpoint weirdness: A block may end with a conditional branch but
652 // jumps to the same MBB is either case. We have duplicate CFG edges in that
653 // case that we can't handle. Since this never happens in properly optimized
654 // code, just skip those edges.
655 if (TBB && TBB == FBB) {
656 DEBUG(dbgs() << "Won't split critical edge after degenerate BB#"
657 << getNumber() << '\n');
661 MachineBasicBlock *NMBB = MF->CreateMachineBasicBlock();
662 MF->insert(llvm::next(MachineFunction::iterator(this)), NMBB);
663 DEBUG(dbgs() << "Splitting critical edge:"
664 " BB#" << getNumber()
665 << " -- BB#" << NMBB->getNumber()
666 << " -- BB#" << Succ->getNumber() << '\n');
667 SlotIndexes *Indexes = P->getAnalysisIfAvailable<SlotIndexes>();
669 Indexes->insertMBBInMaps(NMBB);
671 // On some targets like Mips, branches may kill virtual registers. Make sure
672 // that LiveVariables is properly updated after updateTerminator replaces the
674 LiveVariables *LV = P->getAnalysisIfAvailable<LiveVariables>();
676 // Collect a list of virtual registers killed by the terminators.
677 SmallVector<unsigned, 4> KilledRegs;
679 for (instr_iterator I = getFirstInstrTerminator(), E = instr_end();
681 MachineInstr *MI = I;
682 for (MachineInstr::mop_iterator OI = MI->operands_begin(),
683 OE = MI->operands_end(); OI != OE; ++OI) {
684 if (!OI->isReg() || OI->getReg() == 0 ||
685 !OI->isUse() || !OI->isKill() || OI->isUndef())
687 unsigned Reg = OI->getReg();
688 if (TargetRegisterInfo::isPhysicalRegister(Reg) ||
689 LV->getVarInfo(Reg).removeKill(MI)) {
690 KilledRegs.push_back(Reg);
691 DEBUG(dbgs() << "Removing terminator kill: " << *MI);
692 OI->setIsKill(false);
697 ReplaceUsesOfBlockWith(Succ, NMBB);
699 // If updateTerminator() removes instructions, we need to remove them from
701 SmallVector<MachineInstr*, 4> Terminators;
703 for (instr_iterator I = getFirstInstrTerminator(), E = instr_end();
705 Terminators.push_back(I);
711 SmallVector<MachineInstr*, 4> NewTerminators;
712 for (instr_iterator I = getFirstInstrTerminator(), E = instr_end();
714 NewTerminators.push_back(I);
716 for (SmallVectorImpl<MachineInstr*>::iterator I = Terminators.begin(),
717 E = Terminators.end(); I != E; ++I) {
718 if (std::find(NewTerminators.begin(), NewTerminators.end(), *I) ==
719 NewTerminators.end())
720 Indexes->removeMachineInstrFromMaps(*I);
724 // Insert unconditional "jump Succ" instruction in NMBB if necessary.
725 NMBB->addSuccessor(Succ);
726 if (!NMBB->isLayoutSuccessor(Succ)) {
728 MF->getTarget().getInstrInfo()->InsertBranch(*NMBB, Succ, NULL, Cond, dl);
731 for (instr_iterator I = NMBB->instr_begin(), E = NMBB->instr_end();
733 // Some instructions may have been moved to NMBB by updateTerminator(),
734 // so we first remove any instruction that already has an index.
735 if (Indexes->hasIndex(I))
736 Indexes->removeMachineInstrFromMaps(I);
737 Indexes->insertMachineInstrInMaps(I);
742 // Fix PHI nodes in Succ so they refer to NMBB instead of this
743 for (MachineBasicBlock::instr_iterator
744 i = Succ->instr_begin(),e = Succ->instr_end();
745 i != e && i->isPHI(); ++i)
746 for (unsigned ni = 1, ne = i->getNumOperands(); ni != ne; ni += 2)
747 if (i->getOperand(ni+1).getMBB() == this)
748 i->getOperand(ni+1).setMBB(NMBB);
750 // Inherit live-ins from the successor
751 for (MachineBasicBlock::livein_iterator I = Succ->livein_begin(),
752 E = Succ->livein_end(); I != E; ++I)
755 // Update LiveVariables.
756 const TargetRegisterInfo *TRI = MF->getTarget().getRegisterInfo();
758 // Restore kills of virtual registers that were killed by the terminators.
759 while (!KilledRegs.empty()) {
760 unsigned Reg = KilledRegs.pop_back_val();
761 for (instr_iterator I = instr_end(), E = instr_begin(); I != E;) {
762 if (!(--I)->addRegisterKilled(Reg, TRI, /* addIfNotFound= */ false))
764 if (TargetRegisterInfo::isVirtualRegister(Reg))
765 LV->getVarInfo(Reg).Kills.push_back(I);
766 DEBUG(dbgs() << "Restored terminator kill: " << *I);
770 // Update relevant live-through information.
771 LV->addNewBlock(NMBB, this, Succ);
774 if (LiveIntervals *LIS = P->getAnalysisIfAvailable<LiveIntervals>()) {
775 // After splitting the edge and updating SlotIndexes, live intervals may be
776 // in one of two situations, depending on whether this block was the last in
777 // the function. If the original block was the last in the function, all live
778 // intervals will end prior to the beginning of the new split block. If the
779 // original block was not at the end of the function, all live intervals will
780 // extend to the end of the new split block.
783 llvm::next(MachineFunction::iterator(NMBB)) == getParent()->end();
785 SlotIndex StartIndex = Indexes->getMBBEndIdx(this);
786 SlotIndex PrevIndex = StartIndex.getPrevSlot();
787 SlotIndex EndIndex = Indexes->getMBBEndIdx(NMBB);
789 // Find the registers used from NMBB in PHIs in Succ.
790 SmallSet<unsigned, 8> PHISrcRegs;
791 for (MachineBasicBlock::instr_iterator
792 I = Succ->instr_begin(), E = Succ->instr_end();
793 I != E && I->isPHI(); ++I) {
794 for (unsigned ni = 1, ne = I->getNumOperands(); ni != ne; ni += 2) {
795 if (I->getOperand(ni+1).getMBB() == NMBB) {
796 MachineOperand &MO = I->getOperand(ni);
797 unsigned Reg = MO.getReg();
798 PHISrcRegs.insert(Reg);
802 LiveInterval &LI = LIS->getInterval(Reg);
803 VNInfo *VNI = LI.getVNInfoAt(PrevIndex);
804 assert(VNI && "PHI sources should be live out of their predecessors.");
805 LI.addRange(LiveRange(StartIndex, EndIndex, VNI));
810 MachineRegisterInfo *MRI = &getParent()->getRegInfo();
811 for (unsigned i = 0, e = MRI->getNumVirtRegs(); i != e; ++i) {
812 unsigned Reg = TargetRegisterInfo::index2VirtReg(i);
813 if (PHISrcRegs.count(Reg) || !LIS->hasInterval(Reg))
816 LiveInterval &LI = LIS->getInterval(Reg);
817 if (!LI.liveAt(PrevIndex))
820 bool isLiveOut = LI.liveAt(LIS->getMBBStartIdx(Succ));
821 if (isLiveOut && isLastMBB) {
822 VNInfo *VNI = LI.getVNInfoAt(PrevIndex);
823 assert(VNI && "LiveInterval should have VNInfo where it is live.");
824 LI.addRange(LiveRange(StartIndex, EndIndex, VNI));
825 } else if (!isLiveOut && !isLastMBB) {
826 LI.removeRange(StartIndex, EndIndex);
831 if (MachineDominatorTree *MDT =
832 P->getAnalysisIfAvailable<MachineDominatorTree>()) {
833 // Update dominator information.
834 MachineDomTreeNode *SucccDTNode = MDT->getNode(Succ);
836 bool IsNewIDom = true;
837 for (const_pred_iterator PI = Succ->pred_begin(), E = Succ->pred_end();
839 MachineBasicBlock *PredBB = *PI;
842 if (!MDT->dominates(SucccDTNode, MDT->getNode(PredBB))) {
848 // We know "this" dominates the newly created basic block.
849 MachineDomTreeNode *NewDTNode = MDT->addNewBlock(NMBB, this);
851 // If all the other predecessors of "Succ" are dominated by "Succ" itself
852 // then the new block is the new immediate dominator of "Succ". Otherwise,
853 // the new block doesn't dominate anything.
855 MDT->changeImmediateDominator(SucccDTNode, NewDTNode);
858 if (MachineLoopInfo *MLI = P->getAnalysisIfAvailable<MachineLoopInfo>())
859 if (MachineLoop *TIL = MLI->getLoopFor(this)) {
860 // If one or the other blocks were not in a loop, the new block is not
861 // either, and thus LI doesn't need to be updated.
862 if (MachineLoop *DestLoop = MLI->getLoopFor(Succ)) {
863 if (TIL == DestLoop) {
864 // Both in the same loop, the NMBB joins loop.
865 DestLoop->addBasicBlockToLoop(NMBB, MLI->getBase());
866 } else if (TIL->contains(DestLoop)) {
867 // Edge from an outer loop to an inner loop. Add to the outer loop.
868 TIL->addBasicBlockToLoop(NMBB, MLI->getBase());
869 } else if (DestLoop->contains(TIL)) {
870 // Edge from an inner loop to an outer loop. Add to the outer loop.
871 DestLoop->addBasicBlockToLoop(NMBB, MLI->getBase());
873 // Edge from two loops with no containment relation. Because these
874 // are natural loops, we know that the destination block must be the
875 // header of its loop (adding a branch into a loop elsewhere would
876 // create an irreducible loop).
877 assert(DestLoop->getHeader() == Succ &&
878 "Should not create irreducible loops!");
879 if (MachineLoop *P = DestLoop->getParentLoop())
880 P->addBasicBlockToLoop(NMBB, MLI->getBase());
888 /// Prepare MI to be removed from its bundle. This fixes bundle flags on MI's
889 /// neighboring instructions so the bundle won't be broken by removing MI.
890 static void unbundleSingleMI(MachineInstr *MI) {
891 // Removing the first instruction in a bundle.
892 if (MI->isBundledWithSucc() && !MI->isBundledWithPred())
893 MI->unbundleFromSucc();
894 // Removing the last instruction in a bundle.
895 if (MI->isBundledWithPred() && !MI->isBundledWithSucc())
896 MI->unbundleFromPred();
897 // If MI is not bundled, or if it is internal to a bundle, the neighbor flags
901 MachineBasicBlock::instr_iterator
902 MachineBasicBlock::erase(MachineBasicBlock::instr_iterator I) {
904 return Insts.erase(I);
907 MachineInstr *MachineBasicBlock::remove_instr(MachineInstr *MI) {
908 unbundleSingleMI(MI);
909 MI->clearFlag(MachineInstr::BundledPred);
910 MI->clearFlag(MachineInstr::BundledSucc);
911 return Insts.remove(MI);
914 MachineBasicBlock::instr_iterator
915 MachineBasicBlock::insert(instr_iterator I, MachineInstr *MI) {
916 assert(!MI->isBundledWithPred() && !MI->isBundledWithSucc() &&
917 "Cannot insert instruction with bundle flags");
918 // Set the bundle flags when inserting inside a bundle.
919 if (I != instr_end() && I->isBundledWithPred()) {
920 MI->setFlag(MachineInstr::BundledPred);
921 MI->setFlag(MachineInstr::BundledSucc);
923 return Insts.insert(I, MI);
926 /// removeFromParent - This method unlinks 'this' from the containing function,
927 /// and returns it, but does not delete it.
928 MachineBasicBlock *MachineBasicBlock::removeFromParent() {
929 assert(getParent() && "Not embedded in a function!");
930 getParent()->remove(this);
935 /// eraseFromParent - This method unlinks 'this' from the containing function,
937 void MachineBasicBlock::eraseFromParent() {
938 assert(getParent() && "Not embedded in a function!");
939 getParent()->erase(this);
943 /// ReplaceUsesOfBlockWith - Given a machine basic block that branched to
944 /// 'Old', change the code and CFG so that it branches to 'New' instead.
945 void MachineBasicBlock::ReplaceUsesOfBlockWith(MachineBasicBlock *Old,
946 MachineBasicBlock *New) {
947 assert(Old != New && "Cannot replace self with self!");
949 MachineBasicBlock::instr_iterator I = instr_end();
950 while (I != instr_begin()) {
952 if (!I->isTerminator()) break;
954 // Scan the operands of this machine instruction, replacing any uses of Old
956 for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i)
957 if (I->getOperand(i).isMBB() &&
958 I->getOperand(i).getMBB() == Old)
959 I->getOperand(i).setMBB(New);
962 // Update the successor information.
963 replaceSuccessor(Old, New);
966 /// CorrectExtraCFGEdges - Various pieces of code can cause excess edges in the
967 /// CFG to be inserted. If we have proven that MBB can only branch to DestA and
968 /// DestB, remove any other MBB successors from the CFG. DestA and DestB can be
971 /// Besides DestA and DestB, retain other edges leading to LandingPads
972 /// (currently there can be only one; we don't check or require that here).
973 /// Note it is possible that DestA and/or DestB are LandingPads.
974 bool MachineBasicBlock::CorrectExtraCFGEdges(MachineBasicBlock *DestA,
975 MachineBasicBlock *DestB,
977 // The values of DestA and DestB frequently come from a call to the
978 // 'TargetInstrInfo::AnalyzeBranch' method. We take our meaning of the initial
979 // values from there.
981 // 1. If both DestA and DestB are null, then the block ends with no branches
982 // (it falls through to its successor).
983 // 2. If DestA is set, DestB is null, and isCond is false, then the block ends
984 // with only an unconditional branch.
985 // 3. If DestA is set, DestB is null, and isCond is true, then the block ends
986 // with a conditional branch that falls through to a successor (DestB).
987 // 4. If DestA and DestB is set and isCond is true, then the block ends with a
988 // conditional branch followed by an unconditional branch. DestA is the
989 // 'true' destination and DestB is the 'false' destination.
991 bool Changed = false;
993 MachineFunction::iterator FallThru =
994 llvm::next(MachineFunction::iterator(this));
996 if (DestA == 0 && DestB == 0) {
997 // Block falls through to successor.
1000 } else if (DestA != 0 && DestB == 0) {
1002 // Block ends in conditional jump that falls through to successor.
1005 assert(DestA && DestB && isCond &&
1006 "CFG in a bad state. Cannot correct CFG edges");
1009 // Remove superfluous edges. I.e., those which aren't destinations of this
1010 // basic block, duplicate edges, or landing pads.
1011 SmallPtrSet<const MachineBasicBlock*, 8> SeenMBBs;
1012 MachineBasicBlock::succ_iterator SI = succ_begin();
1013 while (SI != succ_end()) {
1014 const MachineBasicBlock *MBB = *SI;
1015 if (!SeenMBBs.insert(MBB) ||
1016 (MBB != DestA && MBB != DestB && !MBB->isLandingPad())) {
1017 // This is a superfluous edge, remove it.
1018 SI = removeSuccessor(SI);
1028 /// findDebugLoc - find the next valid DebugLoc starting at MBBI, skipping
1029 /// any DBG_VALUE instructions. Return UnknownLoc if there is none.
1031 MachineBasicBlock::findDebugLoc(instr_iterator MBBI) {
1033 instr_iterator E = instr_end();
1037 // Skip debug declarations, we don't want a DebugLoc from them.
1038 while (MBBI != E && MBBI->isDebugValue())
1041 DL = MBBI->getDebugLoc();
1045 /// getSuccWeight - Return weight of the edge from this block to MBB.
1047 uint32_t MachineBasicBlock::getSuccWeight(const_succ_iterator Succ) const {
1048 if (Weights.empty())
1051 return *getWeightIterator(Succ);
1054 /// getWeightIterator - Return wight iterator corresonding to the I successor
1056 MachineBasicBlock::weight_iterator MachineBasicBlock::
1057 getWeightIterator(MachineBasicBlock::succ_iterator I) {
1058 assert(Weights.size() == Successors.size() && "Async weight list!");
1059 size_t index = std::distance(Successors.begin(), I);
1060 assert(index < Weights.size() && "Not a current successor!");
1061 return Weights.begin() + index;
1064 /// getWeightIterator - Return wight iterator corresonding to the I successor
1066 MachineBasicBlock::const_weight_iterator MachineBasicBlock::
1067 getWeightIterator(MachineBasicBlock::const_succ_iterator I) const {
1068 assert(Weights.size() == Successors.size() && "Async weight list!");
1069 const size_t index = std::distance(Successors.begin(), I);
1070 assert(index < Weights.size() && "Not a current successor!");
1071 return Weights.begin() + index;
1074 /// Return whether (physical) register "Reg" has been <def>ined and not <kill>ed
1075 /// as of just before "MI".
1077 /// Search is localised to a neighborhood of
1078 /// Neighborhood instructions before (searching for defs or kills) and N
1079 /// instructions after (searching just for defs) MI.
1080 MachineBasicBlock::LivenessQueryResult
1081 MachineBasicBlock::computeRegisterLiveness(const TargetRegisterInfo *TRI,
1082 unsigned Reg, MachineInstr *MI,
1083 unsigned Neighborhood) {
1084 unsigned N = Neighborhood;
1085 MachineBasicBlock *MBB = MI->getParent();
1087 // Start by searching backwards from MI, looking for kills, reads or defs.
1089 MachineBasicBlock::iterator I(MI);
1090 // If this is the first insn in the block, don't search backwards.
1091 if (I != MBB->begin()) {
1095 MachineOperandIteratorBase::PhysRegInfo Analysis =
1096 MIOperands(I).analyzePhysReg(Reg, TRI);
1098 if (Analysis.Defines)
1099 // Outputs happen after inputs so they take precedence if both are
1101 return Analysis.DefinesDead ? LQR_Dead : LQR_Live;
1103 if (Analysis.Kills || Analysis.Clobbers)
1104 // Register killed, so isn't live.
1107 else if (Analysis.ReadsOverlap)
1108 // Defined or read without a previous kill - live.
1109 return Analysis.Reads ? LQR_Live : LQR_OverlappingLive;
1111 } while (I != MBB->begin() && --N > 0);
1114 // Did we get to the start of the block?
1115 if (I == MBB->begin()) {
1116 // If so, the register's state is definitely defined by the live-in state.
1117 for (MCRegAliasIterator RAI(Reg, TRI, /*IncludeSelf=*/true);
1118 RAI.isValid(); ++RAI) {
1119 if (MBB->isLiveIn(*RAI))
1120 return (*RAI == Reg) ? LQR_Live : LQR_OverlappingLive;
1128 // Try searching forwards from MI, looking for reads or defs.
1129 I = MachineBasicBlock::iterator(MI);
1130 // If this is the last insn in the block, don't search forwards.
1131 if (I != MBB->end()) {
1132 for (++I; I != MBB->end() && N > 0; ++I, --N) {
1133 MachineOperandIteratorBase::PhysRegInfo Analysis =
1134 MIOperands(I).analyzePhysReg(Reg, TRI);
1136 if (Analysis.ReadsOverlap)
1137 // Used, therefore must have been live.
1138 return (Analysis.Reads) ?
1139 LQR_Live : LQR_OverlappingLive;
1141 else if (Analysis.Clobbers || Analysis.Defines)
1142 // Defined (but not read) therefore cannot have been live.
1147 // At this point we have no idea of the liveness of the register.
1151 void llvm::WriteAsOperand(raw_ostream &OS, const MachineBasicBlock *MBB,
1153 OS << "BB#" << MBB->getNumber();