include/llvm/IntrinsicsCellSPU.td

   1 //==- IntrinsicsCellSPU.td - Cell SDK intrinsics           -*- tablegen -*-==//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file was developed by a team from the Computer Systems Research
   6 // Department at The Aerospace Corporation and is distributed under the
   7 // University of Illinois Open Source License. See LICENSE.TXT for details.
   8 //
   9 //===----------------------------------------------------------------------===//
  10 // Cell SPU Instructions:
  11 //===----------------------------------------------------------------------===//
  12 // TODO Items (not urgent today, but would be nice, low priority)
  13 //
  14 // ANDBI, ORBI: SPU constructs a 4-byte constant for these instructions by
  15 // concatenating the byte argument b as "bbbb". Could recognize this bit pattern
  16 // in 16-bit and 32-bit constants and reduce instruction count.
  17 //===----------------------------------------------------------------------===//
  18
  19 // 7-bit integer type, used as an immediate:
  20 def cell_i7_ty: LLVMType<i16>;   // Note: This was i8
  21 def cell_i8_ty: LLVMType<i16>;   // Note: This was i8
  22
  23 class v16i8_u7imm<string builtin_suffix> :
  24   GCCBuiltin<!strconcat("__builtin_si_", builtin_suffix)>,
  25   Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty, cell_i7_ty],
  26             [IntrNoMem]>;
  27
  28 class v16i8_u8imm<string builtin_suffix> :
  29   GCCBuiltin<!strconcat("__builtin_si_", builtin_suffix)>,
  30   Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty, llvm_i16_ty],
  31             [IntrNoMem]>;
  32
  33 class v16i8_s10imm<string builtin_suffix> :
  34   GCCBuiltin<!strconcat("__builtin_si_", builtin_suffix)>,
  35   Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty, llvm_i16_ty],
  36             [IntrNoMem]>;
  37
  38 class v16i8_u16imm<string builtin_suffix> :
  39   GCCBuiltin<!strconcat("__builtin_si_", builtin_suffix)>,
  40   Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty, llvm_i16_ty],
  41             [IntrNoMem]>;
  42
  43 class v16i8_rr<string builtin_suffix> :
  44   GCCBuiltin<!strconcat("__builtin_si_", builtin_suffix)>,
  45   Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty, llvm_v16i8_ty],
  46             [IntrNoMem]>;
  47
  48 class v8i16_s10imm<string builtin_suffix> :
  49   GCCBuiltin<!strconcat("__builtin_si_", builtin_suffix)>,
  50   Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty, llvm_i16_ty],
  51             [IntrNoMem]>;
  52
  53 class v8i16_u16imm<string builtin_suffix> :
  54   GCCBuiltin<!strconcat("__builtin_si_", builtin_suffix)>,
  55   Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty, llvm_i16_ty],
  56             [IntrNoMem]>;
  57
  58 class v8i16_rr<string builtin_suffix> :
  59   GCCBuiltin<!strconcat("__builtin_si_", builtin_suffix)>,
  60   Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty, llvm_v8i16_ty],
  61             [IntrNoMem]>;
  62
  63 class v4i32_rr<string builtin_suffix> :
  64   GCCBuiltin<!strconcat("__builtin_si_", builtin_suffix)>,
  65   Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty, llvm_v4i32_ty],
  66             [IntrNoMem]>;
  67
  68 class v4i32_u7imm<string builtin_suffix> :
  69   GCCBuiltin<!strconcat("__builtin_si_", builtin_suffix)>,
  70   Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty, cell_i7_ty],
  71             [IntrNoMem]>;
  72
  73 class v4i32_s10imm<string builtin_suffix> :
  74   GCCBuiltin<!strconcat("__builtin_si_", builtin_suffix)>,
  75   Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty, llvm_i16_ty],
  76             [IntrNoMem]>;
  77
  78 class v4i32_u16imm<string builtin_suffix> :
  79   GCCBuiltin<!strconcat("__builtin_si_", builtin_suffix)>,
  80   Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty, llvm_i16_ty],
  81             [IntrNoMem]>;
  82
  83 class v4f32_rr<string builtin_suffix> :
  84   GCCBuiltin<!strconcat("__builtin_si_", builtin_suffix)>,
  85   Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty, llvm_v4f32_ty],
  86                 [IntrNoMem]>;
  87
  88 class v4f32_rrr<string builtin_suffix> :
  89   GCCBuiltin<!strconcat("__builtin_si_", builtin_suffix)>,
  90   Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty, llvm_v4f32_ty, llvm_v4f32_ty],
  91                 [IntrNoMem]>;
  92
  93 class v2f64_rr<string builtin_suffix> :
  94   GCCBuiltin<!strconcat("__builtin_si_", builtin_suffix)>,
  95   Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty, llvm_v2f64_ty],
  96                 [IntrNoMem]>;
  97
  98 // All Cell SPU intrinsics start with "llvm.spu.".
  99 let TargetPrefix = "spu" in {
 100   def int_spu_si_fsmbi  : v8i16_u16imm<"fsmbi">;
 101   def int_spu_si_ah     : v8i16_rr<"ah">;
 102   def int_spu_si_ahi    : v8i16_s10imm<"ahi">;
 103   def int_spu_si_a      : v4i32_rr<"a">;
 104   def int_spu_si_ai     : v4i32_s10imm<"ai">;
 105   def int_spu_si_sfh    : v8i16_rr<"sfh">;
 106   def int_spu_si_sfhi   : v8i16_s10imm<"sfhi">;
 107   def int_spu_si_sf     : v4i32_rr<"sf">;
 108   def int_spu_si_sfi    : v4i32_s10imm<"sfi">;
 109   def int_spu_si_addx   : v4i32_rr<"addx">;
 110   def int_spu_si_cg     : v4i32_rr<"cg">;
 111   def int_spu_si_cgx    : v4i32_rr<"cgx">;
 112   def int_spu_si_sfx    : v4i32_rr<"sfx">;
 113   def int_spu_si_bg     : v4i32_rr<"bg">;
 114   def int_spu_si_bgx    : v4i32_rr<"bgx">;
 115   def int_spu_si_mpy    : // This is special:
 116     GCCBuiltin<"__builtin_si_mpy">,
 117     Intrinsic<[llvm_v4i32_ty, llvm_v8i16_ty, llvm_v8i16_ty],
 118               [IntrNoMem]>;
 119   def int_spu_si_mpyu   : // This is special:
 120     GCCBuiltin<"__builtin_si_mpyu">,
 121     Intrinsic<[llvm_v4i32_ty, llvm_v8i16_ty, llvm_v8i16_ty],
 122               [IntrNoMem]>;
 123   def int_spu_si_mpyi   : // This is special:
 124     GCCBuiltin<"__builtin_si_mpyi">,
 125     Intrinsic<[llvm_v4i32_ty, llvm_v8i16_ty, llvm_i16_ty],
 126               [IntrNoMem]>;
 127   def int_spu_si_mpyui  : // This is special:
 128     GCCBuiltin<"__builtin_si_mpyui">,
 129     Intrinsic<[llvm_v4i32_ty, llvm_v8i16_ty, llvm_i16_ty],
 130               [IntrNoMem]>;
 131   def int_spu_si_mpya   : // This is special:
 132     GCCBuiltin<"__builtin_si_mpya">,
 133     Intrinsic<[llvm_v4i32_ty, llvm_v8i16_ty, llvm_v8i16_ty, llvm_v8i16_ty],
 134               [IntrNoMem]>;
 135   def int_spu_si_mpyh   : // This is special:
 136     GCCBuiltin<"__builtin_si_mpyh">,
 137     Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty, llvm_v8i16_ty],
 138               [IntrNoMem]>;
 139   def int_spu_si_mpys   : // This is special:
 140     GCCBuiltin<"__builtin_si_mpys">,
 141     Intrinsic<[llvm_v4i32_ty, llvm_v8i16_ty, llvm_v8i16_ty],
 142               [IntrNoMem]>;
 143   def int_spu_si_mpyhh  : // This is special:
 144     GCCBuiltin<"__builtin_si_mpyhh">,
 145     Intrinsic<[llvm_v4i32_ty, llvm_v8i16_ty, llvm_v8i16_ty],
 146               [IntrNoMem]>;
 147   def int_spu_si_mpyhha : // This is special:
 148     GCCBuiltin<"__builtin_si_mpyhha">,
 149     Intrinsic<[llvm_v4i32_ty, llvm_v8i16_ty, llvm_v8i16_ty],
 150               [IntrNoMem]>;
 151   def int_spu_si_mpyhhu : // This is special:
 152     GCCBuiltin<"__builtin_si_mpyhhu">,
 153     Intrinsic<[llvm_v4i32_ty, llvm_v8i16_ty, llvm_v8i16_ty],
 154               [IntrNoMem]>;
 155   def int_spu_si_mpyhhau : // This is special:
 156     GCCBuiltin<"__builtin_si_mpyhhau">,
 157     Intrinsic<[llvm_v4i32_ty, llvm_v8i16_ty, llvm_v8i16_ty],
 158               [IntrNoMem]>;
 159
 160   def int_spu_si_shli:          v4i32_u7imm<"shli">;
 161   def int_spu_si_shlqbi:        v16i8_rr<"shlqbi">;
 162   def int_spu_si_shlqbii:       v16i8_u7imm<"shlqbii">;
 163   def int_spu_si_shlqby:        v16i8_rr<"shlqby">;
 164   def int_spu_si_shlqbyi:       v16i8_u7imm<"shlqbyi">;
 165
 166   def int_spu_si_ceq:           v4i32_rr<"ceq">;
 167   def int_spu_si_ceqi:          v4i32_s10imm<"ceqi">;
 168   def int_spu_si_ceqb:          v16i8_rr<"ceqb">;
 169   def int_spu_si_ceqbi:         v16i8_u8imm<"ceqbi">;
 170   def int_spu_si_ceqh:          v8i16_rr<"ceqh">;
 171   def int_spu_si_ceqhi:         v8i16_s10imm<"ceqhi">;
 172   def int_spu_si_cgt:           v4i32_rr<"cgt">;
 173   def int_spu_si_cgti:          v4i32_s10imm<"cgti">;
 174   def int_spu_si_cgtb:          v16i8_rr<"cgtb">;
 175   def int_spu_si_cgtbi:         v16i8_u8imm<"cgtbi">;
 176   def int_spu_si_cgth:          v8i16_rr<"cgth">;
 177   def int_spu_si_cgthi:         v8i16_s10imm<"cgthi">;
 178   def int_spu_si_clgtb:         v16i8_rr<"clgtb">;
 179   def int_spu_si_clgtbi:        v16i8_u8imm<"clgtbi">;
 180   def int_spu_si_clgth:         v8i16_rr<"clgth">;
 181   def int_spu_si_clgthi:        v8i16_s10imm<"clgthi">;
 182   def int_spu_si_clgt:          v4i32_rr<"clgt">;
 183   def int_spu_si_clgti:         v4i32_s10imm<"clgti">;
 184
 185   def int_spu_si_and:           v4i32_rr<"and">;
 186   def int_spu_si_andbi:         v16i8_u8imm<"andbi">;
 187   def int_spu_si_andc:          v4i32_rr<"andc">;
 188   def int_spu_si_andhi:         v8i16_s10imm<"andhi">;
 189   def int_spu_si_andi:          v4i32_s10imm<"andi">;
 190
 191   def int_spu_si_or:            v4i32_rr<"or">;
 192   def int_spu_si_orbi:          v16i8_u8imm<"orbi">;
 193   def int_spu_si_orc:           v4i32_rr<"orc">;
 194   def int_spu_si_orhi:          v8i16_s10imm<"orhi">;
 195   def int_spu_si_ori:           v4i32_s10imm<"ori">;
 196
 197   def int_spu_si_xor:           v4i32_rr<"xor">;
 198   def int_spu_si_xorbi:         v16i8_u8imm<"xorbi">;
 199   def int_spu_si_xorhi:         v8i16_s10imm<"xorhi">;
 200   def int_spu_si_xori:          v4i32_s10imm<"xori">;
 201
 202   def int_spu_si_nor:           v4i32_rr<"nor">;
 203   def int_spu_si_nand:          v4i32_rr<"nand">;
 204
 205   def int_spu_si_fa:                    v4f32_rr<"fa">;
 206   def int_spu_si_fs:                    v4f32_rr<"fs">;
 207   def int_spu_si_fm:                    v4f32_rr<"fm">;
 208
 209   def int_spu_si_fceq:                  v4f32_rr<"fceq">;
 210   def int_spu_si_fcmeq:                 v4f32_rr<"fcmeq">;
 211   def int_spu_si_fcgt:                  v4f32_rr<"fcgt">;
 212   def int_spu_si_fcmgt:                 v4f32_rr<"fcmgt">;
 213
 214   def int_spu_si_fma:                   v4f32_rrr<"fma">;
 215   def int_spu_si_fnms:                  v4f32_rrr<"fnms">;
 216   def int_spu_si_fms:                   v4f32_rrr<"fms">;
 217
 218   def int_spu_si_dfa:                   v2f64_rr<"dfa">;
 219   def int_spu_si_dfs:                   v2f64_rr<"dfs">;
 220   def int_spu_si_dfm:                   v2f64_rr<"dfm">;
 221
 222 //def int_spu_si_dfceq:                 v2f64_rr<"dfceq">;
 223 //def int_spu_si_dfcmeq:                v2f64_rr<"dfcmeq">;
 224 //def int_spu_si_dfcgt:                 v2f64_rr<"dfcgt">;
 225 //def int_spu_si_dfcmgt:                v2f64_rr<"dfcmgt">;
 226
 227   def int_spu_si_dfnma:                 v2f64_rr<"dfnma">;
 228   def int_spu_si_dfma:                  v2f64_rr<"dfma">;
 229   def int_spu_si_dfnms:                 v2f64_rr<"dfnms">;
 230   def int_spu_si_dfms:                  v2f64_rr<"dfms">;
 231
 232 }