UPSTREAM: usb: dwc3: add disable receiver detection in P3 quirk
authorRajesh Bhagat <rajesh.bhagat@nxp.com>
Mon, 14 Mar 2016 09:10:50 +0000 (14:40 +0530)
committerHuang, Tao <huangtao@rock-chips.com>
Tue, 16 Aug 2016 12:48:19 +0000 (20:48 +0800)
Some freescale QorIQ platforms require to disable receiver detection
in P3 for correct detection of USB devices. If GUSB3PIPECTL(DISRXDETINP3)
is set, Core will change PHY power state to P2 and then perform receiver
detection. After receiver detection, Core will change PHY power state to
P3. Same quirk would be added in dts file in future patches.

Change-Id: Idf29b70a5c9815a87c96e2b7d8d724157f35d8da
Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
(cherry picked from commit e58dd357741b93f5bc5487aabba968c76bb099ef)

drivers/usb/dwc3/core.c
drivers/usb/dwc3/core.h
drivers/usb/dwc3/platform_data.h

index cef7455ebf1bd08e231fd5e91ad8197096281a26..e04077f4c9decfb7df71135bd4d4f3a874260c20 100644 (file)
@@ -412,6 +412,9 @@ static int dwc3_phy_setup(struct dwc3 *dwc)
        if (dwc->u2ss_inp3_quirk)
                reg |= DWC3_GUSB3PIPECTL_U2SSINP3OK;
 
+       if (dwc->dis_rxdet_inp3_quirk)
+               reg |= DWC3_GUSB3PIPECTL_DISRXDETINP3;
+
        if (dwc->req_p1p2p3_quirk)
                reg |= DWC3_GUSB3PIPECTL_REQP1P2P3;
 
@@ -897,6 +900,8 @@ static int dwc3_probe(struct platform_device *pdev)
                                "snps,dis_u2_susphy_quirk");
        dwc->dis_enblslpm_quirk = device_property_read_bool(dev,
                                "snps,dis_enblslpm_quirk");
+       dwc->dis_rxdet_inp3_quirk = device_property_read_bool(dev,
+                               "snps,dis_rxdet_inp3_quirk");
 
        dwc->tx_de_emphasis_quirk = device_property_read_bool(dev,
                                "snps,tx_de_emphasis_quirk");
@@ -930,6 +935,7 @@ static int dwc3_probe(struct platform_device *pdev)
                dwc->dis_u3_susphy_quirk = pdata->dis_u3_susphy_quirk;
                dwc->dis_u2_susphy_quirk = pdata->dis_u2_susphy_quirk;
                dwc->dis_enblslpm_quirk = pdata->dis_enblslpm_quirk;
+               dwc->dis_rxdet_inp3_quirk = pdata->dis_rxdet_inp3_quirk;
 
                dwc->tx_de_emphasis_quirk = pdata->tx_de_emphasis_quirk;
                if (pdata->tx_de_emphasis)
index aeb84c2bce64868164aa9e84d4b287967a249b5b..c09e390646c3abc63442e29bcf14ba5722419319 100644 (file)
 /* Global USB3 PIPE Control Register */
 #define DWC3_GUSB3PIPECTL_PHYSOFTRST   (1 << 31)
 #define DWC3_GUSB3PIPECTL_U2SSINP3OK   (1 << 29)
+#define DWC3_GUSB3PIPECTL_DISRXDETINP3 (1 << 28)
 #define DWC3_GUSB3PIPECTL_REQP1P2P3    (1 << 24)
 #define DWC3_GUSB3PIPECTL_DEP1P2P3(n)  ((n) << 19)
 #define DWC3_GUSB3PIPECTL_DEP1P2P3_MASK        DWC3_GUSB3PIPECTL_DEP1P2P3(7)
@@ -865,6 +866,7 @@ struct dwc3 {
        unsigned                dis_u3_susphy_quirk:1;
        unsigned                dis_u2_susphy_quirk:1;
        unsigned                dis_enblslpm_quirk:1;
+       unsigned                dis_rxdet_inp3_quirk:1;
 
        unsigned                tx_de_emphasis_quirk:1;
        unsigned                tx_de_emphasis:2;
index aaa6f00df755ba76cd49b87207ba55bcaf840b6c..8826cca5fc6f64c2d43330a71e8ffb9f87512fef 100644 (file)
@@ -42,6 +42,7 @@ struct dwc3_platform_data {
        unsigned dis_u3_susphy_quirk:1;
        unsigned dis_u2_susphy_quirk:1;
        unsigned dis_enblslpm_quirk:1;
+       unsigned dis_rxdet_inp3_quirk:1;
 
        unsigned tx_de_emphasis_quirk:1;
        unsigned tx_de_emphasis:2;