fix rga miss flush cmd reg to DDR bug

Signed-off-by: Shengqin.Zhang <zsq@rock-chips.com>

diff --git a/drivers/video/rockchip/rga/rga_drv.c b/drivers/video/rockchip/rga/rga_drv.c
index 9686b2513955032da9306f8f51b8ffa2a0e366bd..cd76e6396c8e20e654074cee13b270a9e40f269f 100755 (executable)
--- a/drivers/video/rockchip/rga/rga_drv.c
+++ b/drivers/video/rockchip/rga/rga_drv.c
@@ -635,15 +635,13 @@ static void rga_try_set_reg(void)
             rga_reg_from_wait_to_run(reg);
 \r
             #ifdef CONFIG_ARM\r
-            dmac_flush_range(&rga_service.cmd_buff[0], &rga_service.cmd_buff[28]);
-            outer_flush_range(virt_to_phys(&rga_service.cmd_buff[0]),virt_to_phys(&rga_service.cmd_buff[28]));\r
+            dmac_flush_range(&rga_service.cmd_buff[0], &rga_service.cmd_buff[32]);
+            outer_flush_range(virt_to_phys(&rga_service.cmd_buff[0]),virt_to_phys(&rga_service.cmd_buff[32]));\r
             #elif defined(CONFIG_ARM64)\r
-            __dma_flush_range(&rga_service.cmd_buff[0], &rga_service.cmd_buff[28]);\r
+            __dma_flush_range(&rga_service.cmd_buff[0], &rga_service.cmd_buff[32]);\r
             #endif\r
 
-            #if 1 
             rga_soft_reset();
-            #endif
 
             rga_write(0x0, RGA_SYS_CTRL);
             rga_write(0, RGA_MMU_CTRL);