#pwm-cells = <2>;
pinctrl-names = "default";
pinctrl-0 = <&pwm0_pin>;
+ clocks = <&clk_gates7 10>;
+ clock-names = "pclk_pwm";
status = "disabled";
};
#pwm-cells = <2>;
pinctrl-names = "default";
pinctrl-0 = <&pwm1_pin>;
+ clocks = <&clk_gates7 10>;
+ clock-names = "pclk_pwm";
status = "disabled";
};
reg = <0x20050020 0x10>; /*0x20030000*/
#pwm-cells = <2>;
pinctrl-names = "default";
+ clock-names = "pclk_pwm";
+ clocks = <&clk_gates7 11>;
pinctrl-0 = <&pwm2_pin>;
status = "disabled";
#pwm-cells = <2>;
pinctrl-names = "default";
pinctrl-0 = <&pwm3_pin>;
+ clocks = <&clk_gates7 11>;
+ clock-names = "pclk_pwm";
status = "disabled";
};
#pwm-cells = <2>;
pinctrl-names = "default";
pinctrl-0 = <&pwm0_pin>;
+ clocks = <&clk_gates11 11>;
+ clock-names = "pclk_pwm";
status = "okay";
};
#pwm-cells = <2>;
pinctrl-names = "default";
pinctrl-0 = <&pwm1_pin>;
+ clocks = <&clk_gates11 11>;
+ clock-names = "pclk_pwm";
status = "disabled";
};
#pwm-cells = <2>;
pinctrl-names = "default";
pinctrl-0 = <&pwm2_pin>;
+ clocks = <&clk_gates11 11>;
+ clock-names = "pclk_pwm";
status = "disabled";
};
#pwm-cells = <2>;
pinctrl-names = "default";
pinctrl-0 = <&pwm3_pin>;
+ clocks = <&clk_gates11 11>;
+ clock-names = "pclk_pwm";
status = "disabled";
};
dvfs {
pc->pwm_id = RK_PWM;
}
//pc->clk = devm_clk_get(&pdev->dev, NULL);
- pc->clk = clk_get(NULL,"g_p_pwm23");
+ pc->clk = devm_clk_get(&pdev->dev,"pclk_pwm");
if (IS_ERR(pc->clk))