reg = <0x0 0xff960000 0x0 0x4000>, <0x0 0xff968000 0x0 0x4000>;
reg-names = "mipi_dsi_host" ,"mipi_dsi_phy";
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk_gates4 14>, <&clk_gates22 10>, <&clk_gates17 3>;
- clock-names = "clk_mipi_24m", "pclk_mipi_dsi", "pclk_mipi_dsi_host";
+ clocks = <&clk_gates4 14>, <&clk_gates22 10>, <&clk_gates17 3>, <&pd_mipidsi>;
+ clock-names = "clk_mipi_24m", "pclk_mipi_dsi", "pclk_mipi_dsi_host", "pd_mipi_dsi";
status = "okay";
};
if (dsi->ops.id == DWC_DSI_VERSION_RK312x) {
clk_prepare_enable(dsi->h2p_hclk);
clk_prepare_enable(dsi->dsi_pd);
- }
+ } else
+ clk_prepare_enable(dsi->dsi_pd);
udelay(10);
if (dsi->ops.id == DWC_DSI_VERSION_RK312x) {
clk_disable_unprepare(dsi->h2p_hclk);
clk_disable_unprepare(dsi->dsi_pd);
- }
+ } else
+ clk_disable_unprepare(dsi->dsi_pd);
return 0;
}
dev_err(&pdev->dev, "get pclk_mipi_dsi_host clock fail\n");
return PTR_ERR(dsi->dsi_host_pclk);
}
+
+ dsi->dsi_pd = devm_clk_get(&pdev->dev, "pd_mipi_dsi");
+ if (unlikely(IS_ERR(dsi->dsi_pd))) {
+ dev_err(&pdev->dev, "get pd_mipi_dsi clock fail\n");
+ return PTR_ERR(dsi->dsi_pd);
+ }
}
if (dsi->ops.id == DWC_DSI_VERSION_RK312x) {