staging: comedi: dt282x: tidy up register bit defines

commit f6b1160eb27f990cc1c48b67a5f83cb63115284e upstream.

Arnd Bergmann pointed out that gcc-6 warns about passing negative signed
integer into swab16() due to the macro expansion of 'outw'.

It appears that the register map constants are causing the warnings.
Actually, it might just be the (1 << 15) ones...

Convert all the constants as suggested by checkpatch.pl:
CHECK: Prefer using the BIT macro

The BIT() macro will make all the constants explicitly 'unsigned', which
helps to avoid the warning.

Fix the, unsused, DT2821_CHANCSR_PRESLA() macro. The "Present List
Address" (PRESLA) bits in the CHANCSR register are read only. This
define was meant to extract the bits from the read value.

Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Reported-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Ian Abbott <abbotti@mev.co.uk>
Tested-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/staging/comedi/drivers/dt282x.c b/drivers/staging/comedi/drivers/dt282x.c
index 5a536a00066f9ff4340813d85b68854044715d3d..b63472de761ab19267ce5a07b9efa20973ae523f 100644 (file)
--- a/drivers/staging/comedi/drivers/dt282x.c
+++ b/drivers/staging/comedi/drivers/dt282x.c
@@ -69,48 +69,49 @@
  * Register map
  */
 #define DT2821_ADCSR_REG               0x00
-#define DT2821_ADCSR_ADERR             (1 << 15)
-#define DT2821_ADCSR_ADCLK             (1 << 9)
-#define DT2821_ADCSR_MUXBUSY           (1 << 8)
-#define DT2821_ADCSR_ADDONE            (1 << 7)
-#define DT2821_ADCSR_IADDONE           (1 << 6)
+#define DT2821_ADCSR_ADERR             BIT(15)
+#define DT2821_ADCSR_ADCLK             BIT(9)
+#define DT2821_ADCSR_MUXBUSY           BIT(8)
+#define DT2821_ADCSR_ADDONE            BIT(7)
+#define DT2821_ADCSR_IADDONE           BIT(6)
 #define DT2821_ADCSR_GS(x)             (((x) & 0x3) << 4)
 #define DT2821_ADCSR_CHAN(x)           (((x) & 0xf) << 0)
 #define DT2821_CHANCSR_REG             0x02
-#define DT2821_CHANCSR_LLE             (1 << 15)
-#define DT2821_CHANCSR_PRESLA(x)       (((x) & 0xf) >> 8)
+#define DT2821_CHANCSR_LLE             BIT(15)
+#define DT2821_CHANCSR_TO_PRESLA(x)    (((x) >> 8) & 0xf)
 #define DT2821_CHANCSR_NUMB(x)         ((((x) - 1) & 0xf) << 0)
 #define DT2821_ADDAT_REG               0x04
 #define DT2821_DACSR_REG               0x06
-#define DT2821_DACSR_DAERR             (1 << 15)
+#define DT2821_DACSR_DAERR             BIT(15)
 #define DT2821_DACSR_YSEL(x)           ((x) << 9)
-#define DT2821_DACSR_SSEL              (1 << 8)
-#define DT2821_DACSR_DACRDY            (1 << 7)
-#define DT2821_DACSR_IDARDY            (1 << 6)
-#define DT2821_DACSR_DACLK             (1 << 5)
-#define DT2821_DACSR_HBOE              (1 << 1)
-#define DT2821_DACSR_LBOE              (1 << 0)
+#define DT2821_DACSR_SSEL              BIT(8)
+#define DT2821_DACSR_DACRDY            BIT(7)
+#define DT2821_DACSR_IDARDY            BIT(6)
+#define DT2821_DACSR_DACLK             BIT(5)
+#define DT2821_DACSR_HBOE              BIT(1)
+#define DT2821_DACSR_LBOE              BIT(0)
 #define DT2821_DADAT_REG               0x08
 #define DT2821_DIODAT_REG              0x0a
 #define DT2821_SUPCSR_REG              0x0c
-#define DT2821_SUPCSR_DMAD             (1 << 15)
-#define DT2821_SUPCSR_ERRINTEN         (1 << 14)
-#define DT2821_SUPCSR_CLRDMADNE                (1 << 13)
-#define DT2821_SUPCSR_DDMA             (1 << 12)
-#define DT2821_SUPCSR_DS_PIO           (0 << 10)
-#define DT2821_SUPCSR_DS_AD_CLK                (1 << 10)
-#define DT2821_SUPCSR_DS_DA_CLK                (2 << 10)
-#define DT2821_SUPCSR_DS_AD_TRIG       (3 << 10)
-#define DT2821_SUPCSR_BUFFB            (1 << 9)
-#define DT2821_SUPCSR_SCDN             (1 << 8)
-#define DT2821_SUPCSR_DACON            (1 << 7)
-#define DT2821_SUPCSR_ADCINIT          (1 << 6)
-#define DT2821_SUPCSR_DACINIT          (1 << 5)
-#define DT2821_SUPCSR_PRLD             (1 << 4)
-#define DT2821_SUPCSR_STRIG            (1 << 3)
-#define DT2821_SUPCSR_XTRIG            (1 << 2)
-#define DT2821_SUPCSR_XCLK             (1 << 1)
-#define DT2821_SUPCSR_BDINIT           (1 << 0)
+#define DT2821_SUPCSR_DMAD             BIT(15)
+#define DT2821_SUPCSR_ERRINTEN         BIT(14)
+#define DT2821_SUPCSR_CLRDMADNE                BIT(13)
+#define DT2821_SUPCSR_DDMA             BIT(12)
+#define DT2821_SUPCSR_DS(x)            (((x) & 0x3) << 10)
+#define DT2821_SUPCSR_DS_PIO           DT2821_SUPCSR_DS(0)
+#define DT2821_SUPCSR_DS_AD_CLK                DT2821_SUPCSR_DS(1)
+#define DT2821_SUPCSR_DS_DA_CLK                DT2821_SUPCSR_DS(2)
+#define DT2821_SUPCSR_DS_AD_TRIG       DT2821_SUPCSR_DS(3)
+#define DT2821_SUPCSR_BUFFB            BIT(9)
+#define DT2821_SUPCSR_SCDN             BIT(8)
+#define DT2821_SUPCSR_DACON            BIT(7)
+#define DT2821_SUPCSR_ADCINIT          BIT(6)
+#define DT2821_SUPCSR_DACINIT          BIT(5)
+#define DT2821_SUPCSR_PRLD             BIT(4)
+#define DT2821_SUPCSR_STRIG            BIT(3)
+#define DT2821_SUPCSR_XTRIG            BIT(2)
+#define DT2821_SUPCSR_XCLK             BIT(1)
+#define DT2821_SUPCSR_BDINIT           BIT(0)
 #define DT2821_TMRCTR_REG              0x0e
 
 static const struct comedi_lrange range_dt282x_ai_lo_bipolar = {