arm64: dts: rockchip: add mbox related nodes for rk3368

This adds support rk3368-mbox and scpi nodes for rk3368 SoC.

Change-Id: Ifdb90f8101c67ec579b5bba28f163527ed096c4c
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index b931379811ac223f443df9ce5328ed21d29ebfa8..04be443ad705c6b6f582560d4491323dc013bb32 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -747,6 +747,28 @@
                clocks = <&cru PCLK_MAILBOX>;
                clock-names = "pclk_mailbox";
                #mbox-cells = <1>;
                clocks = <&cru PCLK_MAILBOX>;
                clock-names = "pclk_mailbox";
                #mbox-cells = <1>;

+               status = "disabled";
+       };
+
+       mailbox: mailbox@ff6b0000 {
+               compatible = "rockchip,rk3368-mbox-legacy";
+               reg = <0x0 0xff6b0000 0x0 0x1000>,
+                     <0x0 0xff8cf000 0x0 0x1000>; /* the end 4k of sram */
+               interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&cru PCLK_MAILBOX>;
+               clock-names = "pclk_mailbox";
+               #mbox-cells = <1>;
+               status = "disabled";
+       };
+
+       mailbox_scpi: mailbox-scpi {
+               compatible = "rockchip,rk3368-scpi-legacy";
+               mboxes = <&mailbox 0>, <&mailbox 1>, <&mailbox 2>;
+               chan-nums = <3>;
+               status = "disabled";

        };
 
        pmu: power-management@ff730000 {
        };
 
        pmu: power-management@ff730000 {