drm/rockchip: vop: init vskiplines on scale calculate

Here is a Bug on scale calculate:
   int vskiplines = 0;
   maybe vskiplines = 2 on yrgb scl_vop_cal_scale
   maybe vskiplines not update on cbcr scl_vop_cal_scale.
   Then cbcr path would get vskiplines = 2, that is unexpect.

Change-Id: Iaeb0d125c7bbcfb95fe32005ef5c938703d03ed4
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index 23f87b3de8cd2aa5c853f4fbcfff8e20c741399e..7255232b5a285f03da73c856699130146b572db8 100644 (file)
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -464,6 +464,8 @@ static void scl_vop_cal_scl_fac(struct vop *vop, struct vop_win *win,
        VOP_SCL_SET_EXT(vop, win, yrgb_vsd_mode, SCALE_DOWN_BIL);
        VOP_SCL_SET_EXT(vop, win, yrgb_vsu_mode, vsu_mode);
        if (is_yuv) {
        VOP_SCL_SET_EXT(vop, win, yrgb_vsd_mode, SCALE_DOWN_BIL);
        VOP_SCL_SET_EXT(vop, win, yrgb_vsu_mode, vsu_mode);
        if (is_yuv) {

+               vskiplines = 0;
+

                val = scl_vop_cal_scale(cbcr_hor_scl_mode, cbcr_src_w,
                                        dst_w, true, 0, NULL);
                VOP_SCL_SET(vop, win, scale_cbcr_x, val);
                val = scl_vop_cal_scale(cbcr_hor_scl_mode, cbcr_src_w,
                                        dst_w, true, 0, NULL);
                VOP_SCL_SET(vop, win, scale_cbcr_x, val);